forked from OSchip/llvm-project
29 lines
1.3 KiB
C
29 lines
1.3 KiB
C
// RUN: %clang_cc1 -triple x86_64-linux-gnu -target-feature +avx -emit-llvm -o - %s | FileCheck %s --check-prefixes=CHECK
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// Make sure the features from the command line are honored regardless of what
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// CPU is specified in the cpu_specific attribute.
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// In this test, if the 'avx' feature isn't honored, we'll generate an error for
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// the return type having a different ABI without 'avx' being enabled.
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typedef double __m256d __attribute__((vector_size(32)));
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extern __m256d bar_avx1(void);
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extern __m256d bar_avx2(void);
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// AVX1/AVX2 dispatcher
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__attribute__((cpu_dispatch(generic, core_4th_gen_avx)))
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__m256d foo_pd64x4(void);
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__attribute__((cpu_specific(generic)))
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__m256d foo(void) { return bar_avx1(); }
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// CHECK: define{{.*}} @foo.A() #[[A:[0-9]+]]
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__attribute__((cpu_specific(core_4th_gen_avx)))
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__m256d foo(void) { return bar_avx2(); }
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// CHECK: define{{.*}} @foo.V() #[[V:[0-9]+]]
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// CHECK: attributes #[[A]] = {{.*}}"target-features"="+avx,+crc32,+cx8,+mmx,+popcnt,+sse,+sse2,+sse3,+sse4.1,+sse4.2,+ssse3,+x87,+xsave"
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// CHECK-SAME: "tune-cpu"="generic"
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// CHECK: attributes #[[V]] = {{.*}}"target-features"="+avx,+avx2,+bmi,+cmov,+crc32,+cx8,+f16c,+fma,+lzcnt,+mmx,+movbe,+popcnt,+sse,+sse2,+sse3,+sse4.1,+sse4.2,+ssse3,+x87,+xsave"
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// CHECK-SAME: "tune-cpu"="haswell"
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