forked from OSchip/llvm-project
84 lines
3.2 KiB
LLVM
84 lines
3.2 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu | FileCheck %s
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declare void @llvm.memcpy.p0i8.p0i8.i64(i8* nocapture writeonly, i8* nocapture readonly, i64, i1 immarg) #1
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define dso_local void @copy_7_bytes(i8* noalias nocapture, i8* noalias nocapture readonly) nounwind #0 {
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; CHECK-LABEL: copy_7_bytes:
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; CHECK: # %bb.0:
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; CHECK-NEXT: movl (%rsi), %eax
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; CHECK-NEXT: movl 3(%rsi), %ecx
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; CHECK-NEXT: movl %ecx, 3(%rdi)
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; CHECK-NEXT: movl %eax, (%rdi)
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; CHECK-NEXT: retq
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tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 1 %0, i8* align 1 %1, i64 7, i1 false)
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ret void
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}
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define dso_local void @copy_7_bytes_volatile(i8* noalias nocapture, i8* noalias nocapture readonly) nounwind #0 {
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; CHECK-LABEL: copy_7_bytes_volatile:
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; CHECK: # %bb.0:
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; CHECK-NEXT: movb 6(%rsi), %al
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; CHECK-NEXT: movb %al, 6(%rdi)
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; CHECK-NEXT: movzwl 4(%rsi), %eax
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; CHECK-NEXT: movw %ax, 4(%rdi)
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; CHECK-NEXT: movl (%rsi), %eax
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; CHECK-NEXT: movl %eax, (%rdi)
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; CHECK-NEXT: retq
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tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 1 %0, i8* align 1 %1, i64 7, i1 true)
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ret void
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}
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declare void @llvm.memmove.p0i8.p0i8.i64(i8* nocapture, i8* nocapture readonly, i64, i1 immarg) #1
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define dso_local void @move_7_bytes(i8* nocapture, i8* nocapture readonly) nounwind #0 {
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; CHECK-LABEL: move_7_bytes:
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; CHECK: # %bb.0:
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; CHECK-NEXT: movl (%rsi), %eax
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; CHECK-NEXT: movzwl 4(%rsi), %ecx
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; CHECK-NEXT: movb 6(%rsi), %dl
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; CHECK-NEXT: movb %dl, 6(%rdi)
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; CHECK-NEXT: movw %cx, 4(%rdi)
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; CHECK-NEXT: movl %eax, (%rdi)
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; CHECK-NEXT: retq
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tail call void @llvm.memmove.p0i8.p0i8.i64(i8* align 1 %0, i8* align 1 %1, i64 7, i1 false)
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ret void
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}
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define dso_local void @move_7_bytes_volatile(i8* nocapture, i8* nocapture readonly) nounwind #0 {
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; CHECK-LABEL: move_7_bytes_volatile:
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; CHECK: # %bb.0:
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; CHECK-NEXT: movl (%rsi), %eax
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; CHECK-NEXT: movzwl 4(%rsi), %ecx
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; CHECK-NEXT: movb 6(%rsi), %dl
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; CHECK-NEXT: movb %dl, 6(%rdi)
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; CHECK-NEXT: movw %cx, 4(%rdi)
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; CHECK-NEXT: movl %eax, (%rdi)
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; CHECK-NEXT: retq
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tail call void @llvm.memmove.p0i8.p0i8.i64(i8* align 1 %0, i8* align 1 %1, i64 7, i1 true)
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ret void
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}
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declare void @llvm.memset.p0i8.i64(i8* nocapture writeonly, i8 , i64, i1 immarg) #1
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define dso_local void @set_7_bytes(i8* noalias nocapture) nounwind #0 {
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; CHECK-LABEL: set_7_bytes:
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; CHECK: # %bb.0:
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; CHECK-NEXT: movl $16843009, 3(%rdi) # imm = 0x1010101
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; CHECK-NEXT: movl $16843009, (%rdi) # imm = 0x1010101
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; CHECK-NEXT: retq
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tail call void @llvm.memset.p0i8.i64(i8* align 1 %0, i8 1, i64 7, i1 false)
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ret void
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}
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define dso_local void @set_7_bytes_volatile(i8* noalias nocapture) nounwind #0 {
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; CHECK-LABEL: set_7_bytes_volatile:
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; CHECK: # %bb.0:
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; CHECK-NEXT: movb $1, 6(%rdi)
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; CHECK-NEXT: movw $257, 4(%rdi) # imm = 0x101
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; CHECK-NEXT: movl $16843009, (%rdi) # imm = 0x1010101
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; CHECK-NEXT: retq
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tail call void @llvm.memset.p0i8.i64(i8* align 1 %0, i8 1, i64 7, i1 true)
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ret void
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}
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attributes #0 = { noreturn nounwind uwtable "target-cpu"="x86-64" }
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attributes #1 = { argmemonly nounwind }
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