forked from OSchip/llvm-project
50 lines
1.5 KiB
LLVM
50 lines
1.5 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -mtriple=i686-unknown | FileCheck %s --check-prefix=X86
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; RUN: llc < %s -mtriple=x86_64-unknown | FileCheck %s --check-prefix=X64
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@d.e = external dso_local unnamed_addr global i32, align 4
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define void @PR50254() {
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; X86-LABEL: PR50254:
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; X86: # %bb.0: # %entry
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; X86-NEXT: movswl d.e, %eax
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; X86-NEXT: xorl %ecx, %ecx
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; X86-NEXT: testb %cl, %cl
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; X86-NEXT: jne .LBB0_2
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; X86-NEXT: # %bb.1: # %for.end
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; X86-NEXT: movw %ax, d.e
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; X86-NEXT: .LBB0_2: # %for.body.1
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; X86-NEXT: retl
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;
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; X64-LABEL: PR50254:
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; X64: # %bb.0: # %entry
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; X64-NEXT: movswq d.e(%rip), %rax
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; X64-NEXT: xorl %ecx, %ecx
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; X64-NEXT: testb %cl, %cl
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; X64-NEXT: jne .LBB0_2
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; X64-NEXT: # %bb.1: # %for.end
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; X64-NEXT: movw %ax, d.e(%rip)
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; X64-NEXT: .LBB0_2: # %for.body.1
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; X64-NEXT: retq
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entry:
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%load = load i16, i16* bitcast (i32* @d.e to i16*), align 4
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%xor1 = xor i16 %load, 0
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%xor2 = xor i64 undef, 3821908120
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%xor3 = xor i16 %load, -1
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%xor4 = sext i16 %xor3 to i64
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%xor5 = and i64 %xor4, 4294967295
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%xor6 = xor i64 %xor5, 3821908120
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br label %for.body
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for.body: ; preds = %entry
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br i1 undef, label %for.end, label %for.body.1
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for.end: ; preds = %for.body
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store i16 %xor1, i16* bitcast (i32* @d.e to i16*), align 4
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ret void
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for.body.1: ; preds = %for.body
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%add.1 = add i64 %xor6, undef
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ret void
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}
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