forked from OSchip/llvm-project
42 lines
1.5 KiB
LLVM
42 lines
1.5 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -mtriple=i686-- -mattr=+sse2,-avx | FileCheck %s --check-prefix=i686_SSE2
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; RUN: llc < %s -mtriple=x86_64-- -mattr=+sse2,-avx | FileCheck %s --check-prefix=x86_64_SSE2
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; RUN: llc < %s -mtriple=i686-- -mattr=+avx | FileCheck %s --check-prefix=i686_AVX
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; RUN: llc < %s -mtriple=x86_64-- -mattr=+avx | FileCheck %s --check-prefix=x86_64_AVX
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; rdar://6573467
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define void @test(<16 x i8> %a, <16 x i8> %b, i32 %dummy, i8* %c) nounwind {
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; i686_SSE2-LABEL: test:
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; i686_SSE2: # %bb.0: # %entry
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; i686_SSE2-NEXT: pushl %edi
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; i686_SSE2-NEXT: movl {{[0-9]+}}(%esp), %edi
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; i686_SSE2-NEXT: maskmovdqu %xmm1, %xmm0
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; i686_SSE2-NEXT: popl %edi
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; i686_SSE2-NEXT: retl
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;
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; x86_64_SSE2-LABEL: test:
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; x86_64_SSE2: # %bb.0: # %entry
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; x86_64_SSE2-NEXT: movq %rsi, %rdi
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; x86_64_SSE2-NEXT: maskmovdqu %xmm1, %xmm0
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; x86_64_SSE2-NEXT: retq
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;
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; i686_AVX-LABEL: test:
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; i686_AVX: # %bb.0: # %entry
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; i686_AVX-NEXT: pushl %edi
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; i686_AVX-NEXT: movl {{[0-9]+}}(%esp), %edi
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; i686_AVX-NEXT: vmaskmovdqu %xmm1, %xmm0
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; i686_AVX-NEXT: popl %edi
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; i686_AVX-NEXT: retl
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;
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; x86_64_AVX-LABEL: test:
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; x86_64_AVX: # %bb.0: # %entry
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; x86_64_AVX-NEXT: movq %rsi, %rdi
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; x86_64_AVX-NEXT: vmaskmovdqu %xmm1, %xmm0
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; x86_64_AVX-NEXT: retq
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entry:
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tail call void @llvm.x86.sse2.maskmov.dqu( <16 x i8> %a, <16 x i8> %b, i8* %c )
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ret void
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}
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declare void @llvm.x86.sse2.maskmov.dqu(<16 x i8>, <16 x i8>, i8*) nounwind
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