forked from OSchip/llvm-project
163 lines
6.0 KiB
C++
163 lines
6.0 KiB
C++
//===-- ARMJITInfo.cpp - Implement the JIT interfaces for the ARM target --===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This file implements the JIT interfaces for the ARM target.
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//
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//===----------------------------------------------------------------------===//
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#define DEBUG_TYPE "jit"
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#include "ARMJITInfo.h"
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#include "ARMRelocations.h"
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#include "ARMSubtarget.h"
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#include "llvm/CodeGen/MachineCodeEmitter.h"
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#include "llvm/Config/alloca.h"
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#include <cstdlib>
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using namespace llvm;
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void ARMJITInfo::replaceMachineCodeForFunction(void *Old, void *New) {
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abort();
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}
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/// JITCompilerFunction - This contains the address of the JIT function used to
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/// compile a function lazily.
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static TargetJITInfo::JITCompilerFn JITCompilerFunction;
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// CompilationCallback stub - We can't use a C function with inline assembly in
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// it, because we the prolog/epilog inserted by GCC won't work for us. Instead,
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// write our own wrapper, which does things our way, so we have complete control
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// over register saving and restoring.
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extern "C" {
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#if defined(__arm__)
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void ARMCompilationCallback(void);
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asm(
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".text\n"
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".align 2\n"
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".globl ARMCompilationCallback\n"
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"ARMCompilationCallback:\n"
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// save main registers
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"mov ip, sp\n"
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"stmfd sp!, {fp, ip, lr, pc}\n"
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"sub fp, ip, #4\n"
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// arguments to Compilation Callback
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// r0 - our lr (address of the call instruction in stub plus 4)
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// r1 - stub's lr (address of instruction that called the stub plus 4)
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"mov r0, fp\n" // stub's frame
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"mov r1, lr\n" // stub's lr
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"bl ARMCompilationCallbackC\n"
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// restore main registers
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"ldmfd sp, {fp, sp, pc}\n");
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#else // Not an ARM host
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void ARMCompilationCallback() {
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assert(0 && "Cannot call ARMCompilationCallback() on a non-ARM arch!\n");
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abort();
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}
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#endif
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}
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/// ARMCompilationCallbackC - This is the target-specific function invoked by the
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/// function stub when we did not know the real target of a call. This function
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/// must locate the start of the stub or call site and pass it into the JIT
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/// compiler function.
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extern "C" void ARMCompilationCallbackC(intptr_t *StackPtr, intptr_t RetAddr) {
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intptr_t *RetAddrLoc = &StackPtr[-1];
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assert(*RetAddrLoc == RetAddr &&
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"Could not find return address on the stack!");
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#if 0
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DOUT << "In callback! Addr=" << (void*)RetAddr
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<< " FP=" << (void*)StackPtr
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<< ": Resolving call to function: "
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<< TheVM->getFunctionReferencedName((void*)RetAddr) << "\n";
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#endif
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intptr_t Addr = RetAddr - 4;
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intptr_t NewVal = (intptr_t)JITCompilerFunction((void*)Addr);
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// Rewrite the call target... so that we don't end up here every time we
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// execute the call.
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*(intptr_t *)Addr = NewVal;
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// Change the return address to reexecute the branch and link instruction...
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*RetAddrLoc -= 12;
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}
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TargetJITInfo::LazyResolverFn
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ARMJITInfo::getLazyResolverFunction(JITCompilerFn F) {
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JITCompilerFunction = F;
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return ARMCompilationCallback;
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}
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void *ARMJITInfo::emitFunctionStub(void *Fn, MachineCodeEmitter &MCE) {
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unsigned addr = (intptr_t)Fn;
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// If this is just a call to an external function, emit a branch instead of a
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// call. The code is the same except for one bit of the last instruction.
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if (Fn != (void*)(intptr_t)ARMCompilationCallback) {
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// branch to the corresponding function addr
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// the stub is 8-byte size and 4-aligned
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MCE.startFunctionStub(8, 4);
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MCE.emitWordLE(0xE51FF004); // LDR PC, [PC,#-4]
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MCE.emitWordLE(addr); // addr of function
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} else {
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// branch and link to the corresponding function addr
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// the stub is 20-byte size and 4-aligned
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MCE.startFunctionStub(20, 4);
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MCE.emitWordLE(0xE92D4800); // STMFD SP!, [R11, LR]
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MCE.emitWordLE(0xE28FE004); // ADD LR, PC, #4
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MCE.emitWordLE(0xE51FF004); // LDR PC, [PC,#-4]
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MCE.emitWordLE(addr); // addr of function
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MCE.emitWordLE(0xE8BD8800); // LDMFD SP!, [R11, PC]
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}
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return MCE.finishFunctionStub(0);
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}
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/// relocate - Before the JIT can run a block of code that has been emitted,
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/// it must rewrite the code to contain the actual addresses of any
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/// referenced global symbols.
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void ARMJITInfo::relocate(void *Function, MachineRelocation *MR,
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unsigned NumRelocs, unsigned char* GOTBase) {
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for (unsigned i = 0; i != NumRelocs; ++i, ++MR) {
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void *RelocPos = (char*)Function + MR->getMachineCodeOffset();
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intptr_t ResultPtr = (intptr_t)MR->getResultPointer();
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switch ((ARM::RelocationType)MR->getRelocationType()) {
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case ARM::reloc_arm_relative: {
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// It is necessary to calculate the correct PC relative value. We
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// subtract the base addr from the target addr to form a byte offset.
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ResultPtr = ResultPtr-(intptr_t)RelocPos-8;
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// If the result is positive, set bit U(23) to 1.
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if (ResultPtr >= 0)
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*((unsigned*)RelocPos) |= 1 << 23;
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else {
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// otherwise, obtain the absolute value and set
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// bit U(23) to 0.
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ResultPtr *= -1;
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*((unsigned*)RelocPos) &= 0xFF7FFFFF;
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}
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// set the immed value calculated
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*((unsigned*)RelocPos) |= (unsigned)ResultPtr;
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// set register Rn to PC
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*((unsigned*)RelocPos) |= 0xF << 16;
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break;
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}
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case ARM::reloc_arm_branch: {
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// It is necessary to calculate the correct value of signed_immed_24
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// field. We subtract the base addr from the target addr to form a
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// byte offset, which must be inside the range -33554432 and +33554428.
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// Then, we set the signed_immed_24 field of the instruction to bits
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// [25:2] of the byte offset. More details ARM-ARM p. A4-11.
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ResultPtr = ResultPtr-(intptr_t)RelocPos-8;
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ResultPtr = (ResultPtr & 0x03FFFFFC) >> 2;
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assert(ResultPtr >= -33554432 && ResultPtr <= 33554428);
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*((unsigned*)RelocPos) |= ResultPtr;
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break;
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}
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}
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}
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}
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