llvm-project/llvm/test/MC/Disassembler
Zlatko Buljan 5da2f6cd03 [mips][microMIPS] Implement DERET and DI instructions and check size operand for EXT and DEXT* instructions
Differential Revision: http://reviews.llvm.org/D15570

llvm-svn: 256152
2015-12-21 13:08:58 +00:00
..
AArch64 [AArch64] Add ARMv8.2-A FP16 vector instructions 2015-12-08 12:16:10 +00:00
ARM Revert "[ARM] Add ARMv8.2-A FP16 scalar instructions" 2015-12-16 19:21:03 +00:00
Hexagon [Hexagon] Fixing store instructions and reenabling a few more tests. 2015-11-10 00:22:00 +00:00
Mips [mips][microMIPS] Implement DERET and DI instructions and check size operand for EXT and DEXT* instructions 2015-12-21 13:08:58 +00:00
PowerPC [PowerPC] Replace cntlz[.] with cntlzw[.] 2015-10-28 03:26:45 +00:00
Sparc [Sparc] Implement i64 load/store support for 32-bit sparc. 2015-08-10 19:11:39 +00:00
SystemZ [SystemZ] Add assembly instructions for obtaining clock values as well as CPU features 2015-10-01 14:43:48 +00:00
X86 [llvm-mc] Ignore opcode size prefix in 64-bit CALL disassembly 2015-08-26 16:20:29 +00:00
XCore Reduce verbiage of lit.local.cfg files 2014-06-09 22:42:55 +00:00