Eric Christopher 2ae7180b24 Accept dwarf version 5 for CIE versions. ... llvm-svn: 256527		2015-12-28 23:02:42 +00:00
..
AArch64	[AArch64] Fix FP16 vector instructions that should only accept low registers	2015-12-09 14:32:11 +00:00
AMDGPU	AMDGPU/SI: Fix encoding of flat instructions on VI	2015-12-24 03:18:18 +00:00
ARM	Support clrex instruction on ARMv6k. Patch by Andrew Turner.	2015-12-28 17:47:23 +00:00
AsmParser	[MC] Use LShr for constant evaluation of ">>" on non-arm64 darwin.	2015-11-11 00:51:36 +00:00
COFF	[MC] Don't use the architecture to govern which object file format to use	2015-12-22 01:39:04 +00:00
Disassembler	[mips][microMIPS] Implement DERET and DI instructions and check size operand for EXT and DEXT* instructions	2015-12-21 13:08:58 +00:00
ELF	Accept dwarf version 5 for CIE versions.	2015-12-28 23:02:42 +00:00
Hexagon	[Hexagon] Add PIC support	2015-12-18 20:19:30 +00:00
MachO	Form reform for MCDwarf.	2015-12-23 01:57:31 +00:00
Markup	…
Mips	[mips][microMIPS] Implement DERET and DI instructions and check size operand for EXT and DEXT* instructions	2015-12-21 13:08:58 +00:00
PowerPC	Relax a few more overspecified tests.	2015-11-03 19:38:19 +00:00
Sparc	Update test to take into account for r251271.	2015-10-26 03:34:29 +00:00
SystemZ	[SystemZ] Sort relocs to avoid code corruption by linker optimization	2015-12-16 18:12:40 +00:00
X86	[AVX512] Bring vmovq instructions names into alignment with the AVX and SSE names. Add a missing encoding to disassembler and assembler.	2015-12-28 06:11:42 +00:00