forked from OSchip/llvm-project
98 lines
2.9 KiB
LLVM
98 lines
2.9 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
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; RUN: opt -loop-unroll -verify-loop-lcssa -S < %s | FileCheck %s
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target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
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target triple = "x86_64-unknown-linux-gnu"
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@b = external local_unnamed_addr global i32, align 4
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declare i1 @unknown(i32) readonly nounwind willreturn
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define void @main() local_unnamed_addr #0 {
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; CHECK-LABEL: @main(
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; CHECK-NEXT: ph1:
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; CHECK-NEXT: br label [[H1:%.*]]
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; CHECK: h1:
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; CHECK-NEXT: [[D_0:%.*]] = phi i32 [ [[TMP0:%.*]], [[LATCH1:%.*]] ], [ undef, [[PH1:%.*]] ]
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; CHECK-NEXT: br label [[PH2:%.*]]
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; CHECK: ph2:
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; CHECK-NEXT: br label [[H2:%.*]]
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; CHECK: h2:
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; CHECK-NEXT: br label [[H3:%.*]]
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; CHECK: h3:
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; CHECK-NEXT: [[C1:%.*]] = call i1 @unknown(i32 0)
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; CHECK-NEXT: br i1 [[C1]], label [[LATCH3:%.*]], label [[EXIT_LOOPEXIT:%.*]]
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; CHECK: latch3:
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; CHECK-NEXT: [[C2:%.*]] = call i1 @unknown(i32 0)
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; CHECK-NEXT: br i1 [[C2]], label [[EXIT3:%.*]], label [[H3]]
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; CHECK: exit3:
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; CHECK-NEXT: br label [[LATCH2:%.*]]
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; CHECK: latch2:
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; CHECK-NEXT: br label [[H3_1:%.*]]
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; CHECK: h3.1:
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; CHECK-NEXT: [[C1_1:%.*]] = call i1 @unknown(i32 1)
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; CHECK-NEXT: br i1 [[C1_1]], label [[LATCH3_1:%.*]], label [[EXIT_LOOPEXIT1:%.*]]
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; CHECK: latch3.1:
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; CHECK-NEXT: [[C2_1:%.*]] = call i1 @unknown(i32 1)
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; CHECK-NEXT: br i1 [[C2_1]], label [[EXIT3_1:%.*]], label [[H3_1]]
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; CHECK: exit3.1:
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; CHECK-NEXT: br label [[LATCH2_1:%.*]]
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; CHECK: latch2.1:
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; CHECK-NEXT: [[C3:%.*]] = call i1 @unknown(i32 [[D_0]])
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; CHECK-NEXT: br i1 [[C3]], label [[LATCH1]], label [[PH2]]
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; CHECK: latch1:
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; CHECK-NEXT: [[TMP0]] = load i32, i32* @b, align 4
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; CHECK-NEXT: br label [[H1]]
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; CHECK: exit.loopexit:
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; CHECK-NEXT: [[D_0_LCSSA_PH:%.*]] = phi i32 [ [[D_0]], [[H3]] ]
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; CHECK-NEXT: br label [[EXIT:%.*]]
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; CHECK: exit.loopexit1:
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; CHECK-NEXT: [[D_0_LCSSA_PH2:%.*]] = phi i32 [ [[D_0]], [[H3_1]] ]
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; CHECK-NEXT: br label [[EXIT]]
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; CHECK: exit:
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; CHECK-NEXT: [[D_0_LCSSA:%.*]] = phi i32 [ [[D_0_LCSSA_PH]], [[EXIT_LOOPEXIT]] ], [ [[D_0_LCSSA_PH2]], [[EXIT_LOOPEXIT1]] ]
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; CHECK-NEXT: ret void
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;
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ph1:
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br label %h1
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h1:
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%d.0 = phi i32 [ %1, %latch1 ], [ undef, %ph1 ]
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br label %ph2
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ph2:
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br label %h2
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h2:
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%0 = phi i32 [ 0, %ph2 ], [ %inc, %latch2 ]
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br label %h3
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h3:
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%c1 = call i1 @unknown(i32 %0)
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br i1 %c1, label %latch3, label %exit
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latch3:
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%c2 = call i1 @unknown(i32 %0)
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br i1 %c2, label %exit3, label %h3
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exit3:
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br label %latch2
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latch2:
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%inc = add nuw nsw i32 %0, 1
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%cmp = icmp slt i32 %inc, 2
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br i1 %cmp, label %h2, label %exit2
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exit2:
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%c3 = call i1 @unknown(i32 %d.0)
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br i1 %c3, label %latch1, label %ph2
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latch1: ; preds = %exit2
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%1 = load i32, i32* @b, align 4
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br label %h1
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exit:
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%d.0.lcssa = phi i32 [ %d.0, %h3 ]
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ret void
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}
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