forked from OSchip/llvm-project
ab0c5cea0b
This adjusts all the MVE and CDE intrinsics now that v2i1 is a legal type, to use a <2 x i1> as opposed to emulating the predicate with a <4 x i1>. The v4i1 workarounds have been removed leaving the natural v2i1 types, notably in vctp64 which now generates a v2i1 type. AutoUpgrade code has been added to upgrade old IR, which needs to convert the old v4i1 to a v2i1 be converting it back and forth to an integer with arm.mve.v2i and arm.mve.i2v intrinsics. These should be optimized away in the final assembly. Differential Revision: https://reviews.llvm.org/D114455 |
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| .. | ||
| 2012-06-15-lsr-noaddrmode.ll | ||
| addrec-is-loop-invariant.ll | ||
| complexity.ll | ||
| ivchain-ARM.ll | ||
| lit.local.cfg | ||
| vctp-chains-inseltpoison.ll | ||
| vctp-chains.ll | ||