forked from OSchip/llvm-project
46 lines
1.7 KiB
LLVM
46 lines
1.7 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
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; RUN: opt -S -verify -iroutliner -ir-outlining-no-cost -no-ir-sim-intrinsics < %s | FileCheck %s
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; This test checks that we do not outline memset intrinsics since it requires
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; extra address space checks.
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declare void @llvm.memset.p0i8.i64(i8* nocapture writeonly, i8, i64, i32, i1)
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define i64 @function1(i64 %x, i64 %z, i64 %n) {
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; CHECK-LABEL: @function1(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: [[POOL:%.*]] = alloca [59 x i64], align 4
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; CHECK-NEXT: [[TMP:%.*]] = bitcast [59 x i64]* [[POOL]] to i8*
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; CHECK-NEXT: call void @llvm.memset.p0i8.i64(i8* align 4 [[TMP]], i8 0, i64 236, i1 false)
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; CHECK-NEXT: call void @outlined_ir_func_0(i64 [[N:%.*]], i64 [[X:%.*]], i64 [[Z:%.*]])
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; CHECK-NEXT: ret i64 0
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;
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entry:
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%pool = alloca [59 x i64], align 4
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%tmp = bitcast [59 x i64]* %pool to i8*
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call void @llvm.memset.p0i8.i64(i8* nonnull %tmp, i8 0, i64 236, i32 4, i1 false)
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%cmp3 = icmp eq i64 %n, 0
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%a = add i64 %x, %z
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%c = add i64 %x, %z
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ret i64 0
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}
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define i64 @function2(i64 %x, i64 %z, i64 %n) {
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; CHECK-LABEL: @function2(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: [[POOL:%.*]] = alloca [59 x i64], align 4
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; CHECK-NEXT: [[TMP:%.*]] = bitcast [59 x i64]* [[POOL]] to i8*
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; CHECK-NEXT: call void @llvm.memset.p0i8.i64(i8* align 4 [[TMP]], i8 0, i64 236, i1 false)
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; CHECK-NEXT: call void @outlined_ir_func_0(i64 [[N:%.*]], i64 [[X:%.*]], i64 [[Z:%.*]])
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; CHECK-NEXT: ret i64 0
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;
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entry:
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%pool = alloca [59 x i64], align 4
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%tmp = bitcast [59 x i64]* %pool to i8*
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call void @llvm.memset.p0i8.i64(i8* nonnull %tmp, i8 0, i64 236, i32 4, i1 false)
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%cmp3 = icmp eq i64 %n, 0
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%a = add i64 %x, %z
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%c = add i64 %x, %z
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ret i64 0
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}
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