forked from OSchip/llvm-project
79 lines
2.3 KiB
LLVM
79 lines
2.3 KiB
LLVM
; Verify that the .toc section is aligned on an 8-byte boundary.
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; RUN: llc < %s -mtriple=powerpc64-unknown-linux-gnu -mcpu=pwr8 -filetype=obj -o - | llvm-readobj --sections | FileCheck %s
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define void @test(i32* %a) {
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entry:
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%a.addr = alloca i32*, align 8
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store i32* %a, i32** %a.addr, align 8
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%0 = load i32*, i32** %a.addr, align 8
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%incdec.ptr = getelementptr inbounds i32, i32* %0, i32 1
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store i32* %incdec.ptr, i32** %a.addr, align 8
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%1 = load i32, i32* %0, align 4
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switch i32 %1, label %sw.epilog [
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i32 17, label %sw.bb
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i32 13, label %sw.bb1
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i32 11, label %sw.bb2
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i32 7, label %sw.bb3
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i32 5, label %sw.bb4
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i32 3, label %sw.bb5
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i32 2, label %sw.bb6
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]
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sw.bb: ; preds = %entry
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%2 = load i32*, i32** %a.addr, align 8
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store i32 2, i32* %2, align 4
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br label %sw.epilog
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sw.bb1: ; preds = %entry
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%3 = load i32*, i32** %a.addr, align 8
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store i32 3, i32* %3, align 4
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br label %sw.epilog
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sw.bb2: ; preds = %entry
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%4 = load i32*, i32** %a.addr, align 8
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store i32 5, i32* %4, align 4
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br label %sw.epilog
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sw.bb3: ; preds = %entry
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%5 = load i32*, i32** %a.addr, align 8
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store i32 7, i32* %5, align 4
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br label %sw.epilog
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sw.bb4: ; preds = %entry
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%6 = load i32*, i32** %a.addr, align 8
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store i32 11, i32* %6, align 4
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br label %sw.epilog
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sw.bb5: ; preds = %entry
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%7 = load i32*, i32** %a.addr, align 8
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store i32 13, i32* %7, align 4
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br label %sw.epilog
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sw.bb6: ; preds = %entry
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%8 = load i32*, i32** %a.addr, align 8
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store i32 17, i32* %8, align 4
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br label %sw.epilog
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sw.epilog: ; preds = %entry, %sw.bb6, %sw.bb5, %sw.bb4, %sw.bb3, %sw.bb2, %sw.bb1, %sw.bb
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ret void
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}
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; CHECK: Name: .toc
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; CHECK: AddressAlignment: 8
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; CHECK: Name: .rela.toc
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; This test was generated from the following from PR22711:
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;void test(int *a) {
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; switch (*a++) {
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; case 17: *a = 2; break;
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; case 13: *a = 3; break;
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; case 11: *a = 5; break;
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; case 7: *a = 7; break;
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; case 5: *a = 11; break;
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; case 3: *a = 13; break;
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; case 2: *a = 17; break;
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; }
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;}
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