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llvm-project/llvm/test/CodeGen/MIR
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Ahmed Bougacha d760de0b32 [MIRParser] Accept unsized generic instructions. 
Since r276158, we require generic instructions to have a sized type.
G_BR doesn't; relax the restriction.

llvm-svn: 277006
 		2016-07-28 17:15:12 +00:00
..
AArch64 MIRParser: Use shorter cfi identifiers 2016-07-26 18:20:00 +00:00
AMDGPU llc: Add support for -run-pass none 2016-07-16 02:24:59 +00:00
ARM MIRParser: Use shorter cfi identifiers 2016-07-26 18:20:00 +00:00
Generic llc: Add support for -run-pass none 2016-07-16 02:24:59 +00:00
Hexagon [MIR] Print on the given output instead of stderr. 2016-07-13 20:36:03 +00:00
Lanai [MIR] Print on the given output instead of stderr. 2016-07-13 20:36:03 +00:00
Mips MIRParser: Use shorter cfi identifiers 2016-07-26 18:20:00 +00:00
NVPTX llc: Add support for -run-pass none 2016-07-16 02:24:59 +00:00
PowerPC llc: Add support for -run-pass none 2016-07-16 02:24:59 +00:00
X86 [MIRParser] Accept unsized generic instructions. 2016-07-28 17:15:12 +00:00