Craig Topper c7de3a1018 [AVX512] Remove the intrinsic forms of VMOVSS/VMOVSD. We don't need two different forms of 'rr' and 'rm'. This matches SSE/AVX. ... I'm not convinced the patterns for the rm_Int was correct anyway. It had a tied source that should't exist for the unmasked version. The load form of MOVSS always zeros the most significant bits. I've left the patterns off the masked load instructions as I'm not sure what the correct pattern should be and we don't have any tests currently. Nor do we implement masked scalar load intrinsics in clang currently. llvm-svn: 277098		2016-07-29 02:49:08 +00:00
..
AArch64	[AArch64][GlobalISel] Select G_BR.	2016-07-28 17:15:15 +00:00
AMDGPU	AMDGPU/SI: Don't handle a loop if there is no loop at all for a terminator BB.	2016-07-28 23:01:45 +00:00
ARM	MIRParser: Use shorter cfi identifiers	2016-07-26 18:20:00 +00:00
BPF	[BPF] Remove exit-on-error from tests (PR27768, PR27769)	2016-05-30 08:28:34 +00:00
Generic	Fix build breaks after r277028	2016-07-28 20:25:21 +00:00
Hexagon	[Hexagon] Implement MI-level constant propagation	2016-07-28 20:01:59 +00:00
Inputs	…
Lanai	[lanai] Use peephole optimizer to generate more conditional ALU operations.	2016-07-07 23:36:04 +00:00
MIR	[MIRParser] Accept unsized generic instructions.	2016-07-28 17:15:12 +00:00
MSP430	…
Mips	Revert r276982 and r276984: [mips][fastisel] Handle 0-4 arguments without SelectionDAG	2016-07-28 15:37:42 +00:00
NVPTX	Fix NVPTX/call-with-alloca-buffer.ll after r276777.	2016-07-26 18:28:33 +00:00
PowerPC	Revert "RegScavenging: Add scavengeRegisterBackwards()"	2016-07-20 00:21:32 +00:00
SPARC	VirtRegMap: Replace some identity copies with KILL instructions.	2016-07-09 00:19:07 +00:00
SystemZ	Revert "RegScavenging: Add scavengeRegisterBackwards()"	2016-07-20 00:21:32 +00:00
Thumb	Revert "RegScavenging: Add scavengeRegisterBackwards()"	2016-07-20 00:21:32 +00:00
Thumb2	[Thumb] Reapply r272251 with a fix for PR28348 (mk 2)	2016-07-05 12:37:13 +00:00
WebAssembly	[WebAssembly] Emit type signatures for declared functions	2016-06-03 18:34:36 +00:00
WinEH	Revert EH-specific checks in BranchFolding that were causing blow ups in compile time.	2016-07-27 17:55:33 +00:00
X86	[AVX512] Remove the intrinsic forms of VMOVSS/VMOVSD. We don't need two different forms of 'rr' and 'rm'. This matches SSE/AVX.	2016-07-29 02:49:08 +00:00
XCore	IR: Introduce Module::global_objects().	2016-06-22 20:29:42 +00:00