forked from OSchip/llvm-project
bed587631f
Add `ashr` instruction to the DAG post-dominated by `trunc`, allowing `TruncInstCombine` to reduce bitwidth of expressions containing these instructions. We should be shifting by less than the target bitwidth. Also it is sufficient to require that all truncated bits of the value-to-be-shifted are sign bits (all zeros or ones) and one sign bit is left untruncated: https://alive2.llvm.org/ce/z/Ajo2__ Part of https://reviews.llvm.org/D107766 Differential Revision: https://reviews.llvm.org/D108355 |
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| .. | ||
| funnel.ll | ||
| masked-cmp.ll | ||
| popcount.ll | ||
| pr50555.ll | ||
| rotate.ll | ||
| trunc_ashr.ll | ||
| trunc_const_expr.ll | ||
| trunc_lshr.ll | ||
| trunc_multi_uses.ll | ||
| trunc_select.ll | ||
| trunc_select_cmp.ll | ||
| trunc_shl.ll | ||
| trunc_unreachable_bb.ll | ||