llvm-project/llvm/test
Amara Emerson 0d6a26dffc [GlobalISel][IRTranslator] Split aggregates during IR translation.
We currently handle all aggregates by creating one large LLT, and letting the
legalizer deal with splitting them up. However using this approach means that
we can't support big endian code correctly.

This patch changes the way that the IRTranslator deals with aggregate values,
by splitting them up into their constituent element values. To do this, parts
of the translator need to be modified to deal with multiple VRegs for a single
Value.

A new Value to VReg mapper is introduced to help keep compile time under
control, currently there is no measurable impact on CTMark despite the extra
code being generated in some cases.

Patch is based on the original work of Tim Northover.

Differential Revision: https://reviews.llvm.org/D46018

llvm-svn: 332449
2018-05-16 10:32:02 +00:00
..
Analysis [MemorySSA] Don't sort IDF blocks. 2018-05-15 18:40:29 +00:00
Assembler [DebugInfo] Add DILabel metadata and intrinsic llvm.dbg.label. 2018-05-09 02:40:45 +00:00
Bindings [LLVM-C] Add Bindings For Module Flags 2018-05-14 08:09:00 +00:00
Bitcode [DebugInfo] Add DILabel metadata and intrinsic llvm.dbg.label. 2018-05-09 02:40:45 +00:00
BugPoint
CodeGen [GlobalISel][IRTranslator] Split aggregates during IR translation. 2018-05-16 10:32:02 +00:00
DebugInfo [Debugfiy] Print the pass name next to the result 2018-05-15 23:38:05 +00:00
Examples
ExecutionEngine [RuntimeDyld][MachO] Properly handle thumb to thumb calls within a section. 2018-05-09 01:38:13 +00:00
Feature
FileCheck
Instrumentation [msan] Instrument masked.store, masked.load intrinsics. 2018-05-15 21:28:25 +00:00
Integer
JitListener [DebugInfo] Add DILabel metadata and intrinsic llvm.dbg.label. 2018-05-09 02:40:45 +00:00
LTO [DebugInfo] Add DILabel metadata and intrinsic llvm.dbg.label. 2018-05-09 02:40:45 +00:00
Linker [DebugInfo] Add DILabel metadata and intrinsic llvm.dbg.label. 2018-05-09 02:40:45 +00:00
MC [AArch64][SVE] Asm: Support for structured LD2, LD3 and LD4 (scalar+scalar) load instructions. 2018-05-16 09:16:20 +00:00
Object [WebAsembly] Update default triple in test files to wasm32-unknown-unkown. 2018-05-10 17:49:11 +00:00
ObjectYAML obj2yaml: Correctly round-trip default alignment. 2018-05-04 16:28:41 +00:00
Other [DebugInfo] Add DILabel metadata and intrinsic llvm.dbg.label. 2018-05-09 02:40:45 +00:00
SafepointIRVerifier
SymbolRewriter
TableGen [globalisel] Update GlobalISel emitter to match new representation of extending loads 2018-05-05 20:53:24 +00:00
ThinLTO/X86 [DebugInfo] Add DILabel metadata and intrinsic llvm.dbg.label. 2018-05-09 02:40:45 +00:00
Transforms [ObjCARC] Prevent code motion into a catchswitch 2018-05-16 04:52:18 +00:00
Unit
Verifier [DebugInfo] Add DILabel metadata and intrinsic llvm.dbg.label. 2018-05-09 02:40:45 +00:00
YAMLParser
tools [llvm-mca] Regenerate tests after r332381 and r332361. NFC 2018-05-16 10:12:06 +00:00
.clang-format
CMakeLists.txt [tools] Add missing test dependency 2018-05-07 22:00:59 +00:00
TestRunner.sh
lit.cfg.py [tools] Adjust the lit config for llvm-strip 2018-05-07 21:07:01 +00:00
lit.site.cfg.py.in Remove 'abi-breaking-checks' lit feature. 2018-05-09 12:39:39 +00:00