forked from OSchip/llvm-project
311 lines
9.4 KiB
LLVM
311 lines
9.4 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc -mtriple=aarch64-unknown-linux-gnu < %s | FileCheck %s
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;------------------------------------------------------------------------------;
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; Odd divisors
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;------------------------------------------------------------------------------;
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define i32 @test_srem_odd(i32 %X) nounwind {
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; CHECK-LABEL: test_srem_odd:
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; CHECK: // %bb.0:
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; CHECK-NEXT: mov w8, #26215
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; CHECK-NEXT: movk w8, #26214, lsl #16
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; CHECK-NEXT: smull x8, w0, w8
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; CHECK-NEXT: lsr x9, x8, #63
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; CHECK-NEXT: asr x8, x8, #33
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; CHECK-NEXT: add w8, w8, w9
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; CHECK-NEXT: add w8, w8, w8, lsl #2
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; CHECK-NEXT: cmp w0, w8
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; CHECK-NEXT: cset w0, eq
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; CHECK-NEXT: ret
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%srem = srem i32 %X, 5
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%cmp = icmp eq i32 %srem, 0
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%ret = zext i1 %cmp to i32
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ret i32 %ret
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}
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define i32 @test_srem_odd_25(i32 %X) nounwind {
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; CHECK-LABEL: test_srem_odd_25:
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; CHECK: // %bb.0:
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; CHECK-NEXT: mov w8, #34079
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; CHECK-NEXT: movk w8, #20971, lsl #16
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; CHECK-NEXT: smull x8, w0, w8
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; CHECK-NEXT: lsr x9, x8, #63
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; CHECK-NEXT: asr x8, x8, #35
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; CHECK-NEXT: add w8, w8, w9
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; CHECK-NEXT: mov w9, #25
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; CHECK-NEXT: msub w8, w8, w9, w0
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; CHECK-NEXT: cmp w8, #0 // =0
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; CHECK-NEXT: cset w0, eq
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; CHECK-NEXT: ret
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%srem = srem i32 %X, 25
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%cmp = icmp eq i32 %srem, 0
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%ret = zext i1 %cmp to i32
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ret i32 %ret
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}
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; This is like test_srem_odd, except the divisor has bit 30 set.
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define i32 @test_srem_odd_bit30(i32 %X) nounwind {
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; CHECK-LABEL: test_srem_odd_bit30:
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; CHECK: // %bb.0:
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; CHECK-NEXT: // kill: def $w0 killed $w0 def $x0
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; CHECK-NEXT: sxtw x8, w0
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; CHECK-NEXT: sbfiz x9, x0, #29, #32
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; CHECK-NEXT: sub x8, x9, x8
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; CHECK-NEXT: lsr x9, x8, #63
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; CHECK-NEXT: asr x8, x8, #59
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; CHECK-NEXT: add w8, w8, w9
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; CHECK-NEXT: mov w9, #3
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; CHECK-NEXT: movk w9, #16384, lsl #16
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; CHECK-NEXT: msub w8, w8, w9, w0
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; CHECK-NEXT: cmp w8, #0 // =0
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; CHECK-NEXT: cset w0, eq
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; CHECK-NEXT: ret
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%srem = srem i32 %X, 1073741827
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%cmp = icmp eq i32 %srem, 0
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%ret = zext i1 %cmp to i32
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ret i32 %ret
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}
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; This is like test_srem_odd, except the divisor has bit 31 set.
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define i32 @test_srem_odd_bit31(i32 %X) nounwind {
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; CHECK-LABEL: test_srem_odd_bit31:
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; CHECK: // %bb.0:
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; CHECK-NEXT: // kill: def $w0 killed $w0 def $x0
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; CHECK-NEXT: sxtw x8, w0
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; CHECK-NEXT: add x8, x8, x8, lsl #29
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; CHECK-NEXT: neg x8, x8
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; CHECK-NEXT: lsr x9, x8, #63
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; CHECK-NEXT: asr x8, x8, #60
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; CHECK-NEXT: add w8, w8, w9
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; CHECK-NEXT: mov w9, #-2147483645
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; CHECK-NEXT: msub w8, w8, w9, w0
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; CHECK-NEXT: cmp w8, #0 // =0
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; CHECK-NEXT: cset w0, eq
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; CHECK-NEXT: ret
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%srem = srem i32 %X, 2147483651
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%cmp = icmp eq i32 %srem, 0
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%ret = zext i1 %cmp to i32
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ret i32 %ret
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}
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;------------------------------------------------------------------------------;
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; Even divisors
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;------------------------------------------------------------------------------;
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define i16 @test_srem_even(i16 %X) nounwind {
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; CHECK-LABEL: test_srem_even:
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; CHECK: // %bb.0:
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; CHECK-NEXT: mov w9, #9363
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; CHECK-NEXT: sxth w8, w0
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; CHECK-NEXT: movk w9, #37449, lsl #16
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; CHECK-NEXT: smull x9, w8, w9
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; CHECK-NEXT: lsr x9, x9, #32
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; CHECK-NEXT: add w8, w9, w8
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; CHECK-NEXT: asr w9, w8, #3
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; CHECK-NEXT: add w8, w9, w8, lsr #31
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; CHECK-NEXT: mov w9, #14
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; CHECK-NEXT: msub w8, w8, w9, w0
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; CHECK-NEXT: tst w8, #0xffff
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; CHECK-NEXT: cset w0, ne
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; CHECK-NEXT: ret
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%srem = srem i16 %X, 14
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%cmp = icmp ne i16 %srem, 0
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%ret = zext i1 %cmp to i16
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ret i16 %ret
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}
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define i32 @test_srem_even_100(i32 %X) nounwind {
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; CHECK-LABEL: test_srem_even_100:
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; CHECK: // %bb.0:
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; CHECK-NEXT: mov w8, #34079
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; CHECK-NEXT: movk w8, #20971, lsl #16
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; CHECK-NEXT: smull x8, w0, w8
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; CHECK-NEXT: lsr x9, x8, #63
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; CHECK-NEXT: asr x8, x8, #37
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; CHECK-NEXT: add w8, w8, w9
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; CHECK-NEXT: mov w9, #100
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; CHECK-NEXT: msub w8, w8, w9, w0
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; CHECK-NEXT: cmp w8, #0 // =0
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; CHECK-NEXT: cset w0, eq
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; CHECK-NEXT: ret
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%srem = srem i32 %X, 100
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%cmp = icmp eq i32 %srem, 0
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%ret = zext i1 %cmp to i32
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ret i32 %ret
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}
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; This is like test_srem_even, except the divisor has bit 30 set.
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define i32 @test_srem_even_bit30(i32 %X) nounwind {
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; CHECK-LABEL: test_srem_even_bit30:
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; CHECK: // %bb.0:
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; CHECK-NEXT: mov w8, #65433
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; CHECK-NEXT: movk w8, #16383, lsl #16
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; CHECK-NEXT: smull x8, w0, w8
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; CHECK-NEXT: lsr x9, x8, #63
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; CHECK-NEXT: asr x8, x8, #60
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; CHECK-NEXT: add w8, w8, w9
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; CHECK-NEXT: mov w9, #104
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; CHECK-NEXT: movk w9, #16384, lsl #16
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; CHECK-NEXT: msub w8, w8, w9, w0
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; CHECK-NEXT: cmp w8, #0 // =0
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; CHECK-NEXT: cset w0, eq
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; CHECK-NEXT: ret
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%srem = srem i32 %X, 1073741928
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%cmp = icmp eq i32 %srem, 0
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%ret = zext i1 %cmp to i32
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ret i32 %ret
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}
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; This is like test_srem_odd, except the divisor has bit 31 set.
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define i32 @test_srem_even_bit31(i32 %X) nounwind {
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; CHECK-LABEL: test_srem_even_bit31:
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; CHECK: // %bb.0:
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; CHECK-NEXT: mov w8, #65433
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; CHECK-NEXT: movk w8, #32767, lsl #16
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; CHECK-NEXT: smull x8, w0, w8
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; CHECK-NEXT: lsr x8, x8, #32
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; CHECK-NEXT: sub w8, w8, w0
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; CHECK-NEXT: asr w9, w8, #30
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; CHECK-NEXT: add w8, w9, w8, lsr #31
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; CHECK-NEXT: mov w9, #102
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; CHECK-NEXT: movk w9, #32768, lsl #16
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; CHECK-NEXT: msub w8, w8, w9, w0
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; CHECK-NEXT: cmp w8, #0 // =0
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; CHECK-NEXT: cset w0, eq
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; CHECK-NEXT: ret
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%srem = srem i32 %X, 2147483750
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%cmp = icmp eq i32 %srem, 0
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%ret = zext i1 %cmp to i32
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ret i32 %ret
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}
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;------------------------------------------------------------------------------;
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; Special case
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;------------------------------------------------------------------------------;
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; 'NE' predicate is fine too.
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define i32 @test_srem_odd_setne(i32 %X) nounwind {
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; CHECK-LABEL: test_srem_odd_setne:
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; CHECK: // %bb.0:
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; CHECK-NEXT: mov w8, #26215
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; CHECK-NEXT: movk w8, #26214, lsl #16
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; CHECK-NEXT: smull x8, w0, w8
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; CHECK-NEXT: lsr x9, x8, #63
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; CHECK-NEXT: asr x8, x8, #33
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; CHECK-NEXT: add w8, w8, w9
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; CHECK-NEXT: add w8, w8, w8, lsl #2
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; CHECK-NEXT: cmp w0, w8
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; CHECK-NEXT: cset w0, ne
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; CHECK-NEXT: ret
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%srem = srem i32 %X, 5
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%cmp = icmp ne i32 %srem, 0
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%ret = zext i1 %cmp to i32
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ret i32 %ret
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}
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; The fold is only valid for positive divisors, negative-ones should be negated.
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define i32 @test_srem_negative_odd(i32 %X) nounwind {
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; CHECK-LABEL: test_srem_negative_odd:
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; CHECK: // %bb.0:
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; CHECK-NEXT: mov w8, #-1717986919
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; CHECK-NEXT: smull x8, w0, w8
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; CHECK-NEXT: lsr x9, x8, #63
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; CHECK-NEXT: asr x8, x8, #33
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; CHECK-NEXT: add w8, w8, w9
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; CHECK-NEXT: add w8, w8, w8, lsl #2
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; CHECK-NEXT: cmn w0, w8
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; CHECK-NEXT: cset w0, ne
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; CHECK-NEXT: ret
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%srem = srem i32 %X, -5
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%cmp = icmp ne i32 %srem, 0
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%ret = zext i1 %cmp to i32
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ret i32 %ret
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}
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define i32 @test_srem_negative_even(i32 %X) nounwind {
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; CHECK-LABEL: test_srem_negative_even:
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; CHECK: // %bb.0:
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; CHECK-NEXT: mov w8, #56173
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; CHECK-NEXT: movk w8, #28086, lsl #16
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; CHECK-NEXT: smull x8, w0, w8
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; CHECK-NEXT: lsr x8, x8, #32
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; CHECK-NEXT: sub w8, w8, w0
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; CHECK-NEXT: asr w9, w8, #3
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; CHECK-NEXT: add w8, w9, w8, lsr #31
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; CHECK-NEXT: mov w9, #-14
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; CHECK-NEXT: msub w8, w8, w9, w0
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; CHECK-NEXT: cmp w8, #0 // =0
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; CHECK-NEXT: cset w0, ne
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; CHECK-NEXT: ret
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%srem = srem i32 %X, -14
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%cmp = icmp ne i32 %srem, 0
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%ret = zext i1 %cmp to i32
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ret i32 %ret
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}
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;------------------------------------------------------------------------------;
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; Negative tests
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;------------------------------------------------------------------------------;
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; We can lower remainder of division by one much better elsewhere.
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define i32 @test_srem_one(i32 %X) nounwind {
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; CHECK-LABEL: test_srem_one:
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; CHECK: // %bb.0:
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; CHECK-NEXT: mov w0, #1
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; CHECK-NEXT: ret
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%srem = srem i32 %X, 1
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%cmp = icmp eq i32 %srem, 0
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%ret = zext i1 %cmp to i32
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ret i32 %ret
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}
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; We can lower remainder of division by powers of two much better elsewhere.
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define i32 @test_srem_pow2(i32 %X) nounwind {
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; CHECK-LABEL: test_srem_pow2:
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; CHECK: // %bb.0:
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; CHECK-NEXT: add w8, w0, #15 // =15
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; CHECK-NEXT: cmp w0, #0 // =0
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; CHECK-NEXT: csel w8, w8, w0, lt
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; CHECK-NEXT: and w8, w8, #0xfffffff0
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; CHECK-NEXT: cmp w0, w8
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; CHECK-NEXT: cset w0, eq
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; CHECK-NEXT: ret
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%srem = srem i32 %X, 16
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%cmp = icmp eq i32 %srem, 0
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%ret = zext i1 %cmp to i32
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ret i32 %ret
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}
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; The fold is only valid for positive divisors, and we can't negate INT_MIN.
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define i32 @test_srem_int_min(i32 %X) nounwind {
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; CHECK-LABEL: test_srem_int_min:
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; CHECK: // %bb.0:
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; CHECK-NEXT: mov w8, #2147483647
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; CHECK-NEXT: add w8, w0, w8
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; CHECK-NEXT: cmp w0, #0 // =0
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; CHECK-NEXT: csel w8, w8, w0, lt
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; CHECK-NEXT: and w8, w8, #0x80000000
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; CHECK-NEXT: cmn w0, w8
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; CHECK-NEXT: cset w0, eq
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; CHECK-NEXT: ret
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%srem = srem i32 %X, 2147483648
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%cmp = icmp eq i32 %srem, 0
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%ret = zext i1 %cmp to i32
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ret i32 %ret
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}
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; We can lower remainder of division by all-ones much better elsewhere.
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define i32 @test_srem_allones(i32 %X) nounwind {
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; CHECK-LABEL: test_srem_allones:
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; CHECK: // %bb.0:
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; CHECK-NEXT: cmp w0, #0 // =0
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; CHECK-NEXT: csel w8, w0, w0, lt
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; CHECK-NEXT: cmp w0, w8
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; CHECK-NEXT: cset w0, eq
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; CHECK-NEXT: ret
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%srem = srem i32 %X, 4294967295
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%cmp = icmp eq i32 %srem, 0
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%ret = zext i1 %cmp to i32
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ret i32 %ret
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}
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