forked from OSchip/llvm-project
153 lines
4.2 KiB
LLVM
153 lines
4.2 KiB
LLVM
; RUN: llc -mtriple=aarch64-apple-ios7.0 -o - %s | FileCheck %s
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define i32 @test_return(i32* %p, i32 %oldval, i32 %newval) {
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; CHECK-LABEL: test_return:
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; CHECK: [[LOOP:LBB[0-9]+_[0-9]+]]:
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; CHECK: ldaxr [[LOADED:w[0-9]+]], [x0]
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; CHECK: cmp [[LOADED]], w1
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; CHECK: b.ne [[FAILED:LBB[0-9]+_[0-9]+]]
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; CHECK: stlxr [[STATUS:w[0-9]+]], {{w[0-9]+}}, [x0]
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; CHECK: cbnz [[STATUS]], [[LOOP]]
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; CHECK-NOT: cmp {{w[0-9]+}}, {{w[0-9]+}}
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; CHECK: mov w0, #1
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; CHECK: ret
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; CHECK: [[FAILED]]:
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; CHECK-NOT: cmp {{w[0-9]+}}, {{w[0-9]+}}
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; CHECK: mov w0, wzr
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; CHECK: ret
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%pair = cmpxchg i32* %p, i32 %oldval, i32 %newval seq_cst seq_cst
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%success = extractvalue { i32, i1 } %pair, 1
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%conv = zext i1 %success to i32
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ret i32 %conv
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}
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define i1 @test_return_bool(i8* %value, i8 %oldValue, i8 %newValue) {
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; CHECK-LABEL: test_return_bool:
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; CHECK: [[LOOP:LBB[0-9]+_[0-9]+]]:
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; CHECK: ldaxrb [[LOADED:w[0-9]+]], [x0]
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; CHECK: cmp [[LOADED]], w1, uxtb
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; CHECK: b.ne [[FAILED:LBB[0-9]+_[0-9]+]]
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; CHECK: stlxrb [[STATUS:w[0-9]+]], {{w[0-9]+}}, [x0]
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; CHECK: cbnz [[STATUS]], [[LOOP]]
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; CHECK-NOT: cmp {{w[0-9]+}}, {{w[0-9]+}}
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; FIXME: DAG combine should be able to deal with this.
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; CHECK: mov [[TMP:w[0-9]+]], #1
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; CHECK: eor w0, [[TMP]], #0x1
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; CHECK: ret
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; CHECK: [[FAILED]]:
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; CHECK-NOT: cmp {{w[0-9]+}}, {{w[0-9]+}}
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; CHECK: eor w0, wzr, #0x1
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; CHECK: ret
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%pair = cmpxchg i8* %value, i8 %oldValue, i8 %newValue acq_rel monotonic
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%success = extractvalue { i8, i1 } %pair, 1
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%failure = xor i1 %success, 1
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ret i1 %failure
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}
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define void @test_conditional(i32* %p, i32 %oldval, i32 %newval) {
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; CHECK-LABEL: test_conditional:
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; CHECK: [[LOOP:LBB[0-9]+_[0-9]+]]:
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; CHECK: ldaxr [[LOADED:w[0-9]+]], [x0]
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; CHECK: cmp [[LOADED]], w1
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; CHECK: b.ne [[FAILED:LBB[0-9]+_[0-9]+]]
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; CHECK: stlxr [[STATUS:w[0-9]+]], w2, [x0]
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; CHECK: cbnz [[STATUS]], [[LOOP]]
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; CHECK-NOT: cmp {{w[0-9]+}}, {{w[0-9]+}}
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; CHECK: b _bar
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; CHECK: [[FAILED]]:
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; CHECK-NOT: cmp {{w[0-9]+}}, {{w[0-9]+}}
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; CHECK: b _baz
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%pair = cmpxchg i32* %p, i32 %oldval, i32 %newval seq_cst seq_cst
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%success = extractvalue { i32, i1 } %pair, 1
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br i1 %success, label %true, label %false
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true:
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tail call void @bar() #2
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br label %end
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false:
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tail call void @baz() #2
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br label %end
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end:
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ret void
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}
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declare void @bar()
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declare void @baz()
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define i1 @test_conditional2(i32 %a, i32 %b, i32* %c) {
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; CHECK-LABEL: test_conditional2:
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; CHECK: [[LOOP:LBB[0-9]+_[0-9]+]]:
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; CHECK: ldaxr [[LOADED:w[0-9]+]], [x19]
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; CHECK: cmp [[LOADED]], w21
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; CHECK: b.ne [[FAILED:LBB[0-9]+_[0-9]+]]
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; CHECK: stlxr [[STATUS:w[0-9]+]], w20, [x19]
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; CHECK: cbnz [[STATUS]], [[LOOP]]
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; CHECK: mov [[STATUS]], #1
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; CHECK: b [[PH:LBB[0-9]+_[0-9]+]]
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; CHECK: [[FAILED]]:
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; CHECK-NOT: cmp {{w[0-9]+}}, {{w[0-9]+}}
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; verify the preheader is simplified by simplifycfg.
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; CHECK: [[PH]]:
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; CHECK: mov w22, #2
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; CHECK-NOT: mov w22, #4
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; CHECK-NOT: cmn w22, #4
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; CHECK: b [[LOOP2:LBB[0-9]+_[0-9]+]]
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; CHECK-NOT: b.ne [[LOOP2]]
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; CHECK-NOT: b {{LBB[0-9]+_[0-9]+}}
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; CHECK: bl _foo
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entry:
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%pair = cmpxchg i32* %c, i32 %a, i32 %b seq_cst seq_cst
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%success = extractvalue { i32, i1 } %pair, 1
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br label %for.cond
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for.cond: ; preds = %if.end, %entry
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%i.0 = phi i32 [ 2, %entry ], [ %dec, %if.end ]
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%changed.0.off0 = phi i1 [ %success, %entry ], [ %changed.1.off0, %if.end ]
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%dec = add nsw i32 %i.0, -1
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%tobool = icmp eq i32 %i.0, 0
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br i1 %tobool, label %for.cond.cleanup, label %for.body
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for.cond.cleanup: ; preds = %for.cond
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%changed.0.off0.lcssa = phi i1 [ %changed.0.off0, %for.cond ]
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ret i1 %changed.0.off0.lcssa
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for.body: ; preds = %for.cond
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%or = or i32 %a, %b
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%idxprom = sext i32 %dec to i64
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%arrayidx = getelementptr inbounds i32, i32* %c, i64 %idxprom
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%0 = load i32, i32* %arrayidx, align 4
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%cmp = icmp eq i32 %or, %0
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br i1 %cmp, label %if.end, label %if.then
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if.then: ; preds = %for.body
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store i32 %or, i32* %arrayidx, align 4
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tail call void @foo()
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br label %if.end
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if.end: ; preds = %for.body, %if.then
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%changed.1.off0 = phi i1 [ false, %if.then ], [ %changed.0.off0, %for.body ]
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br label %for.cond
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}
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declare void @foo()
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