forked from OSchip/llvm-project
135 lines
3.6 KiB
YAML
135 lines
3.6 KiB
YAML
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
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# RUN: llc -mtriple aarch64-unknown-unknown -run-pass=regbankselect -verify-machineinstrs %s -o - | FileCheck %s
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---
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name: shl_cimm_32
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legalized: true
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tracksRegLiveness: true
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body: |
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bb.1:
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liveins: $w0
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; CHECK-LABEL: name: shl_cimm_32
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; CHECK: liveins: $w0
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; CHECK: [[COPY:%[0-9]+]]:gpr(s32) = COPY $w0
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; CHECK: [[C:%[0-9]+]]:gpr(s32) = G_CONSTANT i32 8
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; CHECK: [[SHL:%[0-9]+]]:gpr(s32) = G_SHL [[COPY]], [[C]](s32)
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; CHECK: $w0 = COPY [[SHL]](s32)
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; CHECK: RET_ReallyLR implicit $w0
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%0:_(s32) = COPY $w0
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%1:_(s32) = G_CONSTANT i32 8
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%2:_(s32) = G_SHL %0, %1(s32)
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$w0 = COPY %2(s32)
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RET_ReallyLR implicit $w0
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...
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---
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name: shl_cimm_64
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legalized: true
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tracksRegLiveness: true
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body: |
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bb.1:
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liveins: $x0
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; CHECK-LABEL: name: shl_cimm_64
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; CHECK: liveins: $x0
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; CHECK: [[COPY:%[0-9]+]]:gpr(s64) = COPY $x0
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; CHECK: [[C:%[0-9]+]]:gpr(s64) = G_CONSTANT i64 8
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; CHECK: [[SHL:%[0-9]+]]:gpr(s64) = G_SHL [[COPY]], [[C]](s64)
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; CHECK: $x0 = COPY [[SHL]](s64)
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; CHECK: RET_ReallyLR implicit $x0
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%0:_(s64) = COPY $x0
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%1:_(s64) = G_CONSTANT i64 8
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%2:_(s64) = G_SHL %0, %1(s64)
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$x0 = COPY %2(s64)
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RET_ReallyLR implicit $x0
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...
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---
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name: lshr_cimm_32
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legalized: true
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tracksRegLiveness: true
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body: |
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bb.1:
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liveins: $w0
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; CHECK-LABEL: name: lshr_cimm_32
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; CHECK: liveins: $w0
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; CHECK: [[COPY:%[0-9]+]]:gpr(s32) = COPY $w0
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; CHECK: [[C:%[0-9]+]]:gpr(s64) = G_CONSTANT i64 8
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; CHECK: [[LSHR:%[0-9]+]]:gpr(s32) = G_LSHR [[COPY]], [[C]](s64)
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; CHECK: $w0 = COPY [[LSHR]](s32)
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; CHECK: RET_ReallyLR implicit $w0
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%0:_(s32) = COPY $w0
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%3:_(s64) = G_CONSTANT i64 8
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%2:_(s32) = G_LSHR %0, %3(s64)
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$w0 = COPY %2(s32)
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RET_ReallyLR implicit $w0
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...
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---
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name: lshr_cimm_64
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legalized: true
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tracksRegLiveness: true
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body: |
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bb.1:
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liveins: $x0
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; CHECK-LABEL: name: lshr_cimm_64
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; CHECK: liveins: $x0
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; CHECK: [[COPY:%[0-9]+]]:gpr(s64) = COPY $x0
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; CHECK: [[C:%[0-9]+]]:gpr(s64) = G_CONSTANT i64 8
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; CHECK: [[LSHR:%[0-9]+]]:gpr(s64) = G_LSHR [[COPY]], [[C]](s64)
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; CHECK: $x0 = COPY [[LSHR]](s64)
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; CHECK: RET_ReallyLR implicit $x0
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%0:_(s64) = COPY $x0
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%1:_(s64) = G_CONSTANT i64 8
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%2:_(s64) = G_LSHR %0, %1(s64)
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$x0 = COPY %2(s64)
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RET_ReallyLR implicit $x0
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...
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---
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name: ashr_cimm_32
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legalized: true
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tracksRegLiveness: true
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body: |
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bb.1:
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liveins: $w0
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; CHECK-LABEL: name: ashr_cimm_32
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; CHECK: liveins: $w0
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; CHECK: [[COPY:%[0-9]+]]:gpr(s32) = COPY $w0
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; CHECK: [[C:%[0-9]+]]:gpr(s64) = G_CONSTANT i64 8
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; CHECK: [[ASHR:%[0-9]+]]:gpr(s32) = G_ASHR [[COPY]], [[C]](s64)
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; CHECK: $w0 = COPY [[ASHR]](s32)
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; CHECK: RET_ReallyLR implicit $w0
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%0:_(s32) = COPY $w0
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%3:_(s64) = G_CONSTANT i64 8
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%2:_(s32) = G_ASHR %0, %3(s64)
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$w0 = COPY %2(s32)
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RET_ReallyLR implicit $w0
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...
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---
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name: ashr_cimm_64
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legalized: true
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tracksRegLiveness: true
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body: |
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bb.1:
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liveins: $x0
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; CHECK-LABEL: name: ashr_cimm_64
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; CHECK: liveins: $x0
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; CHECK: [[COPY:%[0-9]+]]:gpr(s64) = COPY $x0
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; CHECK: [[C:%[0-9]+]]:gpr(s64) = G_CONSTANT i64 8
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; CHECK: [[ASHR:%[0-9]+]]:gpr(s64) = G_ASHR [[COPY]], [[C]](s64)
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; CHECK: $x0 = COPY [[ASHR]](s64)
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; CHECK: RET_ReallyLR implicit $x0
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%0:_(s64) = COPY $x0
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%1:_(s64) = G_CONSTANT i64 8
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%2:_(s64) = G_ASHR %0, %1(s64)
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$x0 = COPY %2(s64)
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RET_ReallyLR implicit $x0
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...
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