forked from OSchip/llvm-project
310 lines
10 KiB
YAML
310 lines
10 KiB
YAML
# RUN: llc -O0 -run-pass=aarch64-prelegalizer-combiner -global-isel %s -o - | FileCheck %s
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# RUN: llc -O0 -run-pass=aarch64-prelegalizer-combiner -global-isel %s -o - \
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# RUN: -debug-only=aarch64-prelegalizer-combiner,gi-combiner 2>&1 >/dev/null \
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# RUN: | FileCheck %s --check-prefix=CHECK-WORKLIST
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# REQUIRES: asserts
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--- |
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target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128"
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target triple = "aarch64--"
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define void @multiple_copies(i8* %addr) {
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entry:
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br i1 0, label %if, label %else
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if:
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br label %exit
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else:
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br label %exit
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exit:
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ret void
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}
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define void @sink_to_phi_trivially_dominating(i8* %addr) {
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entry:
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br i1 0, label %if, label %exit
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if:
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br label %exit
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exit:
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ret void
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}
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define void @sink_to_phi_nondominating(i8* %addr) {
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entry:
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br i1 0, label %if, label %else
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if:
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br label %exit
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else:
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br label %exit
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exit:
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ret void
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}
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define void @sink_to_phi_emptyblock(i8* %addr) {
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entry:
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br i1 0, label %if, label %else
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if:
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br label %exit
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else:
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br label %else2
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else2:
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br label %exit
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exit:
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ret void
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}
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define void @use_doesnt_def_anything(i8* %addr) {
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entry:
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ret void
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}
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define void @op0_isnt_a_reg(i8* %addr) {
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entry:
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ret void
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}
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...
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---
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name: multiple_copies
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# CHECK-LABEL: name: multiple_copies
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tracksRegLiveness: true
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body: |
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bb.0.entry:
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liveins: $x0, $w1
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successors: %bb.1(0x40000000), %bb.2(0x40000000); %bb.1(50.00%), %bb.2(50.00%)
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; CHECK: [[T0:%[0-9]+]]:_(s32) = G_SEXTLOAD
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%0:_(p0) = COPY $x0
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%1:_(s32) = COPY $w1
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%2:_(s8) = G_LOAD %0 :: (load 1 from %ir.addr)
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%3:_(s32) = G_SEXT %2
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%4:_(s32) = G_CONSTANT i32 1
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%5:_(s1) = G_ICMP intpred(ne), %1:_(s32), %4:_
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G_BRCOND %5:_(s1), %bb.1
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G_BR %bb.2.else
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bb.1.if:
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; CHECK: bb.1.if:
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successors: %bb.3(0x80000000)
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%10:_(s8) = G_CONSTANT i8 1
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; CHECK: [[T1:%[0-9]+]]:_(s8) = G_TRUNC [[T0]](s32)
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%6:_(s8) = G_ADD %2, %10
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; CHECK: [[T2:%[0-9]+]]:_(s8) = G_ADD [[T1]], {{.*}}
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G_BR %bb.3.exit
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bb.2.else:
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; CHECK: bb.2.else:
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successors: %bb.3(0x80000000)
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%11:_(s8) = G_CONSTANT i8 1
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; CHECK: [[T3:%[0-9]+]]:_(s8) = G_TRUNC [[T0]](s32)
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%7:_(s8) = G_SUB %2, %11
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; CHECK: [[T4:%[0-9]+]]:_(s8) = G_SUB [[T3]], {{.*}}
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G_BR %bb.3.exit
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bb.3.exit:
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; CHECK: bb.3.exit:
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%8:_(s8) = G_PHI %6:_(s8), %bb.1, %7:_(s8), %bb.2
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; CHECK: [[T5:%[0-9]+]]:_(s8) = G_PHI [[T2]](s8), %bb.1, [[T4]](s8)
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%9:_(s32) = G_ZEXT %8
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; CHECK: [[T6:%[0-9]+]]:_(s32) = G_ZEXT [[T5]](s8)
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; CHECK: $w0 = COPY [[T0]](s32)
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; CHECK: $w1 = COPY [[T6]](s32)
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$w0 = COPY %3
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$w1 = COPY %9
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# Check that we report the correct modifications to the observer. This acts as
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# a test of the debug output and a test.
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#
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# CHECK-WORKLIST-LABEL: Generic MI Combiner for: multiple_copies
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# CHECK-WORKLIST: Try combining [[IN0:%[0-9]+]]:_(s8) = G_LOAD [[IN1:%[0-9]+]]:_(p0) :: (load 1 from %ir.addr)
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# CHECK-WORKLIST: Preferred use is: [[IN2:%[0-9]+]]:_(s32) = G_SEXT [[IN0]]:_(s8)
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# CHECK-WORKLIST-DAG: Changing: [[IN0]]:_(s8) = G_LOAD [[IN1]]:_(p0) :: (load 1 from %ir.addr)
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# CHECK-WORKLIST-DAG: Changing: [[IN3:%[0-9]+]]:_(s8) = G_ADD [[IN0]]:_, [[IN4:%[0-9]+]]:_
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# CHECK-WORKLIST-DAG: Changed: [[IN3]]:_(s8) = G_ADD [[NEW1:%[0-9]+]]:_, [[IN4]]:_
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# CHECK-WORKLIST-DAG: Changing: [[IN5:%[0-9]+]]:_(s8) = G_SUB [[IN0]]:_, [[IN6:%[0-9]+]]:_
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# CHECK-WORKLIST-DAG: Changed: [[IN5]]:_(s8) = G_SUB [[NEW2:%[0-9]+]]:_, [[IN6]]:_
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# CHECK-WORKLIST-DAG: Erasing: [[IN2]]:_(s32) = G_SEXT [[IN0]]:_(s8)
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# CHECK-WORKLIST-DAG: Changed: [[IN2]]:_(s32) = G_SEXTLOAD [[IN1]]:_(p0) :: (load 1 from %ir.addr)
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# CHECK-WORKLIST-DAG: Created: [[NEW1]]:_(s8) = G_TRUNC [[IN2]]:_(s32)
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# CHECK-WORKLIST-DAG: Created: [[NEW2]]:_(s8) = G_TRUNC [[IN2]]:_(s32)
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# CHECK-WORKLIST: Try combining
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...
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---
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name: sink_to_phi_trivially_dominating
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# CHECK-LABEL: name: sink_to_phi_trivially_dominating
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# This test currently tests that we don't sink if we would sink to a phi. This
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# is needed to avoid inserting into the middle of the leading G_PHI instructions
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# of a BB
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tracksRegLiveness: true
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body: |
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bb.0.entry:
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liveins: $x0, $w1
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successors: %bb.1(0x40000000), %bb.2(0x40000000); %bb.1(50.00%), %bb.2(50.00%)
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; CHECK: [[T0:%[0-9]+]]:_(s32) = G_SEXTLOAD
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%0:_(p0) = COPY $x0
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%1:_(s32) = COPY $w1
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%2:_(s8) = G_LOAD %0 :: (load 1 from %ir.addr)
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; CHECK: [[T4:%[0-9]+]]:_(s8) = G_TRUNC [[T0]](s32)
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%3:_(s32) = G_SEXT %2
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%4:_(s32) = G_CONSTANT i32 1
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%5:_(s1) = G_ICMP intpred(ne), %1:_(s32), %4:_
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G_BRCOND %5:_(s1), %bb.1
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G_BR %bb.2.exit
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bb.1.if:
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; CHECK: bb.1.if:
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successors: %bb.2(0x80000000)
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%10:_(s8) = G_CONSTANT i8 1
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; CHECK: [[T1:%[0-9]+]]:_(s8) = G_TRUNC [[T0]](s32)
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%6:_(s8) = G_ADD %2, %10
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; CHECK: [[T2:%[0-9]+]]:_(s8) = G_ADD [[T1]], {{.*}}
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G_BR %bb.2.exit
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bb.2.exit:
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; CHECK: bb.2.exit:
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%8:_(s8) = G_PHI %6:_(s8), %bb.1, %2:_(s8), %bb.0
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; CHECK: [[T5:%[0-9]+]]:_(s8) = G_PHI [[T2]](s8), %bb.1, [[T4]](s8)
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%9:_(s32) = G_ZEXT %8
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; CHECK: [[T6:%[0-9]+]]:_(s32) = G_ZEXT [[T5]](s8)
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; CHECK: $w0 = COPY [[T0]](s32)
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; CHECK: $w1 = COPY [[T6]](s32)
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$w0 = COPY %3
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$w1 = COPY %9
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...
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---
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name: sink_to_phi_nondominating
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# CHECK-LABEL: name: sink_to_phi_nondominating
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tracksRegLiveness: true
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body: |
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bb.0.entry:
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liveins: $x0, $w1
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successors: %bb.1(0x40000000), %bb.2(0x40000000); %bb.1(50.00%), %bb.2(50.00%)
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; CHECK: [[T0:%[0-9]+]]:_(s32) = G_SEXTLOAD
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%0:_(p0) = COPY $x0
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%1:_(s32) = COPY $w1
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%2:_(s8) = G_LOAD %0 :: (load 1 from %ir.addr)
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%3:_(s32) = G_CONSTANT i32 1
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%4:_(s1) = G_ICMP intpred(ne), %1:_(s32), %3:_
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G_BRCOND %4:_(s1), %bb.1
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G_BR %bb.2.else
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bb.1.if:
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; CHECK: bb.1.if:
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successors: %bb.3(0x80000000)
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%5:_(s8) = G_CONSTANT i8 1
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; CHECK: [[T1:%[0-9]+]]:_(s8) = G_TRUNC [[T0]](s32)
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%6:_(s8) = G_ADD %2, %5
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; CHECK: [[T2:%[0-9]+]]:_(s8) = G_ADD [[T1]], {{.*}}
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G_BR %bb.3.exit
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bb.2.else:
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; CHECK: bb.2.else:
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successors: %bb.3(0x80000000)
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%7:_(s8) = G_CONSTANT i8 1
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; CHECK: [[T3:%[0-9]+]]:_(s8) = G_TRUNC [[T0]](s32)
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%8:_(s8) = G_SUB %2, %7
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; CHECK: [[T4:%[0-9]+]]:_(s8) = G_SUB [[T3]], {{.*}}
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G_BR %bb.3.exit
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bb.3.exit:
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; CHECK: bb.3.exit:
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%9:_(s8) = G_PHI %6:_(s8), %bb.1, %8:_(s8), %bb.2
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; CHECK: [[T5:%[0-9]+]]:_(s8) = G_PHI [[T2]](s8), %bb.1, [[T4]](s8)
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%10:_(s32) = G_SEXT %2
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%11:_(s32) = G_ZEXT %9
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; CHECK: [[T6:%[0-9]+]]:_(s32) = G_ZEXT [[T5]](s8)
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; CHECK: $w0 = COPY [[T0]](s32)
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; CHECK: $w1 = COPY [[T6]](s32)
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$w0 = COPY %10
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$w1 = COPY %11
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# CHECK-WORKLIST-LABEL: Generic MI Combiner for: sink_to_phi_nondominating
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# CHECK-WORKLIST: Try combining [[IN0:%[0-9]+]]:_(s8) = G_LOAD [[IN1:%[0-9]+]]:_(p0) :: (load 1 from %ir.addr)
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# CHECK-WORKLIST: Preferred use is: [[IN2:%[0-9]+]]:_(s32) = G_SEXT [[IN0]]:_(s8)
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# CHECK-WORKLIST-DAG: Changing: [[IN0]]:_(s8) = G_LOAD [[IN1]]:_(p0) :: (load 1 from %ir.addr)
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# CHECK-WORKLIST-DAG: Creating: G_TRUNC
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# CHECK-WORKLIST-DAG: Changing: [[IN3:%[0-9]+]]:_(s8) = G_ADD [[IN0]]:_, [[IN4:%[0-9]+]]:_
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# CHECK-WORKLIST-DAG: Changed: [[IN3]]:_(s8) = G_ADD [[OUT1:%[0-9]+]]:_, [[IN4]]:_
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# CHECK-WORKLIST-DAG: Creating: G_TRUNC
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# CHECK-WORKLIST-DAG: Changing: [[IN5:%[0-9]+]]:_(s8) = G_SUB [[IN0]]:_, [[IN6:%[0-9]+]]:_
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# CHECK-WORKLIST-DAG: Changed: [[IN5]]:_(s8) = G_SUB [[OUT2:%[0-9]+]]:_, [[IN6]]:_
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# CHECK-WORKLIST-DAG: Erasing: [[IN2]]:_(s32) = G_SEXT [[IN0]]:_(s8)
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# CHECK-WORKLIST-DAG: Changed: [[IN2]]:_(s32) = G_SEXTLOAD [[IN1]]:_(p0) :: (load 1 from %ir.addr)
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# CHECK-WORKLIST-DAG: Created: [[OUT1]]:_(s8) = G_TRUNC [[IN2]]:_(s32)
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# CHECK-WORKLIST-DAG: Created: [[OUT2]]:_(s8) = G_TRUNC [[IN2]]:_(s32)
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# CHECK-WORKLIST: Try combining
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...
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---
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name: sink_to_phi_emptyblock
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# CHECK-LABEL: name: sink_to_phi_emptyblock
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tracksRegLiveness: true
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body: |
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bb.0.entry:
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liveins: $x0, $w1
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successors: %bb.1(0x40000000), %bb.2(0x40000000); %bb.1(50.00%), %bb.2(50.00%)
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; CHECK: [[T0:%[0-9]+]]:_(s32) = G_SEXTLOAD
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%0:_(p0) = COPY $x0
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%1:_(s32) = COPY $w1
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%2:_(s8) = G_LOAD %0 :: (load 1 from %ir.addr)
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%3:_(s32) = G_SEXT %2
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%4:_(s32) = G_CONSTANT i32 1
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%5:_(s1) = G_ICMP intpred(ne), %1:_(s32), %4:_
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G_BRCOND %5:_(s1), %bb.1
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G_BR %bb.2.else
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bb.1.if:
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; CHECK: bb.1.if:
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successors: %bb.4(0x80000000)
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%10:_(s8) = G_CONSTANT i8 1
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; CHECK: [[T1:%[0-9]+]]:_(s8) = G_TRUNC [[T0]](s32)
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%6:_(s8) = G_ADD %2, %10
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; CHECK: [[T2:%[0-9]+]]:_(s8) = G_ADD [[T1]], {{.*}}
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G_BR %bb.4.exit
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bb.2.else:
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; CHECK: bb.2.else:
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successors: %bb.3(0x80000000)
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G_BR %bb.3.else2
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bb.3.else2:
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; CHECK: bb.3.else2:
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successors: %bb.4(0x80000000)
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; CHECK: [[T4:%[0-9]+]]:_(s8) = G_TRUNC [[T0]](s32)
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; Fallthrough
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bb.4.exit:
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; CHECK: bb.4.exit:
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%8:_(s8) = G_PHI %6:_(s8), %bb.1, %2:_(s8), %bb.3
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; CHECK: [[T5:%[0-9]+]]:_(s8) = G_PHI [[T2]](s8), %bb.1, [[T4]](s8)
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%9:_(s32) = G_ZEXT %8
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; CHECK: [[T6:%[0-9]+]]:_(s32) = G_ZEXT [[T5]](s8)
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; CHECK: $w0 = COPY [[T0]](s32)
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; CHECK: $w1 = COPY [[T6]](s32)
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$w0 = COPY %3
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$w1 = COPY %9
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...
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---
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name: use_doesnt_def_anything
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# CHECK-LABEL: name: use_doesnt_def_anything
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# Check that we don't crash when inspecting a use that doesn't define anything.
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# The real issue which was that the combine rule was looking through
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# non-truncates as if they were truncates and attempting to obtain the result
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# register. It would usually go on to make the right overall decision anyway but
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# would sometimes crash on things like (SOME_INTRINSIC imm). This test covers
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# the case that it would recover from.
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tracksRegLiveness: true
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body: |
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bb.0.entry:
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liveins: $x0, $w1
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%0:_(p0) = COPY $x0
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%1:_(s8) = G_LOAD %0 :: (load 1 from %ir.addr)
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; CHECK: %1:_(s8) = G_LOAD %0(p0) :: (load 1 from %ir.addr)
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G_STORE %1(s8), %0(p0) :: (store 1 into %ir.addr)
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; CHECK: G_STORE %1(s8), %0(p0) :: (store 1 into %ir.addr)
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...
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---
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name: op0_isnt_a_reg
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# CHECK-LABEL: name: op0_isnt_a_reg
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# This test covers the variant of use_doesnt_def_anything that would crash.
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tracksRegLiveness: true
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body: |
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bb.0.entry:
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liveins: $x0, $w1
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%0:_(p0) = COPY $x0
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%1:_(s8) = G_LOAD %0 :: (load 1 from %ir.addr)
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; CHECK: %1:_(s8) = G_LOAD %0(p0) :: (load 1 from %ir.addr)
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G_INTRINSIC_W_SIDE_EFFECTS intrinsic(@llvm.aarch64.hint), %1(s8)
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; CHECK: G_INTRINSIC_W_SIDE_EFFECTS intrinsic(@llvm.aarch64.hint), %1(s8)
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...
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