forked from OSchip/llvm-project
372 lines
12 KiB
YAML
372 lines
12 KiB
YAML
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
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# RUN: llc -O0 -march=aarch64 -run-pass=legalizer %s -o - | FileCheck %s
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---
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name: test_ext
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body: |
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bb.0.entry:
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; CHECK-LABEL: name: test_ext
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; CHECK: [[COPY:%[0-9]+]]:_(s64) = COPY $x0
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; CHECK: [[TRUNC:%[0-9]+]]:_(s32) = G_TRUNC [[COPY]](s64)
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; CHECK: $w0 = COPY [[TRUNC]](s32)
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; CHECK: [[TRUNC1:%[0-9]+]]:_(s32) = G_TRUNC [[COPY]](s64)
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; CHECK: $w0 = COPY [[TRUNC1]](s32)
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; CHECK: [[TRUNC2:%[0-9]+]]:_(s32) = G_TRUNC [[COPY]](s64)
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; CHECK: $w0 = COPY [[TRUNC2]](s32)
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; CHECK: [[TRUNC3:%[0-9]+]]:_(s32) = G_TRUNC [[COPY]](s64)
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; CHECK: $w0 = COPY [[TRUNC3]](s32)
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; CHECK: [[COPY1:%[0-9]+]]:_(s64) = COPY [[COPY]](s64)
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; CHECK: $x0 = COPY [[COPY1]](s64)
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; CHECK: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 255
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; CHECK: [[COPY2:%[0-9]+]]:_(s64) = COPY [[COPY]](s64)
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; CHECK: [[AND:%[0-9]+]]:_(s64) = G_AND [[COPY2]], [[C]]
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; CHECK: $x0 = COPY [[AND]](s64)
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; CHECK: [[COPY3:%[0-9]+]]:_(s64) = COPY [[COPY]](s64)
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; CHECK: $x0 = COPY [[COPY3]](s64)
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; CHECK: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 32
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; CHECK: [[COPY4:%[0-9]+]]:_(s64) = COPY [[COPY]](s64)
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; CHECK: [[SHL:%[0-9]+]]:_(s64) = G_SHL [[COPY4]], [[C1]](s64)
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; CHECK: [[ASHR:%[0-9]+]]:_(s64) = G_ASHR [[SHL]], [[C1]](s64)
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; CHECK: $x0 = COPY [[ASHR]](s64)
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; CHECK: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 31
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; CHECK: [[TRUNC4:%[0-9]+]]:_(s32) = G_TRUNC [[COPY]](s64)
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; CHECK: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[TRUNC4]], [[C2]](s32)
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; CHECK: [[C3:%[0-9]+]]:_(s64) = G_CONSTANT i64 31
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; CHECK: [[ASHR1:%[0-9]+]]:_(s32) = G_ASHR [[SHL1]], [[C3]](s64)
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; CHECK: $w0 = COPY [[ASHR1]](s32)
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; CHECK: [[C4:%[0-9]+]]:_(s32) = G_CONSTANT i32 255
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; CHECK: [[TRUNC5:%[0-9]+]]:_(s32) = G_TRUNC [[COPY]](s64)
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; CHECK: [[AND1:%[0-9]+]]:_(s32) = G_AND [[TRUNC5]], [[C4]]
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; CHECK: $w0 = COPY [[AND1]](s32)
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; CHECK: [[TRUNC6:%[0-9]+]]:_(s32) = G_TRUNC [[COPY]](s64)
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; CHECK: $w0 = COPY [[TRUNC6]](s32)
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; CHECK: [[C5:%[0-9]+]]:_(s32) = G_CONSTANT i32 1
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; CHECK: [[TRUNC7:%[0-9]+]]:_(s32) = G_TRUNC [[COPY]](s64)
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; CHECK: [[AND2:%[0-9]+]]:_(s32) = G_AND [[TRUNC7]], [[C5]]
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; CHECK: $w0 = COPY [[AND2]](s32)
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; CHECK: [[TRUNC8:%[0-9]+]]:_(s32) = G_TRUNC [[COPY]](s64)
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; CHECK: $w0 = COPY [[TRUNC8]](s32)
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; CHECK: [[C6:%[0-9]+]]:_(s32) = G_CONSTANT i32 16
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; CHECK: [[TRUNC9:%[0-9]+]]:_(s32) = G_TRUNC [[COPY]](s64)
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; CHECK: [[SHL2:%[0-9]+]]:_(s32) = G_SHL [[TRUNC9]], [[C6]](s32)
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; CHECK: [[C7:%[0-9]+]]:_(s64) = G_CONSTANT i64 16
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; CHECK: [[ASHR2:%[0-9]+]]:_(s32) = G_ASHR [[SHL2]], [[C7]](s64)
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; CHECK: $w0 = COPY [[ASHR2]](s32)
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; CHECK: [[TRUNC10:%[0-9]+]]:_(s32) = G_TRUNC [[COPY]](s64)
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; CHECK: [[AND3:%[0-9]+]]:_(s32) = G_AND [[TRUNC10]], [[C5]]
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; CHECK: $w0 = COPY [[AND3]](s32)
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; CHECK: [[TRUNC11:%[0-9]+]]:_(s32) = G_TRUNC [[COPY]](s64)
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; CHECK: $w0 = COPY [[TRUNC11]](s32)
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; CHECK: [[TRUNC12:%[0-9]+]]:_(s32) = G_TRUNC [[COPY]](s64)
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; CHECK: $w0 = COPY [[TRUNC12]](s32)
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; CHECK: [[FPEXT:%[0-9]+]]:_(s64) = G_FPEXT [[TRUNC12]](s32)
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; CHECK: $x0 = COPY [[FPEXT]](s64)
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; CHECK: [[C8:%[0-9]+]]:_(s32) = G_CONSTANT i32 0
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; CHECK: [[COPY5:%[0-9]+]]:_(s32) = COPY [[C8]](s32)
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; CHECK: $w0 = COPY [[COPY5]](s32)
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; CHECK: $w0 = COPY [[C8]](s32)
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; CHECK: [[DEF:%[0-9]+]]:_(s32) = G_IMPLICIT_DEF
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; CHECK: $w0 = COPY [[DEF]](s32)
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%0:_(s64) = COPY $x0
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%1:_(s1) = G_TRUNC %0(s64)
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%19:_(s32) = G_ANYEXT %1(s1)
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$w0 = COPY %19(s32)
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%2:_(s8) = G_TRUNC %0(s64)
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%20:_(s32) = G_ANYEXT %2(s8)
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$w0 = COPY %20(s32)
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%3:_(s16) = G_TRUNC %0(s64)
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%21:_(s32) = G_ANYEXT %3(s16)
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$w0 = COPY %21(s32)
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%4:_(s32) = G_TRUNC %0(s64)
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$w0 = COPY %4(s32)
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%5:_(s64) = G_ANYEXT %1(s1)
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$x0 = COPY %5(s64)
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%6:_(s64) = G_ZEXT %2(s8)
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$x0 = COPY %6(s64)
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%7:_(s64) = G_ANYEXT %3(s16)
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$x0 = COPY %7(s64)
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%8:_(s64) = G_SEXT %4(s32)
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$x0 = COPY %8(s64)
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%9:_(s32) = G_SEXT %1(s1)
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$w0 = COPY %9(s32)
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%10:_(s32) = G_ZEXT %2(s8)
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$w0 = COPY %10(s32)
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%11:_(s32) = G_ANYEXT %3(s16)
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$w0 = COPY %11(s32)
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%12:_(s32) = G_ZEXT %1(s1)
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$w0 = COPY %12(s32)
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%13:_(s32) = G_ANYEXT %2(s8)
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$w0 = COPY %13(s32)
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%14:_(s32) = G_SEXT %3(s16)
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$w0 = COPY %14(s32)
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%15:_(s8) = G_ZEXT %1(s1)
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%22:_(s32) = G_ANYEXT %15(s8)
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$w0 = COPY %22(s32)
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%16:_(s16) = G_ANYEXT %2(s8)
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%23:_(s32) = G_ANYEXT %16(s16)
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$w0 = COPY %23(s32)
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%17:_(s32) = G_TRUNC %0(s64)
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$w0 = COPY %17(s32)
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%18:_(s64) = G_FPEXT %17(s32)
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$x0 = COPY %18(s64)
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%24:_(s16) = G_IMPLICIT_DEF
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%25:_(s32) = G_ZEXT %24(s16)
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$w0 = COPY %25(s32)
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%26:_(s32) = G_SEXT %24(s16)
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$w0 = COPY %26(s32)
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%27:_(s32) = G_ANYEXT %24(s16)
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$w0 = COPY %27(s32)
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...
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---
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name: test_anyext_anyext
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body: |
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bb.0:
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liveins: $w0
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; CHECK-LABEL: name: test_anyext_anyext
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; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $w0
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; CHECK: [[COPY1:%[0-9]+]]:_(s32) = COPY [[COPY]](s32)
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; CHECK: $w0 = COPY [[COPY1]](s32)
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%0:_(s32) = COPY $w0
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%1:_(s1) = G_TRUNC %0(s32)
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%2:_(s8) = G_ANYEXT %1(s1)
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%3:_(s32) = G_ANYEXT %2(s8)
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$w0 = COPY %3(s32)
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...
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---
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name: test_anyext_sext
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body: |
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bb.0:
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liveins: $w0
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; CHECK-LABEL: name: test_anyext_sext
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; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $w0
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; CHECK: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 31
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; CHECK: [[COPY1:%[0-9]+]]:_(s32) = COPY [[COPY]](s32)
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; CHECK: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[COPY1]], [[C]](s32)
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; CHECK: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 31
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; CHECK: [[ASHR:%[0-9]+]]:_(s32) = G_ASHR [[SHL]], [[C1]](s64)
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; CHECK: $w0 = COPY [[ASHR]](s32)
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%0:_(s32) = COPY $w0
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%1:_(s1) = G_TRUNC %0(s32)
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%2:_(s8) = G_SEXT %1(s1)
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%3:_(s32) = G_ANYEXT %2(s8)
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$w0 = COPY %3(s32)
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...
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---
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name: test_anyext_zext
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body: |
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bb.0:
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liveins: $w0
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; CHECK-LABEL: name: test_anyext_zext
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; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $w0
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; CHECK: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1
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; CHECK: [[COPY1:%[0-9]+]]:_(s32) = COPY [[COPY]](s32)
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; CHECK: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C]]
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; CHECK: $w0 = COPY [[AND]](s32)
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%0:_(s32) = COPY $w0
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%1:_(s1) = G_TRUNC %0(s32)
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%2:_(s8) = G_ZEXT %1(s1)
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%3:_(s32) = G_ANYEXT %2(s8)
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$w0 = COPY %3(s32)
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...
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---
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name: test_zext_v8s16_from_v8s8
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alignment: 2
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tracksRegLiveness: true
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machineFunctionInfo: {}
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body: |
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bb.0:
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liveins: $d0
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; CHECK-LABEL: name: test_zext_v8s16_from_v8s8
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; CHECK: liveins: $d0
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; CHECK: [[COPY:%[0-9]+]]:fpr(<8 x s8>) = COPY $d0
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; CHECK: [[ZEXT:%[0-9]+]]:_(<8 x s16>) = G_ZEXT [[COPY]](<8 x s8>)
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; CHECK: $q0 = COPY [[ZEXT]](<8 x s16>)
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; CHECK: RET_ReallyLR implicit $q0
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%1:fpr(<8 x s8>) = COPY $d0
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%2:_(<8 x s16>) = G_ZEXT %1(<8 x s8>)
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$q0 = COPY %2(<8 x s16>)
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RET_ReallyLR implicit $q0
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...
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---
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name: test_sext_v8s16_from_v8s8
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alignment: 2
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tracksRegLiveness: true
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machineFunctionInfo: {}
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body: |
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bb.0:
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liveins: $d0
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; CHECK-LABEL: name: test_sext_v8s16_from_v8s8
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; CHECK: liveins: $d0
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; CHECK: [[COPY:%[0-9]+]]:fpr(<8 x s8>) = COPY $d0
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; CHECK: [[SEXT:%[0-9]+]]:_(<8 x s16>) = G_SEXT [[COPY]](<8 x s8>)
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; CHECK: $q0 = COPY [[SEXT]](<8 x s16>)
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; CHECK: RET_ReallyLR implicit $q0
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%1:fpr(<8 x s8>) = COPY $d0
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%2:_(<8 x s16>) = G_SEXT %1(<8 x s8>)
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$q0 = COPY %2(<8 x s16>)
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RET_ReallyLR implicit $q0
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...
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---
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name: test_anyext_v8s16_from_v8s8
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alignment: 2
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tracksRegLiveness: true
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machineFunctionInfo: {}
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body: |
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bb.0:
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liveins: $d0
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; CHECK-LABEL: name: test_anyext_v8s16_from_v8s8
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; CHECK: liveins: $d0
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; CHECK: [[COPY:%[0-9]+]]:fpr(<8 x s8>) = COPY $d0
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; CHECK: [[ANYEXT:%[0-9]+]]:_(<8 x s16>) = G_ANYEXT [[COPY]](<8 x s8>)
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; CHECK: $q0 = COPY [[ANYEXT]](<8 x s16>)
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; CHECK: RET_ReallyLR implicit $q0
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%1:fpr(<8 x s8>) = COPY $d0
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%2:_(<8 x s16>) = G_ANYEXT %1(<8 x s8>)
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$q0 = COPY %2(<8 x s16>)
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RET_ReallyLR implicit $q0
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...
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---
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name: test_zext_v4s32_from_v4s16
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alignment: 2
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tracksRegLiveness: true
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machineFunctionInfo: {}
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body: |
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bb.0:
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liveins: $d0
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; CHECK-LABEL: name: test_zext_v4s32_from_v4s16
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; CHECK: liveins: $d0
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; CHECK: [[COPY:%[0-9]+]]:_(<4 x s16>) = COPY $d0
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; CHECK: [[ZEXT:%[0-9]+]]:_(<4 x s32>) = G_ZEXT [[COPY]](<4 x s16>)
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; CHECK: $q0 = COPY [[ZEXT]](<4 x s32>)
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; CHECK: RET_ReallyLR implicit $q0
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%0:_(<4 x s16>) = COPY $d0
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%1:_(<4 x s32>) = G_ZEXT %0(<4 x s16>)
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$q0 = COPY %1(<4 x s32>)
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RET_ReallyLR implicit $q0
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...
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---
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name: test_sext_v4s32_from_v4s16
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alignment: 2
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tracksRegLiveness: true
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machineFunctionInfo: {}
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body: |
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bb.0:
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liveins: $d0
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; CHECK-LABEL: name: test_sext_v4s32_from_v4s16
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; CHECK: liveins: $d0
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; CHECK: [[COPY:%[0-9]+]]:_(<4 x s16>) = COPY $d0
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; CHECK: [[SEXT:%[0-9]+]]:_(<4 x s32>) = G_SEXT [[COPY]](<4 x s16>)
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; CHECK: $q0 = COPY [[SEXT]](<4 x s32>)
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; CHECK: RET_ReallyLR implicit $q0
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%0:_(<4 x s16>) = COPY $d0
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%1:_(<4 x s32>) = G_SEXT %0(<4 x s16>)
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$q0 = COPY %1(<4 x s32>)
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RET_ReallyLR implicit $q0
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...
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---
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name: test_anyext_v4s32_from_v4s16
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alignment: 2
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tracksRegLiveness: true
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machineFunctionInfo: {}
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body: |
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bb.0:
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liveins: $d0
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; CHECK-LABEL: name: test_anyext_v4s32_from_v4s16
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; CHECK: liveins: $d0
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; CHECK: [[COPY:%[0-9]+]]:_(<4 x s16>) = COPY $d0
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; CHECK: [[ANYEXT:%[0-9]+]]:_(<4 x s32>) = G_ANYEXT [[COPY]](<4 x s16>)
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; CHECK: $q0 = COPY [[ANYEXT]](<4 x s32>)
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; CHECK: RET_ReallyLR implicit $q0
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%0:_(<4 x s16>) = COPY $d0
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%1:_(<4 x s32>) = G_ANYEXT %0(<4 x s16>)
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$q0 = COPY %1(<4 x s32>)
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RET_ReallyLR implicit $q0
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...
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---
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name: test_zext_v2s64_from_v2s32
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alignment: 2
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tracksRegLiveness: true
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registers:
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- { id: 0, class: _ }
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- { id: 1, class: _ }
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machineFunctionInfo: {}
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body: |
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bb.0:
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liveins: $d0
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; CHECK-LABEL: name: test_zext_v2s64_from_v2s32
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; CHECK: liveins: $d0
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; CHECK: [[COPY:%[0-9]+]]:_(<2 x s32>) = COPY $d0
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; CHECK: [[ZEXT:%[0-9]+]]:_(<2 x s64>) = G_ZEXT [[COPY]](<2 x s32>)
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; CHECK: $q0 = COPY [[ZEXT]](<2 x s64>)
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; CHECK: RET_ReallyLR implicit $q0
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%0:_(<2 x s32>) = COPY $d0
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%1:_(<2 x s64>) = G_ZEXT %0(<2 x s32>)
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$q0 = COPY %1(<2 x s64>)
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RET_ReallyLR implicit $q0
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...
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---
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name: test_sext_v2s64_from_v2s32
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alignment: 2
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tracksRegLiveness: true
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registers:
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- { id: 0, class: _ }
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- { id: 1, class: _ }
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machineFunctionInfo: {}
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body: |
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bb.0:
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liveins: $d0
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; CHECK-LABEL: name: test_sext_v2s64_from_v2s32
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; CHECK: liveins: $d0
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; CHECK: [[COPY:%[0-9]+]]:_(<2 x s32>) = COPY $d0
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; CHECK: [[SEXT:%[0-9]+]]:_(<2 x s64>) = G_SEXT [[COPY]](<2 x s32>)
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; CHECK: $q0 = COPY [[SEXT]](<2 x s64>)
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; CHECK: RET_ReallyLR implicit $q0
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%0:_(<2 x s32>) = COPY $d0
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%1:_(<2 x s64>) = G_SEXT %0(<2 x s32>)
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$q0 = COPY %1(<2 x s64>)
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RET_ReallyLR implicit $q0
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...
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---
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name: test_anyext_v2s64_from_v2s32
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alignment: 2
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tracksRegLiveness: true
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registers:
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- { id: 0, class: _ }
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- { id: 1, class: _ }
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machineFunctionInfo: {}
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body: |
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bb.0:
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liveins: $d0
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; CHECK-LABEL: name: test_anyext_v2s64_from_v2s32
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; CHECK: liveins: $d0
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; CHECK: [[COPY:%[0-9]+]]:_(<2 x s32>) = COPY $d0
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; CHECK: [[ANYEXT:%[0-9]+]]:_(<2 x s64>) = G_ANYEXT [[COPY]](<2 x s32>)
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; CHECK: $q0 = COPY [[ANYEXT]](<2 x s64>)
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; CHECK: RET_ReallyLR implicit $q0
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%0:_(<2 x s32>) = COPY $d0
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%1:_(<2 x s64>) = G_ANYEXT %0(<2 x s32>)
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$q0 = COPY %1(<2 x s64>)
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RET_ReallyLR implicit $q0
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|
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|
...
|