llvm-project/llvm/test/CodeGen/MIR
Luke Cheeseman 41a9e53500 [Dwarf/AArch64] Return address signing B key dwarf support
- When signing return addresses with -msign-return-address=<scope>{+<key>},
  either the A key instructions or the B key instructions can be used. To
  correctly authenticate the return address, the unwinder/debugger must know
  which key was used to sign the return address.
- When and exception is thrown or a break point reached, it may be necessary to
  unwind the stack. To accomplish this, the unwinder/debugger must be able to
  first authenticate an the return address if it has been signed.
- To enable this, the augmentation string of CIEs has been extended to allow
  inclusion of a 'B' character. Functions that are signed using the B key
  variant of the instructions should have and FDE whose associated CIE has a 'B'
  in the augmentation string.
- One must also be able to preserve these semantics when first stepping from a
  high level language into assembly and then, as a second step, into an object
  file. To achieve this, I have introduced a new assembly directive
  '.cfi_b_key_frame ', that tells the assembler the current frame uses return
  address signing with the B key.
- This ensures that the FDE is associated with a CIE that has 'B' in the
  augmentation string.

Differential Revision: https://reviews.llvm.org/D51798

llvm-svn: 349895
2018-12-21 10:45:08 +00:00
..
AArch64 [Dwarf/AArch64] Return address signing B key dwarf support 2018-12-21 10:45:08 +00:00
AMDGPU AMDGPU: Fix tests using old number for constant address space 2018-09-10 02:54:25 +00:00
ARM Followup on Proposal to move MIR physical register namespace to '$' sigil. 2018-01-31 22:04:26 +00:00
Generic [codeview] Emit S_FRAMEPROC and use S_DEFRANGE_FRAMEPOINTER_REL 2018-10-01 21:59:45 +00:00
Hexagon Followup on Proposal to move MIR physical register namespace to '$' sigil. 2018-01-31 22:04:26 +00:00
Mips Followup on Proposal to move MIR physical register namespace to '$' sigil. 2018-01-31 22:04:26 +00:00
NVPTX [MIR] Repurposing '$' sigil used by external symbols. Replacing with '&'. 2018-01-10 00:56:48 +00:00
PowerPC [Power9] Allow gpr callee saved spills in prologue to vectors registers 2018-11-09 16:36:24 +00:00
WebAssembly [MIRParser][GlobalISel] Parsing vector pointer types (<M x pA>) 2018-05-08 02:02:50 +00:00
X86 [mir] Serialize DILocation inline when not possible to use a metadata reference 2018-12-13 14:25:27 +00:00
README

README

This directory contains tests for the MIR file format parser and printer. It
was necessary to split the tests across different targets as no single target
covers all features available in machine IR.

Tests for codegen passes should NOT be here but in test/CodeGen/sometarget. As
a rule of thumb this directory should only contain tests using
'llc -run-pass none'.