Neil Henning e85d45a699 [AMDGPU] Fix dwordx3/southern-islands failures. ... This commit fixes the dwordx3/southern-islands failures that were found in bugzilla https://bugs.llvm.org/show_bug.cgi?id=40129, by not generating the dwordx3 variants of load/store instructions that were added to the ISA after southern islands. Differential Revision: https://reviews.llvm.org/D56434 llvm-svn: 350838		2019-01-10 16:21:08 +00:00
..
AArch64	[AArch64] Fix operation actions for FP16 vector intrinsics	2019-01-10 15:02:37 +00:00
AMDGPU	[AMDGPU] Fix dwordx3/southern-islands failures.	2019-01-10 16:21:08 +00:00
ARC	…
ARM	[ARM] Add missing patterns for DSP muls	2019-01-08 10:12:36 +00:00
AVR	[AVR] Update integration/blink.ll as we now generate sbi/cbi instructions.	2019-01-03 21:25:39 +00:00
BPF	[BPF] Fix .BTF.ext reloc type assigment issue	2019-01-08 16:36:06 +00:00
Generic	Move llc-start-stop-instance to x86	2018-12-04 18:19:08 +00:00
Hexagon	[DAGCombiner] allow narrowing of add followed by truncate	2018-12-22 17:10:31 +00:00
Inputs	…
Lanai	[Targets] Add errors for tiny and kernel codemodel on targets that don't support them	2018-12-07 12:10:23 +00:00
MIR	[Dwarf/AArch64] Return address signing B key dwarf support	2018-12-21 10:45:08 +00:00
MSP430	[MSP430] Optimize 'shl x, 8[+ N] -> swpb(zext(x)) [<< N]' for i16	2019-01-09 13:03:01 +00:00
Mips	[llvm-objdump] - Implement -z/--disassemble-zeroes.	2019-01-10 14:55:26 +00:00
NVPTX	Python compat - print statement	2019-01-03 14:11:33 +00:00
Nios2	…
PowerPC	Recommit "[PowerPC] Fix assert from machine verify pass that unmatched register class about fcmp selection in fast-isel"	2019-01-10 06:20:14 +00:00
RISCV	[RISCV] Add support for the various RISC-V FMA instruction variants	2018-12-13 10:49:05 +00:00
SPARC	[Sparc] Use float register for integer constrained with "f" in inline asm	2018-12-13 15:13:29 +00:00
SystemZ	Pythran compat - range vs. xrange	2019-01-03 14:11:58 +00:00
Thumb	[ARM] Complete the Thumb1 shift+and->shift+shift transforms.	2018-12-20 23:39:54 +00:00
Thumb2	[ARM] Size reduce teq to eors	2019-01-10 08:36:33 +00:00
WebAssembly	Revert "[WebAssembly] Add simd128-unimplemented subtarget feature"	2019-01-10 04:09:25 +00:00
WinCFGuard	…
WinEH	…
X86	[x86] fix remaining miscompile bug in horizontal binop matching (PR40243)	2019-01-10 15:27:23 +00:00
XCore	[Targets] Add errors for tiny and kernel codemodel on targets that don't support them	2018-12-07 12:10:23 +00:00