forked from OSchip/llvm-project
155 lines
2.8 KiB
LLVM
155 lines
2.8 KiB
LLVM
; RUN: llc < %s -march=mips -mcpu=mips32r6 -force-mips-long-branch | FileCheck %s
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; Check that when MIPS32R6 with the static relocation model with the usage of
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; long branches, that there is a nop between any compact branch and the static
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; relocation method of expanding branches. Previously, it could result in 'j'
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; following a b(ne|eq)zc, which would raise a reserved instruction exception.
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declare i32 @f(i32)
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declare i32 @g()
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; CHECK-LABEL: test1:
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; CHECK: bnezc
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; CHECK-NEXT: nop
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define i32 @test1(i32 %a) {
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entry:
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%0 = icmp eq i32 %a, 0
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br i1 %0, label %cond.true, label %cond.false
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cond.true:
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%1 = call i32 @f(i32 %a)
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ret i32 %1
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cond.false:
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%2 = call i32 @g()
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ret i32 %2
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}
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; CHECK-LABEL: test2:
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; CHECK: bgezc
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; CHECK-NEXT: nop
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define i32 @test2(i32 %a) {
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entry:
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%0 = icmp sge i32 %a, 0
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br i1 %0, label %cond.true, label %cond.false
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cond.true:
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%1 = call i32 @f(i32 %a)
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ret i32 %1
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cond.false:
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%2 = call i32 @g()
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ret i32 %2
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}
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; CHECK-LABEL: test3:
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; CHECK: blezc
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; CHECK-NEXT: nop
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define i32 @test3(i32 %a) {
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entry:
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%0 = icmp sle i32 %a, 0
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br i1 %0, label %cond.true, label %cond.false
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cond.true:
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%1 = call i32 @f(i32 %a)
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ret i32 %1
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cond.false:
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%2 = call i32 @g()
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ret i32 %2
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}
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; CHECK-LABEL: test4:
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; CHECK: bgtzc
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; CHECK-NEXT: nop
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define i32 @test4(i32 %a) {
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entry:
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%0 = icmp sgt i32 %a, 0
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br i1 %0, label %cond.true, label %cond.false
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cond.true:
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%1 = call i32 @f(i32 %a)
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ret i32 %1
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cond.false:
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%2 = call i32 @g()
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ret i32 %2
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}
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; CHECK-LABEL: test5:
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; CHECK: bgezc
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; CHECK-NEXT: nop
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define i32 @test5(i32 %a) {
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entry:
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%0 = icmp slt i32 %a, 0
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br i1 %0, label %cond.true, label %cond.false
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cond.true:
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%1 = call i32 @f(i32 %a)
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ret i32 %1
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cond.false:
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%2 = call i32 @g()
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ret i32 %2
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}
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; CHECK-LABEL: test6:
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; CHECK: bnezc
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; CHECK-NEXT: nop
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define i32 @test6(i32 %a, i32 %b) {
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entry:
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%0 = icmp ugt i32 %a, %b
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br i1 %0, label %cond.true, label %cond.false
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cond.true:
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%1 = call i32 @f(i32 %a)
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ret i32 %1
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cond.false:
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%2 = call i32 @g()
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ret i32 %2
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}
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; CHECK-LABEL: test7:
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; CHECK: beqzc
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; CHECK-NEXT: nop
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define i32 @test7(i32 %a, i32 %b) {
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entry:
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%0 = icmp uge i32 %a, %b
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br i1 %0, label %cond.true, label %cond.false
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cond.true:
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%1 = call i32 @f(i32 %a)
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ret i32 %1
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cond.false:
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%2 = call i32 @g()
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ret i32 %2
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}
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; CHECK-LABEL: test8:
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; CHECK: bnezc
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; CHECK-NEXT: nop
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define i32 @test8(i32 %a, i32 %b) {
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entry:
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%0 = icmp ult i32 %a, %b
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br i1 %0, label %cond.true, label %cond.false
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cond.true:
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%1 = call i32 @f(i32 %a)
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ret i32 %1
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cond.false:
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%2 = call i32 @g()
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ret i32 %2
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}
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; CHECK-LABEL: test9:
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; CHECK: beqzc
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; CHECK-NEXT: nop
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define i32 @test9(i32 %a, i32 %b) {
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entry:
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%0 = icmp ule i32 %a, %b
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br i1 %0, label %cond.true, label %cond.false
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cond.true:
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%1 = call i32 @f(i32 %a)
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ret i32 %1
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cond.false:
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%2 = call i32 @g()
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ret i32 %2
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}
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