Simon Pilgrim bdd6af3a58 [AArch64] Regenerate dag-numsignbits.ll checks ... To improve the codegen diff in D87502		2020-09-24 18:40:49 +01:00
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AArch64	[AArch64] Regenerate dag-numsignbits.ll checks	2020-09-24 18:40:49 +01:00
AMDGPU	[AMDGPU] global-isel support for RT	2020-09-24 10:29:45 -07:00
ARC	…
ARM	[SelectionDAG][GISel] Make LegalizeDAG lower FNEG using integer ops.	2020-09-23 14:10:33 -07:00
AVR	…
BPF	…
Generic	[Intrinsics] define semantics for experimental fmax/fmin vector reductions	2020-09-12 09:10:28 -04:00
Hexagon	Revert "Reapply Revert "RegAllocFast: Rewrite and improve""	2020-09-22 14:40:06 +05:00
Inputs	…
Lanai	…
MIR	…
MSP430	…
Mips	Revert "Reapply Revert "RegAllocFast: Rewrite and improve""	2020-09-22 14:40:06 +05:00
NVPTX	…
PowerPC	[PowerPC] Implement the 128-bit vec_[all|any]_[eq | ne | lt | gt | le | ge] builtins in Clang/LLVM	2020-09-23 16:49:40 -04:00
RISCV	[RISCV] Support Shadow Call Stack	2020-09-17 16:02:35 -07:00
SPARC	Revert "Reapply Revert "RegAllocFast: Rewrite and improve""	2020-09-22 14:40:06 +05:00
SystemZ	Revert "Reapply Revert "RegAllocFast: Rewrite and improve""	2020-09-22 14:40:06 +05:00
Thumb	…
Thumb2	[ARM] LowoverheadLoops: add an option to disable tail-predication	2020-09-24 13:30:48 +01:00
VE	…
WebAssembly	[WebAssembly] Fix fixEndsAtEndOfFunction for try-catch	2020-09-08 09:27:40 -07:00
WinCFGuard	…
WinEH	…
X86	[X86][SSE] combineVectorTruncation - enable (pre-SSSE3) vXi16->vXi8 truncation.	2020-09-24 15:51:36 +01:00
XCore	…