forked from OSchip/llvm-project
101 lines
3.3 KiB
C++
101 lines
3.3 KiB
C++
//===-- NVPTXTargetMachine.h - Define TargetMachine for NVPTX ---*- C++ -*-===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This file declares the NVPTX specific subclass of TargetMachine.
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//
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//===----------------------------------------------------------------------===//
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#ifndef NVPTX_TARGETMACHINE_H
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#define NVPTX_TARGETMACHINE_H
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#include "NVPTXSubtarget.h"
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#include "ManagedStringPool.h"
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#include "llvm/Target/TargetFrameLowering.h"
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#include "llvm/Target/TargetMachine.h"
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#include "llvm/Target/TargetSelectionDAGInfo.h"
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namespace llvm {
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/// NVPTXTargetMachine
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///
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class NVPTXTargetMachine : public LLVMTargetMachine {
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NVPTXSubtarget Subtarget;
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// Hold Strings that can be free'd all together with NVPTXTargetMachine
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ManagedStringPool ManagedStrPool;
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public:
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NVPTXTargetMachine(const Target &T, StringRef TT, StringRef CPU, StringRef FS,
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const TargetOptions &Options, Reloc::Model RM,
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CodeModel::Model CM, CodeGenOpt::Level OP, bool is64bit);
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const TargetFrameLowering *getFrameLowering() const override {
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return getSubtargetImpl()->getFrameLowering();
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}
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const NVPTXInstrInfo *getInstrInfo() const override {
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return getSubtargetImpl()->getInstrInfo();
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}
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const DataLayout *getDataLayout() const override {
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return getSubtargetImpl()->getDataLayout();
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}
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const NVPTXSubtarget *getSubtargetImpl() const override { return &Subtarget; }
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const NVPTXRegisterInfo *getRegisterInfo() const override {
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return getSubtargetImpl()->getRegisterInfo();
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}
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const NVPTXTargetLowering *getTargetLowering() const override {
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return getSubtargetImpl()->getTargetLowering();
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}
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const TargetSelectionDAGInfo *getSelectionDAGInfo() const override {
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return getSubtargetImpl()->getSelectionDAGInfo();
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}
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ManagedStringPool *getManagedStrPool() const {
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return const_cast<ManagedStringPool *>(&ManagedStrPool);
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}
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TargetPassConfig *createPassConfig(PassManagerBase &PM) override;
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// Emission of machine code through JITCodeEmitter is not supported.
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bool addPassesToEmitMachineCode(PassManagerBase &, JITCodeEmitter &,
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bool = true) override {
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return true;
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}
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// Emission of machine code through MCJIT is not supported.
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bool addPassesToEmitMC(PassManagerBase &, MCContext *&, raw_ostream &,
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bool = true) override {
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return true;
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}
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}; // NVPTXTargetMachine.
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class NVPTXTargetMachine32 : public NVPTXTargetMachine {
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virtual void anchor();
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public:
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NVPTXTargetMachine32(const Target &T, StringRef TT, StringRef CPU,
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StringRef FS, const TargetOptions &Options,
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Reloc::Model RM, CodeModel::Model CM,
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CodeGenOpt::Level OL);
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};
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class NVPTXTargetMachine64 : public NVPTXTargetMachine {
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virtual void anchor();
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public:
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NVPTXTargetMachine64(const Target &T, StringRef TT, StringRef CPU,
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StringRef FS, const TargetOptions &Options,
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Reloc::Model RM, CodeModel::Model CM,
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CodeGenOpt::Level OL);
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};
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} // end namespace llvm
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#endif
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