forked from OSchip/llvm-project
209 lines
4.8 KiB
ArmAsm
209 lines
4.8 KiB
ArmAsm
.file "/home/timnor01/a64-trunk/llvm/test/CodeGen/AArch64/logical_shifted_reg.ll"
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.text
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.globl logical_32bit
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.type logical_32bit,@function
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logical_32bit: // @logical_32bit
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.cfi_startproc
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// BB#0:
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adrp x0, var1_32
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ldr w1, [x0, #:lo12:var1_32]
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adrp x0, var2_32
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ldr w2, [x0, #:lo12:var2_32]
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and w3, w1, w2
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adrp x0, var1_32
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str w3, [x0, #:lo12:var1_32]
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bic w3, w1, w2
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adrp x0, var1_32
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str w3, [x0, #:lo12:var1_32]
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orr w3, w1, w2
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adrp x0, var1_32
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str w3, [x0, #:lo12:var1_32]
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orn w3, w1, w2
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adrp x0, var1_32
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str w3, [x0, #:lo12:var1_32]
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eor w3, w1, w2
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adrp x0, var1_32
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str w3, [x0, #:lo12:var1_32]
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eon w3, w2, w1
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adrp x0, var1_32
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str w3, [x0, #:lo12:var1_32]
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and w3, w1, w2, lsl #31
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adrp x0, var1_32
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str w3, [x0, #:lo12:var1_32]
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bic w3, w1, w2, lsl #31
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adrp x0, var1_32
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str w3, [x0, #:lo12:var1_32]
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orr w3, w1, w2, lsl #31
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adrp x0, var1_32
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str w3, [x0, #:lo12:var1_32]
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orn w3, w1, w2, lsl #31
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adrp x0, var1_32
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str w3, [x0, #:lo12:var1_32]
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eor w3, w1, w2, lsl #31
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adrp x0, var1_32
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str w3, [x0, #:lo12:var1_32]
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eon w3, w1, w2, lsl #31
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adrp x0, var1_32
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str w3, [x0, #:lo12:var1_32]
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bic w3, w1, w2, asr #10
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adrp x0, var1_32
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str w3, [x0, #:lo12:var1_32]
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eor w3, w1, w2, asr #10
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adrp x0, var1_32
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str w3, [x0, #:lo12:var1_32]
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orn w3, w1, w2, lsr #1
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adrp x0, var1_32
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str w3, [x0, #:lo12:var1_32]
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eor w3, w1, w2, lsr #1
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adrp x0, var1_32
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str w3, [x0, #:lo12:var1_32]
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eon w3, w1, w2, ror #20
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adrp x0, var1_32
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str w3, [x0, #:lo12:var1_32]
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and w1, w1, w2, ror #20
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adrp x0, var1_32
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str w1, [x0, #:lo12:var1_32]
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ret
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.Ltmp0:
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.size logical_32bit, .Ltmp0-logical_32bit
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.cfi_endproc
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.globl logical_64bit
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.type logical_64bit,@function
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logical_64bit: // @logical_64bit
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.cfi_startproc
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// BB#0:
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adrp x0, var1_64
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ldr x0, [x0, #:lo12:var1_64]
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adrp x1, var2_64
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ldr x1, [x1, #:lo12:var2_64]
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and x2, x0, x1
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adrp x3, var1_64
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str x2, [x3, #:lo12:var1_64]
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bic x2, x0, x1
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adrp x3, var1_64
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str x2, [x3, #:lo12:var1_64]
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orr x2, x0, x1
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adrp x3, var1_64
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str x2, [x3, #:lo12:var1_64]
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orn x2, x0, x1
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adrp x3, var1_64
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str x2, [x3, #:lo12:var1_64]
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eor x2, x0, x1
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adrp x3, var1_64
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str x2, [x3, #:lo12:var1_64]
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eon x2, x1, x0
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adrp x3, var1_64
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str x2, [x3, #:lo12:var1_64]
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and x2, x0, x1, lsl #63
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adrp x3, var1_64
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str x2, [x3, #:lo12:var1_64]
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bic x2, x0, x1, lsl #63
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adrp x3, var1_64
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str x2, [x3, #:lo12:var1_64]
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orr x2, x0, x1, lsl #63
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adrp x3, var1_64
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str x2, [x3, #:lo12:var1_64]
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orn x2, x0, x1, lsl #63
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adrp x3, var1_64
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str x2, [x3, #:lo12:var1_64]
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eor x2, x0, x1, lsl #63
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adrp x3, var1_64
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str x2, [x3, #:lo12:var1_64]
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eon x2, x0, x1, lsl #63
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adrp x3, var1_64
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str x2, [x3, #:lo12:var1_64]
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bic x2, x0, x1, asr #10
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adrp x3, var1_64
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str x2, [x3, #:lo12:var1_64]
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eor x2, x0, x1, asr #10
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adrp x3, var1_64
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str x2, [x3, #:lo12:var1_64]
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orn x2, x0, x1, lsr #1
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adrp x3, var1_64
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str x2, [x3, #:lo12:var1_64]
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eor x2, x0, x1, lsr #1
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adrp x3, var1_64
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str x2, [x3, #:lo12:var1_64]
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eon x2, x0, x1, ror #20
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adrp x3, var1_64
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str x2, [x3, #:lo12:var1_64]
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and x0, x0, x1, ror #20
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adrp x1, var1_64
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str x0, [x1, #:lo12:var1_64]
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ret
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.Ltmp1:
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.size logical_64bit, .Ltmp1-logical_64bit
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.cfi_endproc
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.globl flag_setting
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.type flag_setting,@function
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flag_setting: // @flag_setting
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.cfi_startproc
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// BB#0:
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sub sp, sp, #16
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adrp x0, var1_64
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ldr x0, [x0, #:lo12:var1_64]
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adrp x1, var2_64
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ldr x1, [x1, #:lo12:var2_64]
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tst x0, x1
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str x0, [sp, #8] // 8-byte Folded Spill
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str x1, [sp] // 8-byte Folded Spill
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b.gt .LBB2_4
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b .LBB2_1
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.LBB2_1: // %test2
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ldr x0, [sp, #8] // 8-byte Folded Reload
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ldr x1, [sp] // 8-byte Folded Reload
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tst x0, x1, lsl #63
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b.lt .LBB2_4
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b .LBB2_2
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.LBB2_2: // %test3
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ldr x0, [sp, #8] // 8-byte Folded Reload
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ldr x1, [sp] // 8-byte Folded Reload
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tst x0, x1, asr #12
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b.gt .LBB2_4
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b .LBB2_3
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.LBB2_3: // %other_exit
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adrp x0, var1_64
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ldr x1, [sp, #8] // 8-byte Folded Reload
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str x1, [x0, #:lo12:var1_64]
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add sp, sp, #16
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ret
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.LBB2_4: // %ret
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add sp, sp, #16
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ret
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.Ltmp2:
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.size flag_setting, .Ltmp2-flag_setting
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.cfi_endproc
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.type var1_32,@object // @var1_32
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.bss
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.globl var1_32
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.align 2
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var1_32:
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.word 0 // 0x0
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.size var1_32, 4
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.type var2_32,@object // @var2_32
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.globl var2_32
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.align 2
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var2_32:
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.word 0 // 0x0
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.size var2_32, 4
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.type var1_64,@object // @var1_64
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.globl var1_64
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.align 3
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var1_64:
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.xword 0 // 0x0
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.size var1_64, 8
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.type var2_64,@object // @var2_64
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.globl var2_64
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.align 3
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var2_64:
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.xword 0 // 0x0
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.size var2_64, 8
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