forked from OSchip/llvm-project
449 lines
17 KiB
C++
449 lines
17 KiB
C++
//===- Loads.cpp - Local load analysis ------------------------------------===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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//
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// This file defines simple local analyses for load instructions.
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//
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//===----------------------------------------------------------------------===//
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#include "llvm/Analysis/Loads.h"
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#include "llvm/Analysis/AliasAnalysis.h"
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#include "llvm/Analysis/ValueTracking.h"
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#include "llvm/IR/DataLayout.h"
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#include "llvm/IR/GlobalAlias.h"
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#include "llvm/IR/GlobalVariable.h"
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#include "llvm/IR/IntrinsicInst.h"
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#include "llvm/IR/LLVMContext.h"
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#include "llvm/IR/Module.h"
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#include "llvm/IR/Operator.h"
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#include "llvm/IR/Statepoint.h"
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using namespace llvm;
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static bool isAligned(const Value *Base, const APInt &Offset, unsigned Align,
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const DataLayout &DL) {
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APInt BaseAlign(Offset.getBitWidth(), Base->getPointerAlignment(DL));
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if (!BaseAlign) {
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Type *Ty = Base->getType()->getPointerElementType();
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if (!Ty->isSized())
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return false;
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BaseAlign = DL.getABITypeAlignment(Ty);
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}
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APInt Alignment(Offset.getBitWidth(), Align);
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assert(Alignment.isPowerOf2() && "must be a power of 2!");
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return BaseAlign.uge(Alignment) && !(Offset & (Alignment-1));
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}
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static bool isAligned(const Value *Base, unsigned Align, const DataLayout &DL) {
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Type *Ty = Base->getType();
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assert(Ty->isSized() && "must be sized");
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APInt Offset(DL.getTypeStoreSizeInBits(Ty), 0);
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return isAligned(Base, Offset, Align, DL);
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}
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/// Test if V is always a pointer to allocated and suitably aligned memory for
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/// a simple load or store.
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static bool isDereferenceableAndAlignedPointer(
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const Value *V, unsigned Align, const APInt &Size, const DataLayout &DL,
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const Instruction *CtxI, const DominatorTree *DT,
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SmallPtrSetImpl<const Value *> &Visited) {
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// Already visited? Bail out, we've likely hit unreachable code.
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if (!Visited.insert(V).second)
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return false;
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// Note that it is not safe to speculate into a malloc'd region because
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// malloc may return null.
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// bitcast instructions are no-ops as far as dereferenceability is concerned.
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if (const BitCastOperator *BC = dyn_cast<BitCastOperator>(V))
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return isDereferenceableAndAlignedPointer(BC->getOperand(0), Align, Size,
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DL, CtxI, DT, Visited);
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bool CheckForNonNull = false;
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APInt KnownDerefBytes(Size.getBitWidth(),
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V->getPointerDereferenceableBytes(DL, CheckForNonNull));
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if (KnownDerefBytes.getBoolValue()) {
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if (KnownDerefBytes.uge(Size))
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if (!CheckForNonNull || isKnownNonZero(V, DL, 0, nullptr, CtxI, DT))
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return isAligned(V, Align, DL);
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}
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// For GEPs, determine if the indexing lands within the allocated object.
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if (const GEPOperator *GEP = dyn_cast<GEPOperator>(V)) {
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const Value *Base = GEP->getPointerOperand();
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APInt Offset(DL.getIndexTypeSizeInBits(GEP->getType()), 0);
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if (!GEP->accumulateConstantOffset(DL, Offset) || Offset.isNegative() ||
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!Offset.urem(APInt(Offset.getBitWidth(), Align)).isMinValue())
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return false;
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// If the base pointer is dereferenceable for Offset+Size bytes, then the
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// GEP (== Base + Offset) is dereferenceable for Size bytes. If the base
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// pointer is aligned to Align bytes, and the Offset is divisible by Align
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// then the GEP (== Base + Offset == k_0 * Align + k_1 * Align) is also
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// aligned to Align bytes.
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// Offset and Size may have different bit widths if we have visited an
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// addrspacecast, so we can't do arithmetic directly on the APInt values.
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return isDereferenceableAndAlignedPointer(
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Base, Align, Offset + Size.sextOrTrunc(Offset.getBitWidth()),
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DL, CtxI, DT, Visited);
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}
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// For gc.relocate, look through relocations
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if (const GCRelocateInst *RelocateInst = dyn_cast<GCRelocateInst>(V))
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return isDereferenceableAndAlignedPointer(
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RelocateInst->getDerivedPtr(), Align, Size, DL, CtxI, DT, Visited);
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if (const AddrSpaceCastInst *ASC = dyn_cast<AddrSpaceCastInst>(V))
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return isDereferenceableAndAlignedPointer(ASC->getOperand(0), Align, Size,
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DL, CtxI, DT, Visited);
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if (const auto *Call = dyn_cast<CallBase>(V))
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if (auto *RP = getArgumentAliasingToReturnedPointer(Call))
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return isDereferenceableAndAlignedPointer(RP, Align, Size, DL, CtxI, DT,
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Visited);
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// If we don't know, assume the worst.
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return false;
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}
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bool llvm::isDereferenceableAndAlignedPointer(const Value *V, unsigned Align,
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const APInt &Size,
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const DataLayout &DL,
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const Instruction *CtxI,
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const DominatorTree *DT) {
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SmallPtrSet<const Value *, 32> Visited;
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return ::isDereferenceableAndAlignedPointer(V, Align, Size, DL, CtxI, DT,
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Visited);
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}
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bool llvm::isDereferenceableAndAlignedPointer(const Value *V, unsigned Align,
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const DataLayout &DL,
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const Instruction *CtxI,
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const DominatorTree *DT) {
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// When dereferenceability information is provided by a dereferenceable
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// attribute, we know exactly how many bytes are dereferenceable. If we can
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// determine the exact offset to the attributed variable, we can use that
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// information here.
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Type *VTy = V->getType();
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Type *Ty = VTy->getPointerElementType();
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// Require ABI alignment for loads without alignment specification
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if (Align == 0)
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Align = DL.getABITypeAlignment(Ty);
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if (!Ty->isSized())
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return false;
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SmallPtrSet<const Value *, 32> Visited;
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return ::isDereferenceableAndAlignedPointer(
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V, Align, APInt(DL.getIndexTypeSizeInBits(VTy), DL.getTypeStoreSize(Ty)), DL,
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CtxI, DT, Visited);
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}
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bool llvm::isDereferenceablePointer(const Value *V, const DataLayout &DL,
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const Instruction *CtxI,
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const DominatorTree *DT) {
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return isDereferenceableAndAlignedPointer(V, 1, DL, CtxI, DT);
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}
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/// Test if A and B will obviously have the same value.
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///
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/// This includes recognizing that %t0 and %t1 will have the same
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/// value in code like this:
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/// \code
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/// %t0 = getelementptr \@a, 0, 3
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/// store i32 0, i32* %t0
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/// %t1 = getelementptr \@a, 0, 3
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/// %t2 = load i32* %t1
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/// \endcode
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///
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static bool AreEquivalentAddressValues(const Value *A, const Value *B) {
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// Test if the values are trivially equivalent.
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if (A == B)
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return true;
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// Test if the values come from identical arithmetic instructions.
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// Use isIdenticalToWhenDefined instead of isIdenticalTo because
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// this function is only used when one address use dominates the
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// other, which means that they'll always either have the same
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// value or one of them will have an undefined value.
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if (isa<BinaryOperator>(A) || isa<CastInst>(A) || isa<PHINode>(A) ||
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isa<GetElementPtrInst>(A))
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if (const Instruction *BI = dyn_cast<Instruction>(B))
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if (cast<Instruction>(A)->isIdenticalToWhenDefined(BI))
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return true;
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// Otherwise they may not be equivalent.
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return false;
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}
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/// Check if executing a load of this pointer value cannot trap.
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///
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/// If DT and ScanFrom are specified this method performs context-sensitive
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/// analysis and returns true if it is safe to load immediately before ScanFrom.
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///
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/// If it is not obviously safe to load from the specified pointer, we do
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/// a quick local scan of the basic block containing \c ScanFrom, to determine
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/// if the address is already accessed.
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///
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/// This uses the pointee type to determine how many bytes need to be safe to
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/// load from the pointer.
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bool llvm::isSafeToLoadUnconditionally(Value *V, unsigned Align,
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const DataLayout &DL,
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Instruction *ScanFrom,
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const DominatorTree *DT) {
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// Zero alignment means that the load has the ABI alignment for the target
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if (Align == 0)
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Align = DL.getABITypeAlignment(V->getType()->getPointerElementType());
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assert(isPowerOf2_32(Align));
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// If DT is not specified we can't make context-sensitive query
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const Instruction* CtxI = DT ? ScanFrom : nullptr;
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if (isDereferenceableAndAlignedPointer(V, Align, DL, CtxI, DT))
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return true;
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int64_t ByteOffset = 0;
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Value *Base = V;
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Base = GetPointerBaseWithConstantOffset(V, ByteOffset, DL);
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if (ByteOffset < 0) // out of bounds
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return false;
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Type *BaseType = nullptr;
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unsigned BaseAlign = 0;
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if (const AllocaInst *AI = dyn_cast<AllocaInst>(Base)) {
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// An alloca is safe to load from as load as it is suitably aligned.
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BaseType = AI->getAllocatedType();
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BaseAlign = AI->getAlignment();
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} else if (const GlobalVariable *GV = dyn_cast<GlobalVariable>(Base)) {
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// Global variables are not necessarily safe to load from if they are
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// interposed arbitrarily. Their size may change or they may be weak and
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// require a test to determine if they were in fact provided.
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if (!GV->isInterposable()) {
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BaseType = GV->getType()->getElementType();
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BaseAlign = GV->getAlignment();
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}
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}
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PointerType *AddrTy = cast<PointerType>(V->getType());
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uint64_t LoadSize = DL.getTypeStoreSize(AddrTy->getElementType());
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// If we found a base allocated type from either an alloca or global variable,
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// try to see if we are definitively within the allocated region. We need to
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// know the size of the base type and the loaded type to do anything in this
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// case.
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if (BaseType && BaseType->isSized()) {
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if (BaseAlign == 0)
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BaseAlign = DL.getPrefTypeAlignment(BaseType);
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if (Align <= BaseAlign) {
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// Check if the load is within the bounds of the underlying object.
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if (ByteOffset + LoadSize <= DL.getTypeAllocSize(BaseType) &&
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((ByteOffset % Align) == 0))
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return true;
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}
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}
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if (!ScanFrom)
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return false;
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// Otherwise, be a little bit aggressive by scanning the local block where we
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// want to check to see if the pointer is already being loaded or stored
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// from/to. If so, the previous load or store would have already trapped,
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// so there is no harm doing an extra load (also, CSE will later eliminate
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// the load entirely).
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BasicBlock::iterator BBI = ScanFrom->getIterator(),
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E = ScanFrom->getParent()->begin();
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// We can at least always strip pointer casts even though we can't use the
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// base here.
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V = V->stripPointerCasts();
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while (BBI != E) {
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--BBI;
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// If we see a free or a call which may write to memory (i.e. which might do
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// a free) the pointer could be marked invalid.
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if (isa<CallInst>(BBI) && BBI->mayWriteToMemory() &&
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!isa<DbgInfoIntrinsic>(BBI))
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return false;
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Value *AccessedPtr;
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unsigned AccessedAlign;
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if (LoadInst *LI = dyn_cast<LoadInst>(BBI)) {
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// Ignore volatile loads. The execution of a volatile load cannot
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// be used to prove an address is backed by regular memory; it can,
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// for example, point to an MMIO register.
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if (LI->isVolatile())
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continue;
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AccessedPtr = LI->getPointerOperand();
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AccessedAlign = LI->getAlignment();
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} else if (StoreInst *SI = dyn_cast<StoreInst>(BBI)) {
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// Ignore volatile stores (see comment for loads).
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if (SI->isVolatile())
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continue;
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AccessedPtr = SI->getPointerOperand();
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AccessedAlign = SI->getAlignment();
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} else
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continue;
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Type *AccessedTy = AccessedPtr->getType()->getPointerElementType();
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if (AccessedAlign == 0)
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AccessedAlign = DL.getABITypeAlignment(AccessedTy);
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if (AccessedAlign < Align)
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continue;
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// Handle trivial cases.
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if (AccessedPtr == V)
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return true;
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if (AreEquivalentAddressValues(AccessedPtr->stripPointerCasts(), V) &&
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LoadSize <= DL.getTypeStoreSize(AccessedTy))
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return true;
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}
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return false;
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}
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/// DefMaxInstsToScan - the default number of maximum instructions
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/// to scan in the block, used by FindAvailableLoadedValue().
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/// FindAvailableLoadedValue() was introduced in r60148, to improve jump
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/// threading in part by eliminating partially redundant loads.
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/// At that point, the value of MaxInstsToScan was already set to '6'
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/// without documented explanation.
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cl::opt<unsigned>
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llvm::DefMaxInstsToScan("available-load-scan-limit", cl::init(6), cl::Hidden,
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cl::desc("Use this to specify the default maximum number of instructions "
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"to scan backward from a given instruction, when searching for "
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"available loaded value"));
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Value *llvm::FindAvailableLoadedValue(LoadInst *Load,
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BasicBlock *ScanBB,
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BasicBlock::iterator &ScanFrom,
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unsigned MaxInstsToScan,
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AliasAnalysis *AA, bool *IsLoad,
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unsigned *NumScanedInst) {
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// Don't CSE load that is volatile or anything stronger than unordered.
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if (!Load->isUnordered())
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return nullptr;
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return FindAvailablePtrLoadStore(
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Load->getPointerOperand(), Load->getType(), Load->isAtomic(), ScanBB,
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ScanFrom, MaxInstsToScan, AA, IsLoad, NumScanedInst);
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}
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Value *llvm::FindAvailablePtrLoadStore(Value *Ptr, Type *AccessTy,
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bool AtLeastAtomic, BasicBlock *ScanBB,
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BasicBlock::iterator &ScanFrom,
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unsigned MaxInstsToScan,
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AliasAnalysis *AA, bool *IsLoadCSE,
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unsigned *NumScanedInst) {
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if (MaxInstsToScan == 0)
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MaxInstsToScan = ~0U;
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const DataLayout &DL = ScanBB->getModule()->getDataLayout();
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// Try to get the store size for the type.
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auto AccessSize = LocationSize::precise(DL.getTypeStoreSize(AccessTy));
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Value *StrippedPtr = Ptr->stripPointerCasts();
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while (ScanFrom != ScanBB->begin()) {
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// We must ignore debug info directives when counting (otherwise they
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// would affect codegen).
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Instruction *Inst = &*--ScanFrom;
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if (isa<DbgInfoIntrinsic>(Inst))
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continue;
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// Restore ScanFrom to expected value in case next test succeeds
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ScanFrom++;
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if (NumScanedInst)
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++(*NumScanedInst);
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// Don't scan huge blocks.
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if (MaxInstsToScan-- == 0)
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return nullptr;
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--ScanFrom;
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// If this is a load of Ptr, the loaded value is available.
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// (This is true even if the load is volatile or atomic, although
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// those cases are unlikely.)
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if (LoadInst *LI = dyn_cast<LoadInst>(Inst))
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if (AreEquivalentAddressValues(
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LI->getPointerOperand()->stripPointerCasts(), StrippedPtr) &&
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CastInst::isBitOrNoopPointerCastable(LI->getType(), AccessTy, DL)) {
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// We can value forward from an atomic to a non-atomic, but not the
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// other way around.
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if (LI->isAtomic() < AtLeastAtomic)
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return nullptr;
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if (IsLoadCSE)
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*IsLoadCSE = true;
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return LI;
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}
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if (StoreInst *SI = dyn_cast<StoreInst>(Inst)) {
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Value *StorePtr = SI->getPointerOperand()->stripPointerCasts();
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// If this is a store through Ptr, the value is available!
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// (This is true even if the store is volatile or atomic, although
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// those cases are unlikely.)
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if (AreEquivalentAddressValues(StorePtr, StrippedPtr) &&
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CastInst::isBitOrNoopPointerCastable(SI->getValueOperand()->getType(),
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AccessTy, DL)) {
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// We can value forward from an atomic to a non-atomic, but not the
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// other way around.
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if (SI->isAtomic() < AtLeastAtomic)
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return nullptr;
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if (IsLoadCSE)
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*IsLoadCSE = false;
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return SI->getOperand(0);
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}
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// If both StrippedPtr and StorePtr reach all the way to an alloca or
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// global and they are different, ignore the store. This is a trivial form
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// of alias analysis that is important for reg2mem'd code.
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if ((isa<AllocaInst>(StrippedPtr) || isa<GlobalVariable>(StrippedPtr)) &&
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(isa<AllocaInst>(StorePtr) || isa<GlobalVariable>(StorePtr)) &&
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StrippedPtr != StorePtr)
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continue;
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// If we have alias analysis and it says the store won't modify the loaded
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// value, ignore the store.
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if (AA && !isModSet(AA->getModRefInfo(SI, StrippedPtr, AccessSize)))
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continue;
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// Otherwise the store that may or may not alias the pointer, bail out.
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++ScanFrom;
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return nullptr;
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}
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// If this is some other instruction that may clobber Ptr, bail out.
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if (Inst->mayWriteToMemory()) {
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// If alias analysis claims that it really won't modify the load,
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// ignore it.
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if (AA && !isModSet(AA->getModRefInfo(Inst, StrippedPtr, AccessSize)))
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continue;
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// May modify the pointer, bail out.
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++ScanFrom;
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return nullptr;
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}
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}
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// Got to the start of the block, we didn't find it, but are done for this
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// block.
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return nullptr;
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}
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