forked from OSchip/llvm-project
30 lines
958 B
YAML
30 lines
958 B
YAML
# RUN: llc -o /dev/null %s -mtriple=aarch64-- -run-pass=machine-scheduler -enable-misched -debug-only=misched 2>&1 | FileCheck %s
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# REQUIRES: asserts
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--- |
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define void @func() { ret void }
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...
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---
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# Check that the instructions are not dependent on each other, even though
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# they all read/write to the zero register.
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# CHECK-LABEL: MI Scheduling
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# CHECK: SU(0): %WZR<def,dead> = SUBSWri %W1, 0, 0, %NZCV<imp-def,dead>
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# CHECK: # succs left : 0
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# CHECK-NOT: Successors:
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# CHECK: SU(1): %W2<def> = COPY %WZR
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# CHECK: # succs left : 0
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# CHECK-NOT: Successors:
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# CHECK: SU(2): %WZR<def,dead> = SUBSWri %W3, 0, 0, %NZCV<imp-def,dead>
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# CHECK: # succs left : 0
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# CHECK-NOT: Successors:
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# CHECK: SU(3): %W4<def> = COPY %WZR
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# CHECK: # succs left : 0
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# CHECK-NOT: Successors:
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name: func
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body: |
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bb.0:
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dead %wzr = SUBSWri %w1, 0, 0, implicit-def dead %nzcv
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%w2 = COPY %wzr
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dead %wzr = SUBSWri %w3, 0, 0, implicit-def dead %nzcv
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%w4 = COPY %wzr
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...
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