forked from OSchip/llvm-project
459 lines
23 KiB
C
459 lines
23 KiB
C
// RUN: %clang_cc1 -triple x86_64-unknown-windows -emit-llvm -target-cpu core2 -o - %s | FileCheck %s
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#define SWIFTCALL __attribute__((swiftcall))
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#define OUT __attribute__((swift_indirect_result))
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#define ERROR __attribute__((swift_error_result))
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#define CONTEXT __attribute__((swift_context))
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// CHECK: [[STRUCT2_RESULT:@.*]] = private {{.*}} constant [[STRUCT2_TYPE:%.*]] { i32 0, i8 0, i8 undef, i8 0, float 0.000000e+00, float 0.000000e+00 }
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/*****************************************************************************/
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/****************************** PARAMETER ABIS *******************************/
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/*****************************************************************************/
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SWIFTCALL void indirect_result_1(OUT int *arg0, OUT float *arg1) {}
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// CHECK-LABEL: define {{.*}} void @indirect_result_1(i32* noalias sret align 4 dereferenceable(4){{.*}}, float* noalias align 4 dereferenceable(4){{.*}})
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// TODO: maybe this shouldn't suppress sret.
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SWIFTCALL int indirect_result_2(OUT int *arg0, OUT float *arg1) { __builtin_unreachable(); }
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// CHECK-LABEL: define {{.*}} i32 @indirect_result_2(i32* noalias align 4 dereferenceable(4){{.*}}, float* noalias align 4 dereferenceable(4){{.*}})
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typedef struct { char array[1024]; } struct_reallybig;
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SWIFTCALL struct_reallybig indirect_result_3(OUT int *arg0, OUT float *arg1) { __builtin_unreachable(); }
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// CHECK-LABEL: define {{.*}} void @indirect_result_3({{.*}}* noalias sret {{.*}}, i32* noalias align 4 dereferenceable(4){{.*}}, float* noalias align 4 dereferenceable(4){{.*}})
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SWIFTCALL void context_1(CONTEXT void *self) {}
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// CHECK-LABEL: define {{.*}} void @context_1(i8* swiftself
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SWIFTCALL void context_2(void *arg0, CONTEXT void *self) {}
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// CHECK-LABEL: define {{.*}} void @context_2(i8*{{.*}}, i8* swiftself
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SWIFTCALL void context_error_1(CONTEXT int *self, ERROR float **error) {}
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// CHECK-LABEL: define {{.*}} void @context_error_1(i32* swiftself{{.*}}, float** swifterror)
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// CHECK: [[TEMP:%.*]] = alloca float*, align 8
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// CHECK: [[T0:%.*]] = load float*, float** [[ERRORARG:%.*]], align 8
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// CHECK: store float* [[T0]], float** [[TEMP]], align 8
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// CHECK: [[T0:%.*]] = load float*, float** [[TEMP]], align 8
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// CHECK: store float* [[T0]], float** [[ERRORARG]], align 8
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void test_context_error_1() {
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int x;
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float *error;
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context_error_1(&x, &error);
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}
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// CHECK-LABEL: define void @test_context_error_1()
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// CHECK: [[X:%.*]] = alloca i32, align 4
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// CHECK: [[ERROR:%.*]] = alloca float*, align 8
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// CHECK: [[TEMP:%.*]] = alloca swifterror float*, align 8
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// CHECK: [[T0:%.*]] = load float*, float** [[ERROR]], align 8
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// CHECK: store float* [[T0]], float** [[TEMP]], align 8
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// CHECK: call [[SWIFTCC:swiftcc]] void @context_error_1(i32* swiftself [[X]], float** swifterror [[TEMP]])
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// CHECK: [[T0:%.*]] = load float*, float** [[TEMP]], align 8
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// CHECK: store float* [[T0]], float** [[ERROR]], align 8
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SWIFTCALL void context_error_2(short s, CONTEXT int *self, ERROR float **error) {}
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// CHECK-LABEL: define {{.*}} void @context_error_2(i16{{.*}}, i32* swiftself{{.*}}, float** swifterror)
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/*****************************************************************************/
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/********************************** LOWERING *********************************/
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/*****************************************************************************/
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typedef float float4 __attribute__((ext_vector_type(4)));
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typedef float float8 __attribute__((ext_vector_type(8)));
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typedef double double2 __attribute__((ext_vector_type(2)));
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typedef double double4 __attribute__((ext_vector_type(4)));
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typedef int int3 __attribute__((ext_vector_type(3)));
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typedef int int4 __attribute__((ext_vector_type(4)));
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typedef int int5 __attribute__((ext_vector_type(5)));
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typedef int int8 __attribute__((ext_vector_type(8)));
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#define TEST(TYPE) \
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SWIFTCALL TYPE return_##TYPE(void) { \
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TYPE result = {}; \
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return result; \
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} \
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SWIFTCALL void take_##TYPE(TYPE v) { \
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} \
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void test_##TYPE() { \
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take_##TYPE(return_##TYPE()); \
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}
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/*****************************************************************************/
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/*********************************** STRUCTS *********************************/
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/*****************************************************************************/
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typedef struct {
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} struct_empty;
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TEST(struct_empty);
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// CHECK-LABEL: define {{.*}} @return_struct_empty()
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// CHECK: ret void
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// CHECK-LABEL: define {{.*}} @take_struct_empty()
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// CHECK: ret void
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typedef struct {
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int x;
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char c0;
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char c1;
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float f0;
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float f1;
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} struct_1;
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TEST(struct_1);
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// CHECK-LABEL: define swiftcc { i64, i64 } @return_struct_1() {{.*}}{
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// CHECK: [[RET:%.*]] = alloca [[STRUCT1:%.*]], align 4
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// CHECK: [[VAR:%.*]] = alloca [[STRUCT1]], align 4
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// CHECK: call void @llvm.memset
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// CHECK: call void @llvm.memcpy
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// CHECK: [[CAST:%.*]] = bitcast [[STRUCT1]]* %retval to { i64, i64 }*
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// CHECK: [[GEP0:%.*]] = getelementptr inbounds { i64, i64 }, { i64, i64 }* [[CAST]], i32 0, i32 0
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// CHECK: [[T0:%.*]] = load i64, i64* [[GEP0]], align 4
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// CHECK: [[GEP1:%.*]] = getelementptr inbounds { i64, i64 }, { i64, i64 }* [[CAST]], i32 0, i32 1
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// CHECK: [[T1:%.*]] = load i64, i64* [[GEP1]], align 4
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// CHECK: [[R0:%.*]] = insertvalue { i64, i64 } undef, i64 [[T0]], 0
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// CHECK: [[R1:%.*]] = insertvalue { i64, i64 } [[R0]], i64 [[T1]], 1
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// CHECK: ret { i64, i64 } [[R1]]
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// CHECK: }
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// CHECK-LABEL: define swiftcc void @take_struct_1(i64, i64) {{.*}}{
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// CHECK: [[V:%.*]] = alloca [[STRUCT1:%.*]], align 4
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// CHECK: [[CAST:%.*]] = bitcast [[STRUCT1]]* [[V]] to { i64, i64 }*
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// CHECK: [[GEP0:%.*]] = getelementptr inbounds { i64, i64 }, { i64, i64 }* [[CAST]], i32 0, i32 0
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// CHECK: store i64 %0, i64* [[GEP0]], align 4
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// CHECK: [[GEP1:%.*]] = getelementptr inbounds { i64, i64 }, { i64, i64 }* [[CAST]], i32 0, i32 1
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// CHECK: store i64 %1, i64* [[GEP1]], align 4
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// CHECK: ret void
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// CHECK: }
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// CHECK-LABEL: define void @test_struct_1() {{.*}}{
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// CHECK: [[AGG:%.*]] = alloca [[STRUCT1:%.*]], align 4
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// CHECK: [[RET:%.*]] = call swiftcc { i64, i64 } @return_struct_1()
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// CHECK: [[CAST:%.*]] = bitcast [[STRUCT1]]* [[AGG]] to { i64, i64 }*
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// CHECK: [[GEP0:%.*]] = getelementptr inbounds { i64, i64 }, { i64, i64 }* [[CAST]], i32 0, i32 0
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// CHECK: [[E0:%.*]] = extractvalue { i64, i64 } [[RET]], 0
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// CHECK: store i64 [[E0]], i64* [[GEP0]], align 4
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// CHECK: [[GEP1:%.*]] = getelementptr inbounds { i64, i64 }, { i64, i64 }* [[CAST]], i32 0, i32 1
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// CHECK: [[E1:%.*]] = extractvalue { i64, i64 } [[RET]], 1
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// CHECK: store i64 [[E1]], i64* [[GEP1]], align 4
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// CHECK: [[CAST2:%.*]] = bitcast [[STRUCT1]]* [[AGG]] to { i64, i64 }*
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// CHECK: [[GEP2:%.*]] = getelementptr inbounds { i64, i64 }, { i64, i64 }* [[CAST2]], i32 0, i32 0
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// CHECK: [[V0:%.*]] = load i64, i64* [[GEP2]], align 4
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// CHECK: [[GEP3:%.*]] = getelementptr inbounds { i64, i64 }, { i64, i64 }* [[CAST2]], i32 0, i32 1
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// CHECK: [[V1:%.*]] = load i64, i64* [[GEP3]], align 4
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// CHECK: call swiftcc void @take_struct_1(i64 [[V0]], i64 [[V1]])
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// CHECK: ret void
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// CHECK: }
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typedef struct {
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int x;
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char c0;
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__attribute__((aligned(2))) char c1;
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float f0;
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float f1;
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} struct_2;
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TEST(struct_2);
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// CHECK-LABEL: define swiftcc { i64, i64 } @return_struct_2() {{.*}}{
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// CHECK: [[RET:%.*]] = alloca [[STRUCT2_TYPE]], align 4
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// CHECK: [[VAR:%.*]] = alloca [[STRUCT2_TYPE]], align 4
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// CHECK: [[CASTVAR:%.*]] = bitcast {{.*}} [[VAR]]
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// CHECK: call void @llvm.memcpy{{.*}}({{.*}}[[CASTVAR]], {{.*}}[[STRUCT2_RESULT]]
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// CHECK: [[CASTRET:%.*]] = bitcast {{.*}} [[RET]]
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// CHECK: [[CASTVAR:%.*]] = bitcast {{.*}} [[VAR]]
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// CHECK: call void @llvm.memcpy{{.*}}({{.*}}[[CASTRET]], {{.*}}[[CASTVAR]]
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// CHECK: [[CAST:%.*]] = bitcast [[STRUCT2_TYPE]]* [[RET]] to { i64, i64 }*
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// CHECK: [[GEP0:%.*]] = getelementptr inbounds { i64, i64 }, { i64, i64 }* [[CAST]], i32 0, i32 0
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// CHECK: [[T0:%.*]] = load i64, i64* [[GEP0]], align 4
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// CHECK: [[GEP1:%.*]] = getelementptr inbounds { i64, i64 }, { i64, i64 }* [[CAST]], i32 0, i32 1
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// CHECK: [[T1:%.*]] = load i64, i64* [[GEP1]], align 4
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// CHECK: [[R0:%.*]] = insertvalue { i64, i64 } undef, i64 [[T0]], 0
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// CHECK: [[R1:%.*]] = insertvalue { i64, i64 } [[R0]], i64 [[T1]], 1
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// CHECK: ret { i64, i64 } [[R1]]
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// CHECK: }
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// CHECK-LABEL: define swiftcc void @take_struct_2(i64, i64) {{.*}}{
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// CHECK: [[V:%.*]] = alloca [[STRUCT:%.*]], align 4
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// CHECK: [[CAST:%.*]] = bitcast [[STRUCT]]* [[V]] to { i64, i64 }*
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// CHECK: [[GEP0:%.*]] = getelementptr inbounds { i64, i64 }, { i64, i64 }* [[CAST]], i32 0, i32 0
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// CHECK: store i64 %0, i64* [[GEP0]], align 4
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// CHECK: [[GEP1:%.*]] = getelementptr inbounds { i64, i64 }, { i64, i64 }* [[CAST]], i32 0, i32 1
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// CHECK: store i64 %1, i64* [[GEP1]], align 4
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// CHECK: ret void
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// CHECK: }
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// CHECK-LABEL: define void @test_struct_2() {{.*}} {
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// CHECK: [[TMP:%.*]] = alloca [[STRUCT2_TYPE]], align 4
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// CHECK: [[CALL:%.*]] = call swiftcc { i64, i64 } @return_struct_2()
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// CHECK: [[CAST_TMP:%.*]] = bitcast [[STRUCT2_TYPE]]* [[TMP]] to { i64, i64 }*
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// CHECK: [[GEP:%.*]] = getelementptr inbounds {{.*}} [[CAST_TMP]], i32 0, i32 0
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// CHECK: [[T0:%.*]] = extractvalue { i64, i64 } [[CALL]], 0
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// CHECK: store i64 [[T0]], i64* [[GEP]], align 4
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// CHECK: [[GEP:%.*]] = getelementptr inbounds {{.*}} [[CAST_TMP]], i32 0, i32 1
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// CHECK: [[T0:%.*]] = extractvalue { i64, i64 } [[CALL]], 1
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// CHECK: store i64 [[T0]], i64* [[GEP]], align 4
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// CHECK: [[CAST:%.*]] = bitcast [[STRUCT2_TYPE]]* [[TMP]] to { i64, i64 }*
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// CHECK: [[GEP:%.*]] = getelementptr inbounds { i64, i64 }, { i64, i64 }* [[CAST]], i32 0, i32 0
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// CHECK: [[R0:%.*]] = load i64, i64* [[GEP]], align 4
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// CHECK: [[GEP:%.*]] = getelementptr inbounds { i64, i64 }, { i64, i64 }* [[CAST]], i32 0, i32 1
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// CHECK: [[R1:%.*]] = load i64, i64* [[GEP]], align 4
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// CHECK: call swiftcc void @take_struct_2(i64 [[R0]], i64 [[R1]])
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// CHECK: ret void
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// CHECK: }
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// There's no way to put a field randomly in the middle of an otherwise
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// empty storage unit in C, so that case has to be tested in C++, which
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// can use empty structs to introduce arbitrary padding. (In C, they end up
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// with size 0 and so don't affect layout.)
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// Misaligned data rule.
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typedef struct {
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char c0;
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__attribute__((packed)) float f;
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} struct_misaligned_1;
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TEST(struct_misaligned_1)
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// CHECK-LABEL: define swiftcc i64 @return_struct_misaligned_1()
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// CHECK: [[RET:%.*]] = alloca [[STRUCT:%.*]], align 1
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// CHECK: [[RES:%.*]] = alloca [[STRUCT]], align 1
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// CHECK: [[CAST:%.*]] = bitcast [[STRUCT]]* [[RES]] to i8*
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// CHECK: call void @llvm.memset{{.*}}(i8* [[CAST]], i8 0, i64 5
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// CHECK: [[CASTRET:%.*]] = bitcast [[STRUCT]]* [[RET]] to i8*
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// CHECK: [[CASTRES:%.*]] = bitcast [[STRUCT]]* [[RES]] to i8*
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// CHECK: call void @llvm.memcpy{{.*}}(i8* [[CASTRET]], i8* [[CASTRES]], i64 5
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// CHECK: [[CAST:%.*]] = bitcast [[STRUCT]]* [[RET]] to { i64 }*
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// CHECK: [[GEP:%.*]] = getelementptr inbounds { i64 }, { i64 }* [[CAST]], i32 0, i32 0
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// CHECK: [[R0:%.*]] = load i64, i64* [[GEP]], align 1
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// CHECK: ret i64 [[R0]]
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// CHECK:}
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// CHECK-LABEL: define swiftcc void @take_struct_misaligned_1(i64) {{.*}}{
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// CHECK: [[V:%.*]] = alloca [[STRUCT:%.*]], align 1
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// CHECK: [[CAST:%.*]] = bitcast [[STRUCT]]* [[V]] to { i64 }*
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// CHECK: [[GEP:%.*]] = getelementptr inbounds { i64 }, { i64 }* [[CAST]], i32 0, i32 0
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// CHECK: store i64 %0, i64* [[GEP]], align 1
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// CHECK: ret void
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// CHECK: }
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// CHECK: define void @test_struct_misaligned_1() {{.*}}{
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// CHECK: [[AGG:%.*]] = alloca [[STRUCT:%.*]], align 1
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// CHECK: [[CALL:%.*]] = call swiftcc i64 @return_struct_misaligned_1()
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// CHECK: [[T0:%.*]] = bitcast [[STRUCT]]* [[AGG]] to { i64 }*
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// CHECK: [[T1:%.*]] = getelementptr inbounds { i64 }, { i64 }* [[T0]], i32 0, i32 0
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// CHECK: store i64 [[CALL]], i64* [[T1]], align 1
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// CHECK: [[T0:%.*]] = bitcast [[STRUCT]]* [[AGG]] to { i64 }*
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// CHECK: [[T1:%.*]] = getelementptr inbounds { i64 }, { i64 }* [[T0]], i32 0, i32 0
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// CHECK: [[P:%.*]] = load i64, i64* [[T1]], align 1
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// CHECK: call swiftcc void @take_struct_misaligned_1(i64 [[P]])
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// CHECK: ret void
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// CHECK: }
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// Too many scalars.
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typedef struct {
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long long x[5];
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} struct_big_1;
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TEST(struct_big_1)
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// CHECK-LABEL: define {{.*}} void @return_struct_big_1({{.*}} noalias sret
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// Should not be byval.
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// CHECK-LABEL: define {{.*}} void @take_struct_big_1({{.*}}*{{( %.*)?}})
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/*****************************************************************************/
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/********************************* TYPE MERGING ******************************/
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/*****************************************************************************/
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typedef union {
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float f;
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double d;
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} union_het_fp;
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TEST(union_het_fp)
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// CHECK-LABEL: define swiftcc i64 @return_union_het_fp()
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// CHECK: [[RET:%.*]] = alloca [[UNION:%.*]], align 8
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// CHECK: [[RES:%.*]] = alloca [[UNION]], align 8
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// CHECK: [[CAST:%.*]] = bitcast [[UNION]]* [[RES]] to i8*
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// CHECK: call void @llvm.memcpy{{.*}}(i8* [[CAST]]
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// CHECK: [[CASTRET:%.*]] = bitcast [[UNION]]* [[RET]] to i8*
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// CHECK: [[CASTRES:%.*]] = bitcast [[UNION]]* [[RES]] to i8*
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// CHECK: call void @llvm.memcpy{{.*}}(i8* [[CASTRET]], i8* [[CASTRES]]
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// CHECK: [[CAST:%.*]] = bitcast [[UNION]]* [[RET]] to { i64 }*
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// CHECK: [[GEP:%.*]] = getelementptr inbounds { i64 }, { i64 }* [[CAST]], i32 0, i32 0
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// CHECK: [[R0:%.*]] = load i64, i64* [[GEP]], align 8
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// CHECK: ret i64 [[R0]]
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// CHECK-LABEL: define swiftcc void @take_union_het_fp(i64) {{.*}}{
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// CHECK: [[V:%.*]] = alloca [[UNION:%.*]], align 8
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// CHECK: [[CAST:%.*]] = bitcast [[UNION]]* [[V]] to { i64 }*
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// CHECK: [[GEP:%.*]] = getelementptr inbounds { i64 }, { i64 }* [[CAST]], i32 0, i32 0
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// CHECK: store i64 %0, i64* [[GEP]], align 8
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// CHECK: ret void
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// CHECK: }
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// CHECK-LABEL: define void @test_union_het_fp() {{.*}}{
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// CHECK: [[AGG:%.*]] = alloca [[UNION:%.*]], align 8
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// CHECK: [[CALL:%.*]] = call swiftcc i64 @return_union_het_fp()
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// CHECK: [[T0:%.*]] = bitcast [[UNION]]* [[AGG]] to { i64 }*
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// CHECK: [[T1:%.*]] = getelementptr inbounds { i64 }, { i64 }* [[T0]], i32 0, i32 0
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// CHECK: store i64 [[CALL]], i64* [[T1]], align 8
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// CHECK: [[T0:%.*]] = bitcast [[UNION]]* [[AGG]] to { i64 }*
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// CHECK: [[T1:%.*]] = getelementptr inbounds { i64 }, { i64 }* [[T0]], i32 0, i32 0
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// CHECK: [[V0:%.*]] = load i64, i64* [[T1]], align 8
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// CHECK: call swiftcc void @take_union_het_fp(i64 [[V0]])
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// CHECK: ret void
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// CHECK: }
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typedef union {
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float f1;
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float f2;
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} union_hom_fp;
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TEST(union_hom_fp)
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// CHECK-LABEL: define void @test_union_hom_fp()
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// CHECK: [[TMP:%.*]] = alloca [[REC:%.*]], align 4
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// CHECK: [[CALL:%.*]] = call [[SWIFTCC]] float @return_union_hom_fp()
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// CHECK: [[CAST_TMP:%.*]] = bitcast [[REC]]* [[TMP]] to [[AGG:{ float }]]*
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// CHECK: [[T0:%.*]] = getelementptr inbounds [[AGG]], [[AGG]]* [[CAST_TMP]], i32 0, i32 0
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// CHECK: store float [[CALL]], float* [[T0]], align 4
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// CHECK: [[CAST_TMP:%.*]] = bitcast [[REC]]* [[TMP]] to [[AGG]]*
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// CHECK: [[T0:%.*]] = getelementptr inbounds [[AGG]], [[AGG]]* [[CAST_TMP]], i32 0, i32 0
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// CHECK: [[FIRST:%.*]] = load float, float* [[T0]], align 4
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// CHECK: call [[SWIFTCC]] void @take_union_hom_fp(float [[FIRST]])
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// CHECK: ret void
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typedef union {
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float f1;
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float4 fv2;
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} union_hom_fp_partial;
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TEST(union_hom_fp_partial)
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// CHECK: define void @test_union_hom_fp_partial()
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// CHECK: [[AGG:%.*]] = alloca [[UNION:%.*]], align 16
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// CHECK: [[CALL:%.*]] = call swiftcc { i64, i64 } @return_union_hom_fp_partial()
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// CHECK: [[CAST:%.*]] = bitcast [[UNION]]* [[AGG]] to { i64, i64 }*
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// CHECK: [[T0:%.*]] = getelementptr inbounds { i64, i64 }, { i64, i64 }* [[CAST]], i32 0, i32 0
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// CHECK: [[T1:%.*]] = extractvalue { i64, i64 } [[CALL]], 0
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// CHECK: store i64 [[T1]], i64* [[T0]], align 16
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// CHECK: [[T0:%.*]] = getelementptr inbounds { i64, i64 }, { i64, i64 }* [[CAST]], i32 0, i32 1
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// CHECK: [[T1:%.*]] = extractvalue { i64, i64 } [[CALL]], 1
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// CHECK: store i64 [[T1]], i64* [[T0]], align 8
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// CHECK: [[CAST:%.*]] = bitcast [[UNION]]* [[AGG]] to { i64, i64 }*
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// CHECK: [[T0:%.*]] = getelementptr inbounds { i64, i64 }, { i64, i64 }* [[CAST]], i32 0, i32 0
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// CHECK: [[V0:%.*]] = load i64, i64* [[T0]], align 16
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// CHECK: [[T0:%.*]] = getelementptr inbounds { i64, i64 }, { i64, i64 }* [[CAST]], i32 0, i32 1
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// CHECK: [[V1:%.*]] = load i64, i64* [[T0]], align 8
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// CHECK: call swiftcc void @take_union_hom_fp_partial(i64 [[V0]], i64 [[V1]])
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// CHECK: ret void
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// CHECK: }
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typedef union {
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struct { int x, y; } f1;
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float4 fv2;
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} union_het_fpv_partial;
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TEST(union_het_fpv_partial)
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// CHECK-LABEL: define void @test_union_het_fpv_partial()
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// CHECK: [[AGG:%.*]] = alloca [[UNION:%.*]], align 16
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// CHECK: [[CALL:%.*]] = call swiftcc { i64, i64 } @return_union_het_fpv_partial()
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// CHECK: [[CAST:%.*]] = bitcast [[UNION]]* [[AGG]] to { i64, i64 }*
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// CHECK: [[T0:%.*]] = getelementptr inbounds { i64, i64 }, { i64, i64 }* [[CAST]], i32 0, i32 0
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// CHECK: [[T1:%.*]] = extractvalue { i64, i64 } [[CALL]], 0
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// CHECK: store i64 [[T1]], i64* [[T0]], align 16
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// CHECK: [[T0:%.*]] = getelementptr inbounds { i64, i64 }, { i64, i64 }* [[CAST]], i32 0, i32 1
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// CHECK: [[T1:%.*]] = extractvalue { i64, i64 } [[CALL]], 1
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|
// CHECK: store i64 [[T1]], i64* [[T0]], align 8
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|
// CHECK: [[CAST:%.*]] = bitcast [[UNION]]* [[AGG]] to { i64, i64 }*
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|
// CHECK: [[T0:%.*]] = getelementptr inbounds { i64, i64 }, { i64, i64 }* [[CAST]], i32 0, i32 0
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|
// CHECK: [[V0:%.*]] = load i64, i64* [[T0]], align 16
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|
// CHECK: [[T0:%.*]] = getelementptr inbounds { i64, i64 }, { i64, i64 }* [[CAST]], i32 0, i32 1
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|
// CHECK: [[V1:%.*]] = load i64, i64* [[T0]], align 8
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|
// CHECK: call swiftcc void @take_union_het_fpv_partial(i64 [[V0]], i64 [[V1]])
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// CHECK: ret void
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// CHECK: }
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|
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/*****************************************************************************/
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|
/****************************** VECTOR LEGALIZATION **************************/
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|
/*****************************************************************************/
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|
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TEST(int4)
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// CHECK-LABEL: define {{.*}} <4 x i32> @return_int4()
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// CHECK-LABEL: define {{.*}} @take_int4(<4 x i32>
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|
|
|
TEST(int8)
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// CHECK-LABEL: define {{.*}} @return_int8()
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|
// CHECK: [[RET:%.*]] = alloca [[REC:<8 x i32>]], align 32
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|
// CHECK: [[VAR:%.*]] = alloca [[REC]], align
|
|
// CHECK: store
|
|
// CHECK: load
|
|
// CHECK: store
|
|
// CHECK: [[CAST_TMP:%.*]] = bitcast [[REC]]* [[RET]] to [[AGG:{ <4 x i32>, <4 x i32> }]]*
|
|
// CHECK: [[T0:%.*]] = getelementptr inbounds [[AGG]], [[AGG]]* [[CAST_TMP]], i32 0, i32 0
|
|
// CHECK: [[FIRST:%.*]] = load <4 x i32>, <4 x i32>* [[T0]], align
|
|
// CHECK: [[T0:%.*]] = getelementptr inbounds [[AGG]], [[AGG]]* [[CAST_TMP]], i32 0, i32 1
|
|
// CHECK: [[SECOND:%.*]] = load <4 x i32>, <4 x i32>* [[T0]], align
|
|
// CHECK: [[T0:%.*]] = insertvalue [[UAGG:{ <4 x i32>, <4 x i32> }]] undef, <4 x i32> [[FIRST]], 0
|
|
// CHECK: [[T1:%.*]] = insertvalue [[UAGG]] [[T0]], <4 x i32> [[SECOND]], 1
|
|
// CHECK: ret [[UAGG]] [[T1]]
|
|
// CHECK-LABEL: define {{.*}} @take_int8(<4 x i32>, <4 x i32>)
|
|
// CHECK: [[V:%.*]] = alloca [[REC]], align
|
|
// CHECK: [[CAST_TMP:%.*]] = bitcast [[REC]]* [[V]] to [[AGG]]*
|
|
// CHECK: [[T0:%.*]] = getelementptr inbounds [[AGG]], [[AGG]]* [[CAST_TMP]], i32 0, i32 0
|
|
// CHECK: store <4 x i32> %0, <4 x i32>* [[T0]], align
|
|
// CHECK: [[T0:%.*]] = getelementptr inbounds [[AGG]], [[AGG]]* [[CAST_TMP]], i32 0, i32 1
|
|
// CHECK: store <4 x i32> %1, <4 x i32>* [[T0]], align
|
|
// CHECK: ret void
|
|
// CHECK-LABEL: define void @test_int8()
|
|
// CHECK: [[TMP1:%.*]] = alloca [[REC]], align
|
|
// CHECK: [[TMP2:%.*]] = alloca [[REC]], align
|
|
// CHECK: [[CALL:%.*]] = call [[SWIFTCC]] [[UAGG]] @return_int8()
|
|
// CHECK: [[CAST_TMP:%.*]] = bitcast [[REC]]* [[TMP1]] to [[AGG]]*
|
|
// CHECK: [[T0:%.*]] = getelementptr inbounds [[AGG]], [[AGG]]* [[CAST_TMP]], i32 0, i32 0
|
|
// CHECK: [[T1:%.*]] = extractvalue [[UAGG]] [[CALL]], 0
|
|
// CHECK: store <4 x i32> [[T1]], <4 x i32>* [[T0]], align
|
|
// CHECK: [[T0:%.*]] = getelementptr inbounds [[AGG]], [[AGG]]* [[CAST_TMP]], i32 0, i32 1
|
|
// CHECK: [[T1:%.*]] = extractvalue [[UAGG]] [[CALL]], 1
|
|
// CHECK: store <4 x i32> [[T1]], <4 x i32>* [[T0]], align
|
|
// CHECK: [[V:%.*]] = load [[REC]], [[REC]]* [[TMP1]], align
|
|
// CHECK: store [[REC]] [[V]], [[REC]]* [[TMP2]], align
|
|
// CHECK: [[CAST_TMP:%.*]] = bitcast [[REC]]* [[TMP2]] to [[AGG]]*
|
|
// CHECK: [[T0:%.*]] = getelementptr inbounds [[AGG]], [[AGG]]* [[CAST_TMP]], i32 0, i32 0
|
|
// CHECK: [[FIRST:%.*]] = load <4 x i32>, <4 x i32>* [[T0]], align
|
|
// CHECK: [[T0:%.*]] = getelementptr inbounds [[AGG]], [[AGG]]* [[CAST_TMP]], i32 0, i32 1
|
|
// CHECK: [[SECOND:%.*]] = load <4 x i32>, <4 x i32>* [[T0]], align
|
|
// CHECK: call [[SWIFTCC]] void @take_int8(<4 x i32> [[FIRST]], <4 x i32> [[SECOND]])
|
|
// CHECK: ret void
|
|
|
|
TEST(int5)
|
|
// CHECK-LABEL: define {{.*}} @return_int5()
|
|
// CHECK: [[RET:%.*]] = alloca [[REC:<5 x i32>]], align 32
|
|
// CHECK: [[VAR:%.*]] = alloca [[REC]], align
|
|
// CHECK: store
|
|
// CHECK: load
|
|
// CHECK: store
|
|
// CHECK: [[CAST_TMP:%.*]] = bitcast [[REC]]* [[RET]] to [[AGG:{ <4 x i32>, i32 }]]*
|
|
// CHECK: [[T0:%.*]] = getelementptr inbounds [[AGG]], [[AGG]]* [[CAST_TMP]], i32 0, i32 0
|
|
// CHECK: [[FIRST:%.*]] = load <4 x i32>, <4 x i32>* [[T0]], align
|
|
// CHECK: [[T0:%.*]] = getelementptr inbounds [[AGG]], [[AGG]]* [[CAST_TMP]], i32 0, i32 1
|
|
// CHECK: [[SECOND:%.*]] = load i32, i32* [[T0]], align
|
|
// CHECK: [[T0:%.*]] = insertvalue [[UAGG:{ <4 x i32>, i32 }]] undef, <4 x i32> [[FIRST]], 0
|
|
// CHECK: [[T1:%.*]] = insertvalue [[UAGG]] [[T0]], i32 [[SECOND]], 1
|
|
// CHECK: ret [[UAGG]] [[T1]]
|
|
// CHECK-LABEL: define {{.*}} @take_int5(<4 x i32>, i32)
|
|
// CHECK: [[V:%.*]] = alloca [[REC]], align
|
|
// CHECK: [[CAST_TMP:%.*]] = bitcast [[REC]]* [[V]] to [[AGG]]*
|
|
// CHECK: [[T0:%.*]] = getelementptr inbounds [[AGG]], [[AGG]]* [[CAST_TMP]], i32 0, i32 0
|
|
// CHECK: store <4 x i32> %0, <4 x i32>* [[T0]], align
|
|
// CHECK: [[T0:%.*]] = getelementptr inbounds [[AGG]], [[AGG]]* [[CAST_TMP]], i32 0, i32 1
|
|
// CHECK: store i32 %1, i32* [[T0]], align
|
|
// CHECK: ret void
|
|
// CHECK-LABEL: define void @test_int5()
|
|
// CHECK: [[TMP1:%.*]] = alloca [[REC]], align
|
|
// CHECK: [[TMP2:%.*]] = alloca [[REC]], align
|
|
// CHECK: [[CALL:%.*]] = call [[SWIFTCC]] [[UAGG]] @return_int5()
|
|
// CHECK: [[CAST_TMP:%.*]] = bitcast [[REC]]* [[TMP1]] to [[AGG]]*
|
|
// CHECK: [[T0:%.*]] = getelementptr inbounds [[AGG]], [[AGG]]* [[CAST_TMP]], i32 0, i32 0
|
|
// CHECK: [[T1:%.*]] = extractvalue [[UAGG]] [[CALL]], 0
|
|
// CHECK: store <4 x i32> [[T1]], <4 x i32>* [[T0]], align
|
|
// CHECK: [[T0:%.*]] = getelementptr inbounds [[AGG]], [[AGG]]* [[CAST_TMP]], i32 0, i32 1
|
|
// CHECK: [[T1:%.*]] = extractvalue [[UAGG]] [[CALL]], 1
|
|
// CHECK: store i32 [[T1]], i32* [[T0]], align
|
|
// CHECK: [[V:%.*]] = load [[REC]], [[REC]]* [[TMP1]], align
|
|
// CHECK: store [[REC]] [[V]], [[REC]]* [[TMP2]], align
|
|
// CHECK: [[CAST_TMP:%.*]] = bitcast [[REC]]* [[TMP2]] to [[AGG]]*
|
|
// CHECK: [[T0:%.*]] = getelementptr inbounds [[AGG]], [[AGG]]* [[CAST_TMP]], i32 0, i32 0
|
|
// CHECK: [[FIRST:%.*]] = load <4 x i32>, <4 x i32>* [[T0]], align
|
|
// CHECK: [[T0:%.*]] = getelementptr inbounds [[AGG]], [[AGG]]* [[CAST_TMP]], i32 0, i32 1
|
|
// CHECK: [[SECOND:%.*]] = load i32, i32* [[T0]], align
|
|
// CHECK: call [[SWIFTCC]] void @take_int5(<4 x i32> [[FIRST]], i32 [[SECOND]])
|
|
// CHECK: ret void
|
|
|
|
typedef struct {
|
|
int x;
|
|
int3 v __attribute__((packed));
|
|
} misaligned_int3;
|
|
TEST(misaligned_int3)
|
|
// CHECK-LABEL: define swiftcc void @take_misaligned_int3(i64, i64)
|