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llvm-project/llvm/test/MC/Mips/mips64r5
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Daniel Sanders e4e83a7bc1 [mips] Added support for various EVA ASE instructions. 
Summary:
Added support for the following instructions:

CACHEE, LBE, LBUE, LHE, LHUE, LWE, LLE, LWLE, LWRE, PREFE,
SBE, SHE, SWE, SCE, SWLE, SWRE, TLBINV, TLBINVF

This required adding some infrastructure for the EVA ASE.

Patch by Scott Egerton.

Reviewers: vkalintiris, dsanders

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D11139

llvm-svn: 247669
 		2015-09-15 10:02:16 +00:00
..
abi-bad.s
…
abiflags.s
…
invalid-mips64.s [mips] Added support for the ERETNC instruction. 2015-07-20 12:28:56 +00:00
invalid-mips64r2.s [mips] Added support for the ERETNC instruction. 2015-07-20 12:28:56 +00:00
invalid-mips64r3.s [mips] Added support for the ERETNC instruction. 2015-07-20 12:28:56 +00:00
invalid.s
…
valid-xfail.s
…
valid.s [mips] Added support for various EVA ASE instructions. 2015-09-15 10:02:16 +00:00