forked from OSchip/llvm-project
d391e4fe84
Be more consistent in the naming convention for the various RET instructions to specify in terms of bitwidth. Helps prevent future scheduler model mismatches like those that were only addressed in D44687. Differential Revision: https://reviews.llvm.org/D113302 |
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AArch64 | ||
ARM | ||
Common | ||
Mips | ||
PowerPC | ||
X86 | ||
BenchmarkRunnerTest.cpp | ||
CMakeLists.txt | ||
ClusteringTest.cpp | ||
PerfHelperTest.cpp | ||
RegisterValueTest.cpp |