forked from OSchip/llvm-project
653 lines
22 KiB
C++
653 lines
22 KiB
C++
//===- X86.cpp ------------------------------------------------------------===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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#include "InputFiles.h"
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#include "Symbols.h"
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#include "SyntheticSections.h"
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#include "Target.h"
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#include "lld/Common/ErrorHandler.h"
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#include "llvm/Support/Endian.h"
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using namespace llvm;
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using namespace llvm::support::endian;
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using namespace llvm::ELF;
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using namespace lld;
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using namespace lld::elf;
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namespace {
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class X86 : public TargetInfo {
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public:
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X86();
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int getTlsGdRelaxSkip(RelType type) const override;
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RelExpr getRelExpr(RelType type, const Symbol &s,
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const uint8_t *loc) const override;
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int64_t getImplicitAddend(const uint8_t *buf, RelType type) const override;
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void writeGotPltHeader(uint8_t *buf) const override;
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RelType getDynRel(RelType type) const override;
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void writeGotPlt(uint8_t *buf, const Symbol &s) const override;
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void writeIgotPlt(uint8_t *buf, const Symbol &s) const override;
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void writePltHeader(uint8_t *buf) const override;
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void writePlt(uint8_t *buf, const Symbol &sym,
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uint64_t pltEntryAddr) const override;
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void relocate(uint8_t *loc, const Relocation &rel,
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uint64_t val) const override;
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RelExpr adjustTlsExpr(RelType type, RelExpr expr) const override;
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void relaxTlsGdToIe(uint8_t *loc, const Relocation &rel,
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uint64_t val) const override;
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void relaxTlsGdToLe(uint8_t *loc, const Relocation &rel,
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uint64_t val) const override;
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void relaxTlsIeToLe(uint8_t *loc, const Relocation &rel,
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uint64_t val) const override;
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void relaxTlsLdToLe(uint8_t *loc, const Relocation &rel,
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uint64_t val) const override;
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};
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} // namespace
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X86::X86() {
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copyRel = R_386_COPY;
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gotRel = R_386_GLOB_DAT;
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noneRel = R_386_NONE;
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pltRel = R_386_JUMP_SLOT;
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iRelativeRel = R_386_IRELATIVE;
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relativeRel = R_386_RELATIVE;
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symbolicRel = R_386_32;
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tlsGotRel = R_386_TLS_TPOFF;
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tlsModuleIndexRel = R_386_TLS_DTPMOD32;
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tlsOffsetRel = R_386_TLS_DTPOFF32;
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pltHeaderSize = 16;
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pltEntrySize = 16;
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ipltEntrySize = 16;
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trapInstr = {0xcc, 0xcc, 0xcc, 0xcc}; // 0xcc = INT3
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// Align to the non-PAE large page size (known as a superpage or huge page).
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// FreeBSD automatically promotes large, superpage-aligned allocations.
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defaultImageBase = 0x400000;
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}
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int X86::getTlsGdRelaxSkip(RelType type) const {
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return 2;
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}
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RelExpr X86::getRelExpr(RelType type, const Symbol &s,
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const uint8_t *loc) const {
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// There are 4 different TLS variable models with varying degrees of
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// flexibility and performance. LocalExec and InitialExec models are fast but
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// less-flexible models. If they are in use, we set DF_STATIC_TLS flag in the
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// dynamic section to let runtime know about that.
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if (type == R_386_TLS_LE || type == R_386_TLS_LE_32 || type == R_386_TLS_IE ||
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type == R_386_TLS_GOTIE)
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config->hasStaticTlsModel = true;
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switch (type) {
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case R_386_8:
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case R_386_16:
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case R_386_32:
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return R_ABS;
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case R_386_TLS_LDO_32:
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return R_DTPREL;
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case R_386_TLS_GD:
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return R_TLSGD_GOTPLT;
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case R_386_TLS_LDM:
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return R_TLSLD_GOTPLT;
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case R_386_PLT32:
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return R_PLT_PC;
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case R_386_PC8:
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case R_386_PC16:
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case R_386_PC32:
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return R_PC;
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case R_386_GOTPC:
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return R_GOTPLTONLY_PC;
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case R_386_TLS_IE:
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return R_GOT;
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case R_386_GOT32:
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case R_386_GOT32X:
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// These relocations are arguably mis-designed because their calculations
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// depend on the instructions they are applied to. This is bad because we
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// usually don't care about whether the target section contains valid
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// machine instructions or not. But this is part of the documented ABI, so
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// we had to implement as the standard requires.
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//
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// x86 does not support PC-relative data access. Therefore, in order to
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// access GOT contents, a GOT address needs to be known at link-time
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// (which means non-PIC) or compilers have to emit code to get a GOT
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// address at runtime (which means code is position-independent but
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// compilers need to emit extra code for each GOT access.) This decision
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// is made at compile-time. In the latter case, compilers emit code to
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// load a GOT address to a register, which is usually %ebx.
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//
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// So, there are two ways to refer to symbol foo's GOT entry: foo@GOT or
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// foo@GOT(%ebx).
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//
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// foo@GOT is not usable in PIC. If we are creating a PIC output and if we
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// find such relocation, we should report an error. foo@GOT is resolved to
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// an *absolute* address of foo's GOT entry, because both GOT address and
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// foo's offset are known. In other words, it's G + A.
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//
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// foo@GOT(%ebx) needs to be resolved to a *relative* offset from a GOT to
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// foo's GOT entry in the table, because GOT address is not known but foo's
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// offset in the table is known. It's G + A - GOT.
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//
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// It's unfortunate that compilers emit the same relocation for these
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// different use cases. In order to distinguish them, we have to read a
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// machine instruction.
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//
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// The following code implements it. We assume that Loc[0] is the first byte
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// of a displacement or an immediate field of a valid machine
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// instruction. That means a ModRM byte is at Loc[-1]. By taking a look at
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// the byte, we can determine whether the instruction uses the operand as an
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// absolute address (R_GOT) or a register-relative address (R_GOTPLT).
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return (loc[-1] & 0xc7) == 0x5 ? R_GOT : R_GOTPLT;
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case R_386_TLS_GOTIE:
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return R_GOTPLT;
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case R_386_GOTOFF:
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return R_GOTPLTREL;
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case R_386_TLS_LE:
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return R_TPREL;
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case R_386_TLS_LE_32:
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return R_TPREL_NEG;
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case R_386_NONE:
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return R_NONE;
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default:
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error(getErrorLocation(loc) + "unknown relocation (" + Twine(type) +
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") against symbol " + toString(s));
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return R_NONE;
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}
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}
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RelExpr X86::adjustTlsExpr(RelType type, RelExpr expr) const {
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switch (expr) {
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default:
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return expr;
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case R_RELAX_TLS_GD_TO_IE:
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return R_RELAX_TLS_GD_TO_IE_GOTPLT;
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case R_RELAX_TLS_GD_TO_LE:
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return R_RELAX_TLS_GD_TO_LE_NEG;
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}
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}
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void X86::writeGotPltHeader(uint8_t *buf) const {
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write32le(buf, mainPart->dynamic->getVA());
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}
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void X86::writeGotPlt(uint8_t *buf, const Symbol &s) const {
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// Entries in .got.plt initially points back to the corresponding
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// PLT entries with a fixed offset to skip the first instruction.
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write32le(buf, s.getPltVA() + 6);
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}
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void X86::writeIgotPlt(uint8_t *buf, const Symbol &s) const {
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// An x86 entry is the address of the ifunc resolver function.
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write32le(buf, s.getVA());
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}
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RelType X86::getDynRel(RelType type) const {
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if (type == R_386_TLS_LE)
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return R_386_TLS_TPOFF;
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if (type == R_386_TLS_LE_32)
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return R_386_TLS_TPOFF32;
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return type;
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}
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void X86::writePltHeader(uint8_t *buf) const {
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if (config->isPic) {
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const uint8_t v[] = {
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0xff, 0xb3, 0x04, 0x00, 0x00, 0x00, // pushl 4(%ebx)
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0xff, 0xa3, 0x08, 0x00, 0x00, 0x00, // jmp *8(%ebx)
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0x90, 0x90, 0x90, 0x90 // nop
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};
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memcpy(buf, v, sizeof(v));
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return;
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}
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const uint8_t pltData[] = {
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0xff, 0x35, 0, 0, 0, 0, // pushl (GOTPLT+4)
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0xff, 0x25, 0, 0, 0, 0, // jmp *(GOTPLT+8)
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0x90, 0x90, 0x90, 0x90, // nop
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};
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memcpy(buf, pltData, sizeof(pltData));
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uint32_t gotPlt = in.gotPlt->getVA();
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write32le(buf + 2, gotPlt + 4);
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write32le(buf + 8, gotPlt + 8);
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}
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void X86::writePlt(uint8_t *buf, const Symbol &sym,
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uint64_t pltEntryAddr) const {
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unsigned relOff = in.relaPlt->entsize * sym.pltIndex;
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if (config->isPic) {
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const uint8_t inst[] = {
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0xff, 0xa3, 0, 0, 0, 0, // jmp *foo@GOT(%ebx)
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0x68, 0, 0, 0, 0, // pushl $reloc_offset
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0xe9, 0, 0, 0, 0, // jmp .PLT0@PC
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};
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memcpy(buf, inst, sizeof(inst));
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write32le(buf + 2, sym.getGotPltVA() - in.gotPlt->getVA());
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} else {
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const uint8_t inst[] = {
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0xff, 0x25, 0, 0, 0, 0, // jmp *foo@GOT
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0x68, 0, 0, 0, 0, // pushl $reloc_offset
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0xe9, 0, 0, 0, 0, // jmp .PLT0@PC
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};
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memcpy(buf, inst, sizeof(inst));
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write32le(buf + 2, sym.getGotPltVA());
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}
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write32le(buf + 7, relOff);
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write32le(buf + 12, in.plt->getVA() - pltEntryAddr - 16);
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}
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int64_t X86::getImplicitAddend(const uint8_t *buf, RelType type) const {
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switch (type) {
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case R_386_8:
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case R_386_PC8:
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return SignExtend64<8>(*buf);
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case R_386_16:
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case R_386_PC16:
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return SignExtend64<16>(read16le(buf));
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case R_386_32:
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case R_386_GLOB_DAT:
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case R_386_GOT32:
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case R_386_GOT32X:
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case R_386_GOTOFF:
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case R_386_GOTPC:
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case R_386_IRELATIVE:
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case R_386_PC32:
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case R_386_PLT32:
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case R_386_RELATIVE:
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case R_386_TLS_DTPMOD32:
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case R_386_TLS_DTPOFF32:
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case R_386_TLS_LDO_32:
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case R_386_TLS_LDM:
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case R_386_TLS_IE:
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case R_386_TLS_IE_32:
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case R_386_TLS_LE:
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case R_386_TLS_LE_32:
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case R_386_TLS_GD:
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case R_386_TLS_GD_32:
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case R_386_TLS_GOTIE:
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case R_386_TLS_TPOFF:
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case R_386_TLS_TPOFF32:
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return SignExtend64<32>(read32le(buf));
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case R_386_NONE:
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case R_386_JUMP_SLOT:
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// These relocations are defined as not having an implicit addend.
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return 0;
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default:
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internalLinkerError(getErrorLocation(buf),
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"cannot read addend for relocation " + toString(type));
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return 0;
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}
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}
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void X86::relocate(uint8_t *loc, const Relocation &rel, uint64_t val) const {
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switch (rel.type) {
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case R_386_8:
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// R_386_{PC,}{8,16} are not part of the i386 psABI, but they are
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// being used for some 16-bit programs such as boot loaders, so
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// we want to support them.
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checkIntUInt(loc, val, 8, rel);
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*loc = val;
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break;
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case R_386_PC8:
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checkInt(loc, val, 8, rel);
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*loc = val;
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break;
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case R_386_16:
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checkIntUInt(loc, val, 16, rel);
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write16le(loc, val);
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break;
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case R_386_PC16:
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// R_386_PC16 is normally used with 16 bit code. In that situation
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// the PC is 16 bits, just like the addend. This means that it can
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// point from any 16 bit address to any other if the possibility
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// of wrapping is included.
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// The only restriction we have to check then is that the destination
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// address fits in 16 bits. That is impossible to do here. The problem is
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// that we are passed the final value, which already had the
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// current location subtracted from it.
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// We just check that Val fits in 17 bits. This misses some cases, but
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// should have no false positives.
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checkInt(loc, val, 17, rel);
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write16le(loc, val);
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break;
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case R_386_32:
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case R_386_GOT32:
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case R_386_GOT32X:
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case R_386_GOTOFF:
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case R_386_GOTPC:
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case R_386_PC32:
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case R_386_PLT32:
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case R_386_RELATIVE:
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case R_386_TLS_DTPMOD32:
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case R_386_TLS_DTPOFF32:
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case R_386_TLS_GD:
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case R_386_TLS_GOTIE:
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case R_386_TLS_IE:
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case R_386_TLS_LDM:
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case R_386_TLS_LDO_32:
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case R_386_TLS_LE:
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case R_386_TLS_LE_32:
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case R_386_TLS_TPOFF:
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case R_386_TLS_TPOFF32:
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checkInt(loc, val, 32, rel);
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write32le(loc, val);
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break;
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default:
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llvm_unreachable("unknown relocation");
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}
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}
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void X86::relaxTlsGdToLe(uint8_t *loc, const Relocation &, uint64_t val) const {
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// Convert
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// leal x@tlsgd(, %ebx, 1),
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// call __tls_get_addr@plt
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// to
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// movl %gs:0,%eax
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// subl $x@ntpoff,%eax
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const uint8_t inst[] = {
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0x65, 0xa1, 0x00, 0x00, 0x00, 0x00, // movl %gs:0, %eax
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0x81, 0xe8, 0, 0, 0, 0, // subl Val(%ebx), %eax
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};
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memcpy(loc - 3, inst, sizeof(inst));
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write32le(loc + 5, val);
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}
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void X86::relaxTlsGdToIe(uint8_t *loc, const Relocation &, uint64_t val) const {
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// Convert
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// leal x@tlsgd(, %ebx, 1),
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// call __tls_get_addr@plt
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// to
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// movl %gs:0, %eax
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// addl x@gotntpoff(%ebx), %eax
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const uint8_t inst[] = {
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0x65, 0xa1, 0x00, 0x00, 0x00, 0x00, // movl %gs:0, %eax
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0x03, 0x83, 0, 0, 0, 0, // addl Val(%ebx), %eax
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};
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memcpy(loc - 3, inst, sizeof(inst));
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write32le(loc + 5, val);
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}
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// In some conditions, relocations can be optimized to avoid using GOT.
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// This function does that for Initial Exec to Local Exec case.
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void X86::relaxTlsIeToLe(uint8_t *loc, const Relocation &rel,
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uint64_t val) const {
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// Ulrich's document section 6.2 says that @gotntpoff can
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// be used with MOVL or ADDL instructions.
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// @indntpoff is similar to @gotntpoff, but for use in
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// position dependent code.
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uint8_t reg = (loc[-1] >> 3) & 7;
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if (rel.type == R_386_TLS_IE) {
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if (loc[-1] == 0xa1) {
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// "movl foo@indntpoff,%eax" -> "movl $foo,%eax"
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// This case is different from the generic case below because
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// this is a 5 byte instruction while below is 6 bytes.
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loc[-1] = 0xb8;
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} else if (loc[-2] == 0x8b) {
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// "movl foo@indntpoff,%reg" -> "movl $foo,%reg"
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loc[-2] = 0xc7;
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loc[-1] = 0xc0 | reg;
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} else {
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// "addl foo@indntpoff,%reg" -> "addl $foo,%reg"
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loc[-2] = 0x81;
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loc[-1] = 0xc0 | reg;
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}
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} else {
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assert(rel.type == R_386_TLS_GOTIE);
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if (loc[-2] == 0x8b) {
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// "movl foo@gottpoff(%rip),%reg" -> "movl $foo,%reg"
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loc[-2] = 0xc7;
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loc[-1] = 0xc0 | reg;
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} else {
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// "addl foo@gotntpoff(%rip),%reg" -> "leal foo(%reg),%reg"
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loc[-2] = 0x8d;
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loc[-1] = 0x80 | (reg << 3) | reg;
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}
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}
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write32le(loc, val);
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}
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void X86::relaxTlsLdToLe(uint8_t *loc, const Relocation &rel,
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uint64_t val) const {
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if (rel.type == R_386_TLS_LDO_32) {
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write32le(loc, val);
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return;
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}
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// Convert
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// leal foo(%reg),%eax
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// call ___tls_get_addr
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// to
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// movl %gs:0,%eax
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// nop
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// leal 0(%esi,1),%esi
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const uint8_t inst[] = {
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0x65, 0xa1, 0x00, 0x00, 0x00, 0x00, // movl %gs:0,%eax
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0x90, // nop
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0x8d, 0x74, 0x26, 0x00, // leal 0(%esi,1),%esi
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};
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memcpy(loc - 2, inst, sizeof(inst));
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}
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// If Intel Indirect Branch Tracking is enabled, we have to emit special PLT
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// entries containing endbr32 instructions. A PLT entry will be split into two
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// parts, one in .plt.sec (writePlt), and the other in .plt (writeIBTPlt).
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namespace {
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class IntelIBT : public X86 {
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public:
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IntelIBT();
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void writeGotPlt(uint8_t *buf, const Symbol &s) const override;
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void writePlt(uint8_t *buf, const Symbol &sym,
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uint64_t pltEntryAddr) const override;
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void writeIBTPlt(uint8_t *buf, size_t numEntries) const override;
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static const unsigned IBTPltHeaderSize = 16;
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};
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} // namespace
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IntelIBT::IntelIBT() { pltHeaderSize = 0; }
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void IntelIBT::writeGotPlt(uint8_t *buf, const Symbol &s) const {
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uint64_t va =
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in.ibtPlt->getVA() + IBTPltHeaderSize + s.pltIndex * pltEntrySize;
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write32le(buf, va);
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}
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void IntelIBT::writePlt(uint8_t *buf, const Symbol &sym,
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uint64_t /*pltEntryAddr*/) const {
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if (config->isPic) {
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const uint8_t inst[] = {
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0xf3, 0x0f, 0x1e, 0xfb, // endbr32
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0xff, 0xa3, 0, 0, 0, 0, // jmp *name@GOT(%ebx)
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0x66, 0x0f, 0x1f, 0x44, 0, 0, // nop
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};
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memcpy(buf, inst, sizeof(inst));
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write32le(buf + 6, sym.getGotPltVA() - in.gotPlt->getVA());
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return;
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}
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|
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const uint8_t inst[] = {
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0xf3, 0x0f, 0x1e, 0xfb, // endbr32
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0xff, 0x25, 0, 0, 0, 0, // jmp *foo@GOT
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0x66, 0x0f, 0x1f, 0x44, 0, 0, // nop
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};
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memcpy(buf, inst, sizeof(inst));
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write32le(buf + 6, sym.getGotPltVA());
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}
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void IntelIBT::writeIBTPlt(uint8_t *buf, size_t numEntries) const {
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writePltHeader(buf);
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buf += IBTPltHeaderSize;
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|
|
|
const uint8_t inst[] = {
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0xf3, 0x0f, 0x1e, 0xfb, // endbr32
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0x68, 0, 0, 0, 0, // pushl $reloc_offset
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0xe9, 0, 0, 0, 0, // jmpq .PLT0@PC
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0x66, 0x90, // nop
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};
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|
|
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for (size_t i = 0; i < numEntries; ++i) {
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memcpy(buf, inst, sizeof(inst));
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write32le(buf + 5, i * sizeof(object::ELF32LE::Rel));
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write32le(buf + 10, -pltHeaderSize - sizeof(inst) * i - 30);
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buf += sizeof(inst);
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|
}
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|
}
|
|
|
|
namespace {
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|
class RetpolinePic : public X86 {
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|
public:
|
|
RetpolinePic();
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void writeGotPlt(uint8_t *buf, const Symbol &s) const override;
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|
void writePltHeader(uint8_t *buf) const override;
|
|
void writePlt(uint8_t *buf, const Symbol &sym,
|
|
uint64_t pltEntryAddr) const override;
|
|
};
|
|
|
|
class RetpolineNoPic : public X86 {
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|
public:
|
|
RetpolineNoPic();
|
|
void writeGotPlt(uint8_t *buf, const Symbol &s) const override;
|
|
void writePltHeader(uint8_t *buf) const override;
|
|
void writePlt(uint8_t *buf, const Symbol &sym,
|
|
uint64_t pltEntryAddr) const override;
|
|
};
|
|
} // namespace
|
|
|
|
RetpolinePic::RetpolinePic() {
|
|
pltHeaderSize = 48;
|
|
pltEntrySize = 32;
|
|
ipltEntrySize = 32;
|
|
}
|
|
|
|
void RetpolinePic::writeGotPlt(uint8_t *buf, const Symbol &s) const {
|
|
write32le(buf, s.getPltVA() + 17);
|
|
}
|
|
|
|
void RetpolinePic::writePltHeader(uint8_t *buf) const {
|
|
const uint8_t insn[] = {
|
|
0xff, 0xb3, 4, 0, 0, 0, // 0: pushl 4(%ebx)
|
|
0x50, // 6: pushl %eax
|
|
0x8b, 0x83, 8, 0, 0, 0, // 7: mov 8(%ebx), %eax
|
|
0xe8, 0x0e, 0x00, 0x00, 0x00, // d: call next
|
|
0xf3, 0x90, // 12: loop: pause
|
|
0x0f, 0xae, 0xe8, // 14: lfence
|
|
0xeb, 0xf9, // 17: jmp loop
|
|
0xcc, 0xcc, 0xcc, 0xcc, 0xcc, 0xcc, 0xcc, // 19: int3; .align 16
|
|
0x89, 0x0c, 0x24, // 20: next: mov %ecx, (%esp)
|
|
0x8b, 0x4c, 0x24, 0x04, // 23: mov 0x4(%esp), %ecx
|
|
0x89, 0x44, 0x24, 0x04, // 27: mov %eax ,0x4(%esp)
|
|
0x89, 0xc8, // 2b: mov %ecx, %eax
|
|
0x59, // 2d: pop %ecx
|
|
0xc3, // 2e: ret
|
|
0xcc, // 2f: int3; padding
|
|
};
|
|
memcpy(buf, insn, sizeof(insn));
|
|
}
|
|
|
|
void RetpolinePic::writePlt(uint8_t *buf, const Symbol &sym,
|
|
uint64_t pltEntryAddr) const {
|
|
unsigned relOff = in.relaPlt->entsize * sym.pltIndex;
|
|
const uint8_t insn[] = {
|
|
0x50, // pushl %eax
|
|
0x8b, 0x83, 0, 0, 0, 0, // mov foo@GOT(%ebx), %eax
|
|
0xe8, 0, 0, 0, 0, // call plt+0x20
|
|
0xe9, 0, 0, 0, 0, // jmp plt+0x12
|
|
0x68, 0, 0, 0, 0, // pushl $reloc_offset
|
|
0xe9, 0, 0, 0, 0, // jmp plt+0
|
|
0xcc, 0xcc, 0xcc, 0xcc, 0xcc, // int3; padding
|
|
};
|
|
memcpy(buf, insn, sizeof(insn));
|
|
|
|
uint32_t ebx = in.gotPlt->getVA();
|
|
unsigned off = pltEntryAddr - in.plt->getVA();
|
|
write32le(buf + 3, sym.getGotPltVA() - ebx);
|
|
write32le(buf + 8, -off - 12 + 32);
|
|
write32le(buf + 13, -off - 17 + 18);
|
|
write32le(buf + 18, relOff);
|
|
write32le(buf + 23, -off - 27);
|
|
}
|
|
|
|
RetpolineNoPic::RetpolineNoPic() {
|
|
pltHeaderSize = 48;
|
|
pltEntrySize = 32;
|
|
ipltEntrySize = 32;
|
|
}
|
|
|
|
void RetpolineNoPic::writeGotPlt(uint8_t *buf, const Symbol &s) const {
|
|
write32le(buf, s.getPltVA() + 16);
|
|
}
|
|
|
|
void RetpolineNoPic::writePltHeader(uint8_t *buf) const {
|
|
const uint8_t insn[] = {
|
|
0xff, 0x35, 0, 0, 0, 0, // 0: pushl GOTPLT+4
|
|
0x50, // 6: pushl %eax
|
|
0xa1, 0, 0, 0, 0, // 7: mov GOTPLT+8, %eax
|
|
0xe8, 0x0f, 0x00, 0x00, 0x00, // c: call next
|
|
0xf3, 0x90, // 11: loop: pause
|
|
0x0f, 0xae, 0xe8, // 13: lfence
|
|
0xeb, 0xf9, // 16: jmp loop
|
|
0xcc, 0xcc, 0xcc, 0xcc, 0xcc, // 18: int3
|
|
0xcc, 0xcc, 0xcc, // 1f: int3; .align 16
|
|
0x89, 0x0c, 0x24, // 20: next: mov %ecx, (%esp)
|
|
0x8b, 0x4c, 0x24, 0x04, // 23: mov 0x4(%esp), %ecx
|
|
0x89, 0x44, 0x24, 0x04, // 27: mov %eax ,0x4(%esp)
|
|
0x89, 0xc8, // 2b: mov %ecx, %eax
|
|
0x59, // 2d: pop %ecx
|
|
0xc3, // 2e: ret
|
|
0xcc, // 2f: int3; padding
|
|
};
|
|
memcpy(buf, insn, sizeof(insn));
|
|
|
|
uint32_t gotPlt = in.gotPlt->getVA();
|
|
write32le(buf + 2, gotPlt + 4);
|
|
write32le(buf + 8, gotPlt + 8);
|
|
}
|
|
|
|
void RetpolineNoPic::writePlt(uint8_t *buf, const Symbol &sym,
|
|
uint64_t pltEntryAddr) const {
|
|
unsigned relOff = in.relaPlt->entsize * sym.pltIndex;
|
|
const uint8_t insn[] = {
|
|
0x50, // 0: pushl %eax
|
|
0xa1, 0, 0, 0, 0, // 1: mov foo_in_GOT, %eax
|
|
0xe8, 0, 0, 0, 0, // 6: call plt+0x20
|
|
0xe9, 0, 0, 0, 0, // b: jmp plt+0x11
|
|
0x68, 0, 0, 0, 0, // 10: pushl $reloc_offset
|
|
0xe9, 0, 0, 0, 0, // 15: jmp plt+0
|
|
0xcc, 0xcc, 0xcc, 0xcc, 0xcc, // 1a: int3; padding
|
|
0xcc, // 1f: int3; padding
|
|
};
|
|
memcpy(buf, insn, sizeof(insn));
|
|
|
|
unsigned off = pltEntryAddr - in.plt->getVA();
|
|
write32le(buf + 2, sym.getGotPltVA());
|
|
write32le(buf + 7, -off - 11 + 32);
|
|
write32le(buf + 12, -off - 16 + 17);
|
|
write32le(buf + 17, relOff);
|
|
write32le(buf + 22, -off - 26);
|
|
}
|
|
|
|
TargetInfo *elf::getX86TargetInfo() {
|
|
if (config->zRetpolineplt) {
|
|
if (config->isPic) {
|
|
static RetpolinePic t;
|
|
return &t;
|
|
}
|
|
static RetpolineNoPic t;
|
|
return &t;
|
|
}
|
|
|
|
if (config->andFeatures & GNU_PROPERTY_X86_FEATURE_1_IBT) {
|
|
static IntelIBT t;
|
|
return &t;
|
|
}
|
|
|
|
static X86 t;
|
|
return &t;
|
|
}
|