forked from OSchip/llvm-project
172 lines
7.4 KiB
Plaintext
172 lines
7.4 KiB
Plaintext
// REQUIRES: x86-registered-target, amdgpu-registered-target
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// RUN: %clang_cc1 -triple amdgcn-amd-amdhsa -fcuda-is-device -std=c++11 \
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// RUN: -emit-llvm -o - -x hip %s | FileCheck \
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// RUN: -check-prefixes=COMMON,DEV,NORDC-D %s
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// RUN: %clang_cc1 -triple amdgcn-amd-amdhsa -fcuda-is-device -std=c++11 \
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// RUN: -emit-llvm -fgpu-rdc -cuid=abc -o - -x hip %s > %t.dev
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// RUN: cat %t.dev | FileCheck -check-prefixes=COMMON,DEV,RDC-D %s
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// RUN: %clang_cc1 -triple x86_64-gnu-linux -std=c++11 \
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// RUN: -emit-llvm -o - -x hip %s | FileCheck \
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// RUN: -check-prefixes=COMMON,HOST,NORDC %s
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// RUN: %clang_cc1 -triple x86_64-gnu-linux -std=c++11 \
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// RUN: -emit-llvm -fgpu-rdc -cuid=abc -o - -x hip %s > %t.host
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// RUN: cat %t.host | FileCheck -check-prefixes=COMMON,HOST,RDC %s
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// Check device and host compilation use the same postfix for static
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// variable name.
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// RUN: cat %t.dev %t.host | FileCheck -check-prefix=POSTFIX %s
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#include "Inputs/cuda.h"
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struct vec {
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float x,y,z;
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};
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// DEV-DAG: @x.managed = dso_local addrspace(1) externally_initialized global i32 1, align 4
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// DEV-DAG: @x = dso_local addrspace(1) externally_initialized global i32 addrspace(1)* null
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// NORDC-DAG: @x.managed = internal global i32 1
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// RDC-DAG: @x.managed = dso_local global i32 1
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// NORDC-DAG: @x = internal externally_initialized global i32* null
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// RDC-DAG: @x = dso_local externally_initialized global i32* null
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// HOST-DAG: @[[DEVNAMEX:[0-9]+]] = {{.*}}c"x\00"
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__managed__ int x = 1;
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// DEV-DAG: @v.managed = dso_local addrspace(1) externally_initialized global [100 x %struct.vec] zeroinitializer, align 4
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// DEV-DAG: @v = dso_local addrspace(1) externally_initialized global [100 x %struct.vec] addrspace(1)* null
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__managed__ vec v[100];
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// DEV-DAG: @v2.managed = dso_local addrspace(1) externally_initialized global <{ %struct.vec, [99 x %struct.vec] }> <{ %struct.vec { float 1.000000e+00, float 1.000000e+00, float 1.000000e+00 }, [99 x %struct.vec] zeroinitializer }>, align 4
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// DEV-DAG: @v2 = dso_local addrspace(1) externally_initialized global <{ %struct.vec, [99 x %struct.vec] }> addrspace(1)* null
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__managed__ vec v2[100] = {{1, 1, 1}};
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// DEV-DAG: @ex.managed = external addrspace(1) global i32, align 4
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// DEV-DAG: @ex = external addrspace(1) externally_initialized global i32 addrspace(1)*
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// HOST-DAG: @ex.managed = external global i32
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// HOST-DAG: @ex = external externally_initialized global i32*
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extern __managed__ int ex;
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// NORDC-D-DAG: @_ZL2sx.managed = dso_local addrspace(1) externally_initialized global i32 1, align 4
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// NORDC-D-DAG: @_ZL2sx = dso_local addrspace(1) externally_initialized global i32 addrspace(1)* null
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// RDC-D-DAG: @_ZL2sx.static.[[HASH:.*]].managed = dso_local addrspace(1) externally_initialized global i32 1, align 4
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// RDC-D-DAG: @_ZL2sx.static.[[HASH]] = dso_local addrspace(1) externally_initialized global i32 addrspace(1)* null
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// HOST-DAG: @_ZL2sx.managed = internal global i32 1
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// HOST-DAG: @_ZL2sx = internal externally_initialized global i32* null
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// NORDC-DAG: @[[DEVNAMESX:[0-9]+]] = {{.*}}c"_ZL2sx\00"
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// RDC-DAG: @[[DEVNAMESX:[0-9]+]] = {{.*}}c"_ZL2sx.static.[[HASH:.*]]\00"
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// POSTFIX: @_ZL2sx.static.[[HASH:.*]] = dso_local addrspace(1) externally_initialized global i32 addrspace(1)* null
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// POSTFIX: @[[DEVNAMESX:[0-9]+]] = {{.*}}c"_ZL2sx.static.[[HASH]]\00"
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static __managed__ int sx = 1;
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// DEV-DAG: @llvm.compiler.used
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// DEV-SAME-DAG: @x.managed
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// DEV-SAME-DAG: @x
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// DEV-SAME-DAG: @v.managed
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// DEV-SAME-DAG: @v
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// DEV-SAME-DAG: @_ZL2sx.managed
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// DEV-SAME-DAG: @_ZL2sx
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// Force ex and sx mitted in device compilation.
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__global__ void foo(int *z) {
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*z = x + ex + sx;
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v[1].x = 2;
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}
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// Force ex and sx emitted in host compilatioin.
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int foo2() {
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return ex + sx;
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}
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// COMMON-LABEL: define {{.*}}@_Z4loadv()
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// DEV: %ld.managed = load i32 addrspace(1)*, i32 addrspace(1)* addrspace(1)* @x, align 4
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// DEV: %0 = addrspacecast i32 addrspace(1)* %ld.managed to i32*
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// DEV: %1 = load i32, i32* %0, align 4
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// DEV: ret i32 %1
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// HOST: %ld.managed = load i32*, i32** @x, align 4
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// HOST: %0 = load i32, i32* %ld.managed, align 4
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// HOST: ret i32 %0
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__device__ __host__ int load() {
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return x;
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}
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// COMMON-LABEL: define {{.*}}@_Z5storev()
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// DEV: %ld.managed = load i32 addrspace(1)*, i32 addrspace(1)* addrspace(1)* @x, align 4
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// DEV: %0 = addrspacecast i32 addrspace(1)* %ld.managed to i32*
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// DEV: store i32 2, i32* %0, align 4
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// HOST: %ld.managed = load i32*, i32** @x, align 4
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// HOST: store i32 2, i32* %ld.managed, align 4
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__device__ __host__ void store() {
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x = 2;
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}
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// COMMON-LABEL: define {{.*}}@_Z10addr_takenv()
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// DEV: %0 = addrspacecast i32 addrspace(1)* %ld.managed to i32*
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// DEV: store i32* %0, i32** %p.ascast, align 8
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// DEV: %1 = load i32*, i32** %p.ascast, align 8
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// DEV: store i32 3, i32* %1, align 4
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// HOST: %ld.managed = load i32*, i32** @x, align 4
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// HOST: store i32* %ld.managed, i32** %p, align 8
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// HOST: %0 = load i32*, i32** %p, align 8
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// HOST: store i32 3, i32* %0, align 4
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__device__ __host__ void addr_taken() {
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int *p = &x;
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*p = 3;
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}
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// HOST-LABEL: define {{.*}}@_Z5load2v()
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// HOST: %ld.managed = load [100 x %struct.vec]*, [100 x %struct.vec]** @v, align 16
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// HOST: %0 = getelementptr inbounds [100 x %struct.vec], [100 x %struct.vec]* %ld.managed, i64 0, i64 1, i32 0
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// HOST: %1 = load float, float* %0, align 4
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// HOST: ret float %1
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__device__ __host__ float load2() {
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return v[1].x;
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}
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// HOST-LABEL: define {{.*}}@_Z5load3v()
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// HOST: %ld.managed = load <{ %struct.vec, [99 x %struct.vec] }>*, <{ %struct.vec, [99 x %struct.vec] }>** @v2, align 16
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// HOST: %0 = bitcast <{ %struct.vec, [99 x %struct.vec] }>* %ld.managed to [100 x %struct.vec]*
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// HOST: %1 = getelementptr inbounds [100 x %struct.vec], [100 x %struct.vec]* %0, i64 0, i64 1, i32 1
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// HOST: %2 = load float, float* %1, align 4
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// HOST: ret float %2
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float load3() {
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return v2[1].y;
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}
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// HOST-LABEL: define {{.*}}@_Z11addr_taken2v()
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// HOST: %ld.managed = load [100 x %struct.vec]*, [100 x %struct.vec]** @v, align 16
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// HOST: %0 = getelementptr inbounds [100 x %struct.vec], [100 x %struct.vec]* %ld.managed, i64 0, i64 1, i32 0
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// HOST: %1 = ptrtoint float* %0 to i64
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// HOST: %ld.managed1 = load <{ %struct.vec, [99 x %struct.vec] }>*, <{ %struct.vec, [99 x %struct.vec] }>** @v2, align 16
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// HOST: %2 = bitcast <{ %struct.vec, [99 x %struct.vec] }>* %ld.managed1 to [100 x %struct.vec]*
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// HOST: %3 = getelementptr inbounds [100 x %struct.vec], [100 x %struct.vec]* %2, i64 0, i64 1, i32 1
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// HOST: %4 = ptrtoint float* %3 to i64
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// HOST: %5 = sub i64 %4, %1
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// HOST: %6 = sdiv i64 %5, 4
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// HOST: %7 = sitofp i64 %6 to float
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// HOST: ret float %7
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float addr_taken2() {
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return (float)reinterpret_cast<long>(&(v2[1].y)-&(v[1].x));
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}
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// COMMON-LABEL: define {{.*}}@_Z5load4v()
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// DEV: %ld.managed = load i32 addrspace(1)*, i32 addrspace(1)* addrspace(1)* @ex, align 4
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// DEV: %0 = addrspacecast i32 addrspace(1)* %ld.managed to i32*
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// DEV: %1 = load i32, i32* %0, align 4
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// DEV: ret i32 %1
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// HOST: %ld.managed = load i32*, i32** @ex, align 4
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// HOST: %0 = load i32, i32* %ld.managed, align 4
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// HOST: ret i32 %0
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__device__ __host__ int load4() {
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return ex;
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}
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// HOST-DAG: __hipRegisterManagedVar({{.*}}@x {{.*}}@x.managed {{.*}}@[[DEVNAMEX]]{{.*}}, i64 4, i32 4)
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// HOST-DAG: __hipRegisterManagedVar({{.*}}@_ZL2sx {{.*}}@_ZL2sx.managed {{.*}}@[[DEVNAMESX]]
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// HOST-NOT: __hipRegisterManagedVar({{.*}}@ex {{.*}}@ex.managed
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// HOST-DAG: declare void @__hipRegisterManagedVar(i8**, i8*, i8*, i8*, i64, i32)
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