forked from OSchip/llvm-project
f18d95f756
At the time when the XCore backend was added there were some issues with with overlapping register classes but these all seem to be fixed now. Describing the register classes correctly allow us to get rid of a codegen only instruction (LDAWSP_lru6_RRegs) and it means we can disassemble ru6 instructions that use registers above r11. llvm-svn: 178782 |
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| CMakeLists.txt | ||
| LLVMBuild.txt | ||
| Makefile | ||
| XCoreDisassembler.cpp | ||