forked from OSchip/llvm-project
116 lines
2.5 KiB
LLVM
116 lines
2.5 KiB
LLVM
; RUN: llc -mtriple=aarch64-none-linux-gnu < %s | FileCheck %s
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; CHECK-LABEL: @test1
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; CHECK: sbfx {{x[0-9]+}}, x0, #23, #9
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define i64 @test1(i32 %a) {
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%tmp = ashr i32 %a, 23
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%ext = sext i32 %tmp to i64
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%res = add i64 %ext, 1
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ret i64 %res
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}
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; CHECK-LABEL: @test2
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; CHECK: sbfx w0, w0, #23, #8
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define signext i8 @test2(i32 %a) {
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%tmp = ashr i32 %a, 23
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%res = trunc i32 %tmp to i8
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ret i8 %res
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}
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; CHECK-LABEL: @test3
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; CHECK: sbfx w0, w0, #23, #8
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define signext i8 @test3(i32 %a) {
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%tmp = lshr i32 %a, 23
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%res = trunc i32 %tmp to i8
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ret i8 %res
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}
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; CHECK-LABEL: @test4
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; CHECK: sbfx w0, w0, #15, #16
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define signext i16 @test4(i32 %a) {
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%tmp = lshr i32 %a, 15
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%res = trunc i32 %tmp to i16
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ret i16 %res
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}
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; CHECK-LABEL: @test5
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; CHECK: sbfx w0, w0, #16, #8
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define signext i8 @test5(i64 %a) {
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%tmp = lshr i64 %a, 16
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%res = trunc i64 %tmp to i8
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ret i8 %res
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}
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; CHECK-LABEL: @test6
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; CHECK: sbfx x0, x0, #30, #8
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define signext i8 @test6(i64 %a) {
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%tmp = lshr i64 %a, 30
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%res = trunc i64 %tmp to i8
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ret i8 %res
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}
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; CHECK-LABEL: @test7
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; CHECK: sbfx x0, x0, #23, #16
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define signext i16 @test7(i64 %a) {
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%tmp = lshr i64 %a, 23
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%res = trunc i64 %tmp to i16
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ret i16 %res
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}
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; CHECK-LABEL: @test8
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; CHECK: asr w0, w0, #25
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define signext i8 @test8(i32 %a) {
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%tmp = ashr i32 %a, 25
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%res = trunc i32 %tmp to i8
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ret i8 %res
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}
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; CHECK-LABEL: @test9
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; CHECK: lsr w0, w0, #25
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define signext i8 @test9(i32 %a) {
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%tmp = lshr i32 %a, 25
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%res = trunc i32 %tmp to i8
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ret i8 %res
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}
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; CHECK-LABEL: @test10
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; CHECK: lsr x0, x0, #49
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define signext i16 @test10(i64 %a) {
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%tmp = lshr i64 %a, 49
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%res = trunc i64 %tmp to i16
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ret i16 %res
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}
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; SHR with multiple uses is fine as SXTH and SBFX are both aliases of SBFM.
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; However, allowing the transformation means the SHR and SBFX can execute in
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; parallel.
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;
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; CHECK-LABEL: @test11
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; CHECK: lsr x1, x0, #23
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; CHECK: sbfx x0, x0, #23, #16
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define void @test11(i64 %a) {
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%tmp = lshr i64 %a, 23
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%res = trunc i64 %tmp to i16
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call void @use(i16 %res, i64 %tmp)
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ret void
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}
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declare void @use(i16 signext, i64)
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; CHECK-LABEL: test_complex_node:
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; CHECK: ldr d0, [x0], #8
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; CHECK: ubfx x[[VAL:[0-9]+]], x0, #5, #27
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; CHECK: str w[[VAL]], [x2]
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define <2 x i32> @test_complex_node(<2 x i32>* %addr, <2 x i32>** %addr2, i32* %bf ) {
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%vec = load <2 x i32>, <2 x i32>* %addr
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%vec.next = getelementptr <2 x i32>, <2 x i32>* %addr, i32 1
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store <2 x i32>* %vec.next, <2 x i32>** %addr2
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%lo = ptrtoint <2 x i32>* %vec.next to i32
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%val = lshr i32 %lo, 5
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store i32 %val, i32* %bf
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ret <2 x i32> %vec
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}
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