llvm-project/llvm/test/CodeGen/SPARC
Joerg Sonnenberger 6e7cc49d5c [SPARC] Use the correct register set for the "r" asm constraint.
64bit mode must use 64bit registers, otherwise assumptions about the top
half of the registers are made. Problem found by Takeshi Nakayama in
NetBSD.

llvm-svn: 358998
2019-04-23 15:15:33 +00:00
..
32abi.ll [DAGCombiner] Set the right SDLoc on a newly-created zextload (1/N) 2018-05-01 19:26:15 +00:00
64abi.ll [DAGCombiner] Set the right SDLoc on a newly-created zextload (1/N) 2018-05-01 19:26:15 +00:00
64bit.ll
64cond.ll [Sparc] Return true in enableMultipleCopyHints(). 2018-02-24 08:24:31 +00:00
64spill.ll
2006-01-22-BitConvertLegalize.ll
2007-05-09-JumpTables.ll
2007-07-05-LiveIntervalAssert.ll
2008-10-10-InlineAsmMemoryOperand.ll
2008-10-10-InlineAsmRegOperand.ll
2009-08-28-PIC.ll
2009-08-28-WeakLinkage.ll
2011-01-11-CC.ll
2011-01-11-Call.ll
2011-01-11-FrameAddr.ll [Sparc] Flush register windows for @llvm.returnaddress(1) 2018-08-17 09:18:31 +00:00
2011-01-19-DelaySlot.ll
2011-01-21-ByValArgs.ll
2011-01-22-SRet.ll
2011-12-03-TailDuplication.ll
2012-05-01-LowerArguments.ll
2013-05-17-CallFrame.ll
DbgValueOtherTargets.test
LeonCASAInstructionUT.ll Relax fast register allocator related test cases; NFC 2018-10-29 20:10:42 +00:00
LeonDetectRoundChangePassUT.ll
LeonFixAllFDIVSQRTPassUT.ll
LeonInsertNOPLoadPassUT.ll
LeonItinerariesUT.ll
LeonSMACUMACInstructionUT.ll
analyze-branch.ll
atomics.ll [Sparc] Use synthetic instruction clr to zero register instead of sethi 2018-04-20 07:47:12 +00:00
basictest.ll
blockaddr.ll
cast-sret-func.ll [Sparc] Get sret arg size from CallLoweringInfo.getArgs() 2018-08-17 10:40:00 +00:00
codemodel.ll [Targets] Fixup incorrect targets in codemodel tests 2018-12-10 20:55:34 +00:00
constpool.ll
constructor.ll
ctpop.ll
disable-fsmuld-fmuls.ll
empty-functions.ll Replace "no-frame-pointer-*" function attributes with "frame-pointer" 2019-01-14 10:55:55 +00:00
exception.ll
fail-alloca-align.ll
float-constants.ll [Sparc] Custom bitcast between f64 and v2i32 2018-08-27 07:14:53 +00:00
float.ll
fp128.ll [Sparc] Fix incorrect MI insertion position for spilling f128. 2019-04-10 01:56:32 +00:00
func-addr.ll
globals.ll
imm.ll [Sparc] Use synthetic instruction clr to zero register instead of sethi 2018-04-20 07:47:12 +00:00
inlineasm-bad.ll [Sparc] Select correct register class for FP register constraints 2018-05-30 06:07:55 +00:00
inlineasm-v9.ll [Sparc] Select correct register class for FP register constraints 2018-05-30 06:07:55 +00:00
inlineasm.ll [Sparc] Use float register for integer constrained with "f" in inline asm 2018-12-13 15:13:29 +00:00
leafproc.ll
lit.local.cfg
mature-mc-support.ll
missing-sret.ll
missinglabel.ll [SelectionDAG] Add icmp UNDEF handling to SelectionDAG::FoldSetCC 2019-03-25 18:51:57 +00:00
mult-alt-generic-sparc.ll
multiple-div.ll
obj-relocs.ll
parts.ll
pic.ll [Sparc] Add support for 13-bit PIC 2018-06-11 05:50:08 +00:00
private.ll
readcycle.ll [Sparc] Add support for the cycle counter available in GR740 2018-08-27 11:11:47 +00:00
reg64.ll [SPARC] Use the correct register set for the "r" asm constraint. 2019-04-23 15:15:33 +00:00
register-clobber.ll
rem.ll Regenerate remainder test. 2018-07-20 13:14:29 +00:00
reserved-regs.ll
select-mask.ll
sethiandn.ll [Sparc] Use ANDN instead of AND if constant can be encoded more efficiently 2018-08-30 14:05:26 +00:00
setjmp.ll
soft-float.ll NFC - Various typo fixes in tests 2018-07-04 13:28:39 +00:00
soft-mul-div.ll [Sparc] Use the names .rem and .urem instead of __modsi3 and __umodsi3 2018-07-16 12:22:08 +00:00
spill.ll
spillsize.ll
sret-secondary.ll
stack-align.ll
stack-protector.ll
thread-pointer.ll
tls.ll [Sparc] Include __tls_get_addr in symbol table for TLS calls to it 2018-02-21 15:25:26 +00:00
trap.ll [Sparc] Do not depend on icc for ta 1 2018-07-17 05:49:33 +00:00
umulo-128-legalisation-lowering.ll [SelectionDAG] Improve the legalisation lowering of UMULO. 2018-08-16 18:39:39 +00:00
varargs-v8.ll Avoid losing Hi part when expanding VAARG nodes on big endian machines 2018-07-16 12:14:17 +00:00
varargs.ll
vector-call.ll
vector-extract-elt.ll [Sparc] Use synthetic instruction clr to zero register instead of sethi 2018-04-20 07:47:12 +00:00
zerostructcall.ll