forked from OSchip/llvm-project
c2e35a6f32
The 2nd loop calculates spill costs but reports free registers as cost 0 anyway, so there is little benefit from having a separate early loop. Surprisingly this is not NFC, as many register are marked regDisabled so the first loop often picks up later registers unnecessarily instead of the first one available in the allocation order... Patch by Matthias Braun llvm-svn: 356499 |
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.. | ||
br1.ll | ||
bricmpi1.ll | ||
bswap1.ll | ||
callabi.ll | ||
check-disabled-mcpus.ll | ||
constexpr-address.ll | ||
div1.ll | ||
double-arg.ll | ||
fast-isel-softfloat-lower-args.ll | ||
fastalloca.ll | ||
fastcc-miss.ll | ||
fpcmpa.ll | ||
fpext.ll | ||
fpintconv.ll | ||
fptrunc.ll | ||
icmpa.ll | ||
icmpbr1.ll | ||
icmpi1.ll | ||
loadstore2.ll | ||
loadstoreconv.ll | ||
loadstrconst.ll | ||
logopm.ll | ||
memtest1.ll | ||
mul1.ll | ||
nullvoid.ll | ||
overflt.ll | ||
pr40325.ll | ||
rem1.ll | ||
retabi.ll | ||
sel1.ll | ||
shftopm.ll | ||
shift.ll | ||
simplestore.ll | ||
simplestorefp1.ll | ||
simplestorei.ll | ||
stackloadstore.ll |