forked from OSchip/llvm-project
![]() target machine from those that are only needed by codegen. The goal is to sink the essential target description into MC layer so we can start building MC based tools without needing to link in the entire codegen. First step is to refactor TargetRegisterInfo. This patch added a base class MCRegisterInfo which TargetRegisterInfo is derived from. Changed TableGen to separate register description from the rest of the stuff. llvm-svn: 133782 |
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.. | ||
TargetInfo | ||
CMakeLists.txt | ||
Makefile | ||
README.txt | ||
XCore.h | ||
XCore.td | ||
XCoreAsmPrinter.cpp | ||
XCoreCallingConv.td | ||
XCoreFrameLowering.cpp | ||
XCoreFrameLowering.h | ||
XCoreISelDAGToDAG.cpp | ||
XCoreISelLowering.cpp | ||
XCoreISelLowering.h | ||
XCoreInstrFormats.td | ||
XCoreInstrInfo.cpp | ||
XCoreInstrInfo.h | ||
XCoreInstrInfo.td | ||
XCoreMCAsmInfo.cpp | ||
XCoreMCAsmInfo.h | ||
XCoreMachineFunctionInfo.h | ||
XCoreRegisterInfo.cpp | ||
XCoreRegisterInfo.h | ||
XCoreRegisterInfo.td | ||
XCoreSelectionDAGInfo.cpp | ||
XCoreSelectionDAGInfo.h | ||
XCoreSubtarget.cpp | ||
XCoreSubtarget.h | ||
XCoreTargetMachine.cpp | ||
XCoreTargetMachine.h | ||
XCoreTargetObjectFile.cpp | ||
XCoreTargetObjectFile.h |
README.txt
To-do ----- * Instruction encodings * Tailcalls * Investigate loop alignment * Add builtins