llvm-project/llvm/test/CodeGen
Matt Arsenault 312a9d1b83 GlobalISel: Fix narrowScalar for G_{CTLZ|CTTZ}_ZERO_UNDEF
Narrow these for 64-bit VALU for AMDGPU.
2020-02-09 19:02:38 -05:00
..
AArch64 [GlobalISel][CallLowering] Look through bitcasts from constant function pointers. 2020-02-07 15:32:54 -08:00
AMDGPU GlobalISel: Fix narrowScalar for G_{CTLZ|CTTZ}_ZERO_UNDEF 2020-02-09 19:02:38 -05:00
ARC
ARM Revert "[ARM] Improve codegen of volatile load/store of i64" 2020-02-08 13:18:45 +00:00
AVR
BPF [BPF] disable ReduceLoadWidth during SelectionDag phase 2020-02-04 18:37:43 -08:00
Generic [CodeGenPrepare] Make TargetPassConfig required 2020-02-02 09:28:45 -08:00
Hexagon
Inputs
Lanai
MIR AMDGPU: Split denormal mode tracking bits 2020-02-04 10:44:21 -08:00
MSP430
Mips GlobalISel: Fix narrowing of G_CTLZ/G_CTTZ 2020-02-09 18:11:43 -05:00
NVPTX
PowerPC [PowerPC] Fix spilling of vector registers in PEI of EH aware functions 2020-02-07 14:41:52 -06:00
RISCV
SPARC
SystemZ [AsmPrinter] Print FP constant in hexadecimal form instead 2020-02-07 16:00:55 +00:00
Thumb
Thumb2 [AsmPrinter] Print FP constant in hexadecimal form instead 2020-02-07 16:00:55 +00:00
VE [VE] half fptrunc+store&load+fpext 2020-02-04 17:16:09 +01:00
WebAssembly [WebAssembly] Fix signature of __powitf2 libcall 2020-02-07 20:30:47 -08:00
WinCFGuard
WinEH
X86 [X86] combineConcatVectorOps - combine VROTLI/VROTRI ops 2020-02-09 21:50:10 +00:00
XCore