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llvm-project/llvm/test/MC/Disassembler
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Petar Jovanovic daf5169398 [mips] Add support for Global INValidate ASE 
This includes

  Instructions: ginvi, ginvt,

  Assembler directives: .set ginv, .set noginv, .module ginv, .module noginv

  Attribute: ginv

  .MIPS.abiflags: GINV (0x20000)

Patch by Vladimir Stefanovic.

Differential Revision: https://reviews.llvm.org/D46268

llvm-svn: 332624
 		2018-05-17 16:30:32 +00:00
..
AArch64 [AArch64] Fix spelling of ICH_ELRSR_EL2 system register 2018-02-06 09:39:04 +00:00
AMDGPU AMDGPU: Fix v_dot{4, 8}* instruction encoding 2018-05-15 19:32:47 +00:00
ARC [ARC] Add LImm support for J/JL 2018-04-13 15:10:34 +00:00
ARM [ARM]Decoding MSR with unpredictable destination register causes an assert 2018-03-06 15:21:19 +00:00
Hexagon [Hexagon] Remove trailing spaces, NFC 2017-11-22 20:43:00 +00:00
Lanai
…
Mips [mips] Add support for Global INValidate ASE 2018-05-17 16:30:32 +00:00
PowerPC [PowerPC] Code cleanup. Remove instructions that were withdrawn from Power 9. 2018-02-23 15:55:16 +00:00
Sparc
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SystemZ [SystemZ] Add support for IBM z14 processor (3/3) 2017-07-17 17:44:20 +00:00
WebAssembly [WebAssembly] Initial Disassembler. 2018-05-10 22:16:44 +00:00
X86 [x86] Introduce the enclv instruction 2018-05-08 07:11:05 +00:00
XCore
…