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llvm-project/llvm/lib/Target/RISCV/MCTargetDesc
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Mandeep Singh Grang ef0ebf2806 [RISCV] Implement MC layer support for the tail pseudoinstruction 
Summary:
This patch implements MC support for tail psuedo instruction.
A follow-up patch implements the codegen support as well as handling of the indirect tail pseudo instruction.

Reviewers: asb, apazos

Reviewed By: asb

Subscribers: rbar, johnrusso, simoncook, jordy.potman.lists, sabuasal, niosHD, kito-cheng, shiva0217, zzheng, edward-jones, llvm-commits

Differential Revision: https://reviews.llvm.org/D46221

llvm-svn: 332634
 		2018-05-17 17:31:27 +00:00
..
CMakeLists.txt Revert "[RISCV] implement li pseudo instruction" 2018-04-18 19:02:31 +00:00
LLVMBuild.txt [RISCV] Add RISCVInstPrinter and basic MC assembler tests 2017-08-15 13:08:29 +00:00
RISCVAsmBackend.cpp [RISCV] Define FeatureRelax and shouldForceRelocation for RISCV linker relaxation 2018-05-15 01:28:50 +00:00
RISCVBaseInfo.h [RISCV] MC layer support for load/store instructions of the C (compressed) extension 2017-12-07 12:50:32 +00:00
RISCVELFObjectWriter.cpp [RISCV] Support "call" pseudoinstruction in the MC layer 2018-04-25 14:18:55 +00:00
RISCVELFStreamer.cpp [RISCV] Support .option rvc and norvc assembler directives 2018-05-11 17:30:28 +00:00
RISCVELFStreamer.h [RISCV] Support .option rvc and norvc assembler directives 2018-05-11 17:30:28 +00:00
RISCVFixupKinds.h [RISCV] Support "call" pseudoinstruction in the MC layer 2018-04-25 14:18:55 +00:00
RISCVMCAsmInfo.cpp [RISCV] Add support for .half, .hword, .word, .dword directives 2018-05-17 05:58:08 +00:00
RISCVMCAsmInfo.h
…
RISCVMCCodeEmitter.cpp [RISCV] Implement MC layer support for the tail pseudoinstruction 2018-05-17 17:31:27 +00:00
RISCVMCExpr.cpp [RISCV] Support "call" pseudoinstruction in the MC layer 2018-04-25 14:18:55 +00:00
RISCVMCExpr.h [RISCV] Support "call" pseudoinstruction in the MC layer 2018-04-25 14:18:55 +00:00
RISCVMCTargetDesc.cpp [RISCV] Support .option rvc and norvc assembler directives 2018-05-11 17:30:28 +00:00
RISCVMCTargetDesc.h Thread MCSubtargetInfo through Target::createMCAsmBackend 2018-01-03 08:53:05 +00:00
RISCVTargetStreamer.cpp [RISCV] Support .option rvc and norvc assembler directives 2018-05-11 17:30:28 +00:00
RISCVTargetStreamer.h [RISCV] Support .option rvc and norvc assembler directives 2018-05-11 17:30:28 +00:00