forked from OSchip/llvm-project
330 lines
14 KiB
LLVM
330 lines
14 KiB
LLVM
; RUN: opt %loadPolly -analyze -polly-scops < %s | FileCheck %s
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;
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; void consequences(int *A, int bool_cond, int lhs, int rhs) {
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;
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; BC: *A = 0;
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; if (bool_cond)
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; S_BC: *A = 0;
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; M_BC: *A = 0;
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;
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; NEG_BC: *A = 0;
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; if (!bool_cond)
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; S_NEG_BC: *A = 0;
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; M_NEG_BC: *A = 0;
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;
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; SLT: *A = 0;
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; if (lhs < rhs)
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; S_SLT: *A = 0;
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; M_SLT: *A = 0;
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;
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; SLE: *A = 0;
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; if (lhs <= rhs)
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; S_SLE: *A = 0;
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; M_SLE: *A = 0;
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;
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; SGT: *A = 0;
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; if (lhs > rhs)
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; S_SGT: *A = 0;
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; M_SGT: *A = 0;
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;
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; SGE: *A = 0;
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; if (lhs >= rhs)
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; S_SGE: *A = 0;
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; M_SGE: *A = 0;
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;
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; EQ: *A = 0;
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; if (lhs == rhs)
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; S_EQ: *A = 0;
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; M_EQ: *A = 0;
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;
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; NEQ: *A = 0;
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; if (lhs != rhs)
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; S_NEQ: *A = 0;
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; M_NEQ: *A = 0;
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;
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; }
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; CHECK: Statements {
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; CHECK-NEXT: Stmt_BC
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; CHECK-NEXT: Domain :=
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; CHECK-NEXT: [bool_cond, lhs, rhs] -> { Stmt_BC[] };
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; CHECK-NEXT: Schedule :=
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; CHECK-NEXT: [bool_cond, lhs, rhs] -> { Stmt_BC[] -> [0] };
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; CHECK-NEXT: MustWriteAccess := [Reduction Type: NONE] [Scalar: 0]
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; CHECK-NEXT: [bool_cond, lhs, rhs] -> { Stmt_BC[] -> MemRef_A[0] };
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; CHECK-NEXT: Stmt_S_BC
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; CHECK-NEXT: Domain :=
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; CHECK-NEXT: [bool_cond, lhs, rhs] -> { Stmt_S_BC[] : bool_cond < 0 or bool_cond > 0 };
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; CHECK-NEXT: Schedule :=
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; CHECK-NEXT: [bool_cond, lhs, rhs] -> { Stmt_S_BC[] -> [1] : bool_cond < 0 or bool_cond > 0 };
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; CHECK-NEXT: MustWriteAccess := [Reduction Type: NONE] [Scalar: 0]
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; CHECK-NEXT: [bool_cond, lhs, rhs] -> { Stmt_S_BC[] -> MemRef_A[0] };
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; CHECK-NEXT: Stmt_M_BC
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; CHECK-NEXT: Domain :=
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; CHECK-NEXT: [bool_cond, lhs, rhs] -> { Stmt_M_BC[] };
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; CHECK-NEXT: Schedule :=
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; CHECK-NEXT: [bool_cond, lhs, rhs] -> { Stmt_M_BC[] -> [2] };
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; CHECK-NEXT: MustWriteAccess := [Reduction Type: NONE] [Scalar: 0]
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; CHECK-NEXT: [bool_cond, lhs, rhs] -> { Stmt_M_BC[] -> MemRef_A[0] };
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; CHECK-NEXT: Stmt_NEG_BC
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; CHECK-NEXT: Domain :=
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; CHECK-NEXT: [bool_cond, lhs, rhs] -> { Stmt_NEG_BC[] };
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; CHECK-NEXT: Schedule :=
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; CHECK-NEXT: [bool_cond, lhs, rhs] -> { Stmt_NEG_BC[] -> [3] };
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; CHECK-NEXT: MustWriteAccess := [Reduction Type: NONE] [Scalar: 0]
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; CHECK-NEXT: [bool_cond, lhs, rhs] -> { Stmt_NEG_BC[] -> MemRef_A[0] };
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; CHECK-NEXT: Stmt_S_NEG_BC
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; CHECK-NEXT: Domain :=
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; CHECK-NEXT: [bool_cond, lhs, rhs] -> { Stmt_S_NEG_BC[] : bool_cond = 0 };
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; CHECK-NEXT: Schedule :=
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; CHECK-NEXT: [bool_cond, lhs, rhs] -> { Stmt_S_NEG_BC[] -> [4] };
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; CHECK-NEXT: MustWriteAccess := [Reduction Type: NONE] [Scalar: 0]
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; CHECK-NEXT: [bool_cond, lhs, rhs] -> { Stmt_S_NEG_BC[] -> MemRef_A[0] };
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; CHECK-NEXT: Stmt_M_NEG_BC
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; CHECK-NEXT: Domain :=
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; CHECK-NEXT: [bool_cond, lhs, rhs] -> { Stmt_M_NEG_BC[] };
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; CHECK-NEXT: Schedule :=
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; CHECK-NEXT: [bool_cond, lhs, rhs] -> { Stmt_M_NEG_BC[] -> [5] };
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; CHECK-NEXT: MustWriteAccess := [Reduction Type: NONE] [Scalar: 0]
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; CHECK-NEXT: [bool_cond, lhs, rhs] -> { Stmt_M_NEG_BC[] -> MemRef_A[0] };
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; CHECK-NEXT: Stmt_SLT
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; CHECK-NEXT: Domain :=
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; CHECK-NEXT: [bool_cond, lhs, rhs] -> { Stmt_SLT[] };
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; CHECK-NEXT: Schedule :=
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; CHECK-NEXT: [bool_cond, lhs, rhs] -> { Stmt_SLT[] -> [6] };
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; CHECK-NEXT: MustWriteAccess := [Reduction Type: NONE] [Scalar: 0]
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; CHECK-NEXT: [bool_cond, lhs, rhs] -> { Stmt_SLT[] -> MemRef_A[0] };
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; CHECK-NEXT: Stmt_S_SLT
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; CHECK-NEXT: Domain :=
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; CHECK-NEXT: [bool_cond, lhs, rhs] -> { Stmt_S_SLT[] : rhs > lhs };
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; CHECK-NEXT: Schedule :=
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; CHECK-NEXT: [bool_cond, lhs, rhs] -> { Stmt_S_SLT[] -> [7] };
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; CHECK-NEXT: MustWriteAccess := [Reduction Type: NONE] [Scalar: 0]
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; CHECK-NEXT: [bool_cond, lhs, rhs] -> { Stmt_S_SLT[] -> MemRef_A[0] };
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; CHECK-NEXT: Stmt_M_SLT
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; CHECK-NEXT: Domain :=
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; CHECK-NEXT: [bool_cond, lhs, rhs] -> { Stmt_M_SLT[] };
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; CHECK-NEXT: Schedule :=
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; CHECK-NEXT: [bool_cond, lhs, rhs] -> { Stmt_M_SLT[] -> [8] };
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; CHECK-NEXT: MustWriteAccess := [Reduction Type: NONE] [Scalar: 0]
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; CHECK-NEXT: [bool_cond, lhs, rhs] -> { Stmt_M_SLT[] -> MemRef_A[0] };
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; CHECK-NEXT: Stmt_SLE
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; CHECK-NEXT: Domain :=
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; CHECK-NEXT: [bool_cond, lhs, rhs] -> { Stmt_SLE[] };
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; CHECK-NEXT: Schedule :=
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; CHECK-NEXT: [bool_cond, lhs, rhs] -> { Stmt_SLE[] -> [9] };
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; CHECK-NEXT: MustWriteAccess := [Reduction Type: NONE] [Scalar: 0]
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; CHECK-NEXT: [bool_cond, lhs, rhs] -> { Stmt_SLE[] -> MemRef_A[0] };
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; CHECK-NEXT: Stmt_S_SLE
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; CHECK-NEXT: Domain :=
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; CHECK-NEXT: [bool_cond, lhs, rhs] -> { Stmt_S_SLE[] : rhs >= lhs };
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; CHECK-NEXT: Schedule :=
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; CHECK-NEXT: [bool_cond, lhs, rhs] -> { Stmt_S_SLE[] -> [10] };
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; CHECK-NEXT: MustWriteAccess := [Reduction Type: NONE] [Scalar: 0]
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; CHECK-NEXT: [bool_cond, lhs, rhs] -> { Stmt_S_SLE[] -> MemRef_A[0] };
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; CHECK-NEXT: Stmt_M_SLE
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; CHECK-NEXT: Domain :=
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; CHECK-NEXT: [bool_cond, lhs, rhs] -> { Stmt_M_SLE[] };
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; CHECK-NEXT: Schedule :=
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; CHECK-NEXT: [bool_cond, lhs, rhs] -> { Stmt_M_SLE[] -> [11] };
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; CHECK-NEXT: MustWriteAccess := [Reduction Type: NONE] [Scalar: 0]
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; CHECK-NEXT: [bool_cond, lhs, rhs] -> { Stmt_M_SLE[] -> MemRef_A[0] };
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; CHECK-NEXT: Stmt_SGT
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; CHECK-NEXT: Domain :=
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; CHECK-NEXT: [bool_cond, lhs, rhs] -> { Stmt_SGT[] };
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; CHECK-NEXT: Schedule :=
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; CHECK-NEXT: [bool_cond, lhs, rhs] -> { Stmt_SGT[] -> [12] };
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; CHECK-NEXT: MustWriteAccess := [Reduction Type: NONE] [Scalar: 0]
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; CHECK-NEXT: [bool_cond, lhs, rhs] -> { Stmt_SGT[] -> MemRef_A[0] };
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; CHECK-NEXT: Stmt_S_SGT
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; CHECK-NEXT: Domain :=
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; CHECK-NEXT: [bool_cond, lhs, rhs] -> { Stmt_S_SGT[] : rhs < lhs };
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; CHECK-NEXT: Schedule :=
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; CHECK-NEXT: [bool_cond, lhs, rhs] -> { Stmt_S_SGT[] -> [13] };
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; CHECK-NEXT: MustWriteAccess := [Reduction Type: NONE] [Scalar: 0]
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; CHECK-NEXT: [bool_cond, lhs, rhs] -> { Stmt_S_SGT[] -> MemRef_A[0] };
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; CHECK-NEXT: Stmt_M_SGT
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; CHECK-NEXT: Domain :=
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; CHECK-NEXT: [bool_cond, lhs, rhs] -> { Stmt_M_SGT[] };
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; CHECK-NEXT: Schedule :=
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; CHECK-NEXT: [bool_cond, lhs, rhs] -> { Stmt_M_SGT[] -> [14] };
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; CHECK-NEXT: MustWriteAccess := [Reduction Type: NONE] [Scalar: 0]
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; CHECK-NEXT: [bool_cond, lhs, rhs] -> { Stmt_M_SGT[] -> MemRef_A[0] };
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; CHECK-NEXT: Stmt_SGE
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; CHECK-NEXT: Domain :=
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; CHECK-NEXT: [bool_cond, lhs, rhs] -> { Stmt_SGE[] };
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; CHECK-NEXT: Schedule :=
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; CHECK-NEXT: [bool_cond, lhs, rhs] -> { Stmt_SGE[] -> [15] };
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; CHECK-NEXT: MustWriteAccess := [Reduction Type: NONE] [Scalar: 0]
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; CHECK-NEXT: [bool_cond, lhs, rhs] -> { Stmt_SGE[] -> MemRef_A[0] };
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; CHECK-NEXT: Stmt_S_SGE
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; CHECK-NEXT: Domain :=
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; CHECK-NEXT: [bool_cond, lhs, rhs] -> { Stmt_S_SGE[] : rhs <= lhs };
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; CHECK-NEXT: Schedule :=
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; CHECK-NEXT: [bool_cond, lhs, rhs] -> { Stmt_S_SGE[] -> [16] };
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; CHECK-NEXT: MustWriteAccess := [Reduction Type: NONE] [Scalar: 0]
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; CHECK-NEXT: [bool_cond, lhs, rhs] -> { Stmt_S_SGE[] -> MemRef_A[0] };
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; CHECK-NEXT: Stmt_M_SGE
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; CHECK-NEXT: Domain :=
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; CHECK-NEXT: [bool_cond, lhs, rhs] -> { Stmt_M_SGE[] };
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; CHECK-NEXT: Schedule :=
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; CHECK-NEXT: [bool_cond, lhs, rhs] -> { Stmt_M_SGE[] -> [17] };
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; CHECK-NEXT: MustWriteAccess := [Reduction Type: NONE] [Scalar: 0]
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; CHECK-NEXT: [bool_cond, lhs, rhs] -> { Stmt_M_SGE[] -> MemRef_A[0] };
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; CHECK-NEXT: Stmt_EQ
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; CHECK-NEXT: Domain :=
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; CHECK-NEXT: [bool_cond, lhs, rhs] -> { Stmt_EQ[] };
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; CHECK-NEXT: Schedule :=
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; CHECK-NEXT: [bool_cond, lhs, rhs] -> { Stmt_EQ[] -> [18] };
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; CHECK-NEXT: MustWriteAccess := [Reduction Type: NONE] [Scalar: 0]
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; CHECK-NEXT: [bool_cond, lhs, rhs] -> { Stmt_EQ[] -> MemRef_A[0] };
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; CHECK-NEXT: Stmt_S_EQ
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; CHECK-NEXT: Domain :=
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; CHECK-NEXT: [bool_cond, lhs, rhs] -> { Stmt_S_EQ[] : rhs = lhs };
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; CHECK-NEXT: Schedule :=
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; CHECK-NEXT: [bool_cond, lhs, rhs] -> { Stmt_S_EQ[] -> [19] };
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; CHECK-NEXT: MustWriteAccess := [Reduction Type: NONE] [Scalar: 0]
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; CHECK-NEXT: [bool_cond, lhs, rhs] -> { Stmt_S_EQ[] -> MemRef_A[0] };
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; CHECK-NEXT: Stmt_M_EQ
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; CHECK-NEXT: Domain :=
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; CHECK-NEXT: [bool_cond, lhs, rhs] -> { Stmt_M_EQ[] };
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; CHECK-NEXT: Schedule :=
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; CHECK-NEXT: [bool_cond, lhs, rhs] -> { Stmt_M_EQ[] -> [20] };
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; CHECK-NEXT: MustWriteAccess := [Reduction Type: NONE] [Scalar: 0]
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; CHECK-NEXT: [bool_cond, lhs, rhs] -> { Stmt_M_EQ[] -> MemRef_A[0] };
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; CHECK-NEXT: Stmt_NEQ
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; CHECK-NEXT: Domain :=
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; CHECK-NEXT: [bool_cond, lhs, rhs] -> { Stmt_NEQ[] };
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; CHECK-NEXT: Schedule :=
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; CHECK-NEXT: [bool_cond, lhs, rhs] -> { Stmt_NEQ[] -> [21] };
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; CHECK-NEXT: MustWriteAccess := [Reduction Type: NONE] [Scalar: 0]
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; CHECK-NEXT: [bool_cond, lhs, rhs] -> { Stmt_NEQ[] -> MemRef_A[0] };
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; CHECK-NEXT: Stmt_S_NEQ
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; CHECK-NEXT: Domain :=
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; CHECK-NEXT: [bool_cond, lhs, rhs] -> { Stmt_S_NEQ[] : rhs > lhs or rhs < lhs };
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; CHECK-NEXT: Schedule :=
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; CHECK-NEXT: [bool_cond, lhs, rhs] -> { Stmt_S_NEQ[] -> [22] : rhs > lhs or rhs < lhs };
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; CHECK-NEXT: MustWriteAccess := [Reduction Type: NONE] [Scalar: 0]
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; CHECK-NEXT: [bool_cond, lhs, rhs] -> { Stmt_S_NEQ[] -> MemRef_A[0] };
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; CHECK-NEXT: Stmt_M_NEQ
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; CHECK-NEXT: Domain :=
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; CHECK-NEXT: [bool_cond, lhs, rhs] -> { Stmt_M_NEQ[] };
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; CHECK-NEXT: Schedule :=
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; CHECK-NEXT: [bool_cond, lhs, rhs] -> { Stmt_M_NEQ[] -> [23] };
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; CHECK-NEXT: MustWriteAccess := [Reduction Type: NONE] [Scalar: 0]
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; CHECK-NEXT: [bool_cond, lhs, rhs] -> { Stmt_M_NEQ[] -> MemRef_A[0] };
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; CHECK-NEXT: }
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;
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target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
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define void @consequences(i32* %A, i32 %bool_cond, i32 %lhs, i32 %rhs) {
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entry:
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br label %BC
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BC: ; preds = %entry
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store i32 0, i32* %A, align 4
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%tobool = icmp eq i32 %bool_cond, 0
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br i1 %tobool, label %M_BC, label %S_BC
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S_BC: ; preds = %if.then
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store i32 0, i32* %A, align 4
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br label %M_BC
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M_BC: ; preds = %BC, %S_BC
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store i32 0, i32* %A, align 4
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br label %NEG_BC
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NEG_BC: ; preds = %if.end
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store i32 0, i32* %A, align 4
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%tobool1 = icmp eq i32 %bool_cond, 0
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br i1 %tobool1, label %S_NEG_BC, label %M_NEG_BC
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S_NEG_BC: ; preds = %if.then.2
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store i32 0, i32* %A, align 4
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br label %M_NEG_BC
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M_NEG_BC: ; preds = %NEG_BC, %S_NEG_BC
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store i32 0, i32* %A, align 4
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br label %SLT
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SLT: ; preds = %if.end.3
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store i32 0, i32* %A, align 4
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%cmp = icmp slt i32 %lhs, %rhs
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br i1 %cmp, label %S_SLT, label %M_SLT
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S_SLT: ; preds = %if.then.4
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store i32 0, i32* %A, align 4
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br label %M_SLT
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M_SLT: ; preds = %S_SLT, %SLT
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store i32 0, i32* %A, align 4
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br label %SLE
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SLE: ; preds = %if.end.5
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store i32 0, i32* %A, align 4
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%cmp6 = icmp sgt i32 %lhs, %rhs
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br i1 %cmp6, label %M_SLE, label %S_SLE
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S_SLE: ; preds = %if.then.7
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store i32 0, i32* %A, align 4
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br label %M_SLE
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M_SLE: ; preds = %SLE, %S_SLE
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store i32 0, i32* %A, align 4
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br label %SGT
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SGT: ; preds = %if.end.8
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store i32 0, i32* %A, align 4
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%cmp9 = icmp sgt i32 %lhs, %rhs
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br i1 %cmp9, label %S_SGT, label %M_SGT
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S_SGT: ; preds = %if.then.10
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store i32 0, i32* %A, align 4
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br label %M_SGT
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M_SGT: ; preds = %S_SGT, %SGT
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store i32 0, i32* %A, align 4
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br label %SGE
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SGE: ; preds = %if.end.11
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store i32 0, i32* %A, align 4
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%cmp12 = icmp slt i32 %lhs, %rhs
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br i1 %cmp12, label %M_SGE, label %S_SGE
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S_SGE: ; preds = %if.then.13
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store i32 0, i32* %A, align 4
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br label %M_SGE
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M_SGE: ; preds = %SGE, %S_SGE
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store i32 0, i32* %A, align 4
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br label %EQ
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EQ: ; preds = %if.end.14
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store i32 0, i32* %A, align 4
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%cmp15 = icmp eq i32 %lhs, %rhs
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br i1 %cmp15, label %S_EQ, label %M_EQ
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S_EQ: ; preds = %if.then.16
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store i32 0, i32* %A, align 4
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br label %M_EQ
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M_EQ: ; preds = %S_EQ, %EQ
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store i32 0, i32* %A, align 4
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br label %NEQ
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NEQ: ; preds = %if.end.17
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store i32 0, i32* %A, align 4
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%cmp18 = icmp eq i32 %lhs, %rhs
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br i1 %cmp18, label %M_NEQ, label %S_NEQ
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S_NEQ: ; preds = %if.then.19
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store i32 0, i32* %A, align 4
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br label %M_NEQ
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M_NEQ: ; preds = %NEQ, %S_NEQ
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store i32 0, i32* %A, align 4
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br label %exit
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exit:
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ret void
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}
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