Tim Northover e94a518a22 IR: add a second ordering operand to cmpxhg for failure ... The syntax for "cmpxchg" should now look something like: cmpxchg i32* %addr, i32 42, i32 3 acquire monotonic where the second ordering argument gives the required semantics in the case that no exchange takes place. It should be no stronger than the first ordering constraint and cannot be either "release" or "acq_rel" (since no store will have taken place). rdar://problem/15996804 llvm-svn: 203559		2014-03-11 10:48:52 +00:00
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atomic.ll	IR: add a second ordering operand to cmpxhg for failure	2014-03-11 10:48:52 +00:00
no_sanitize_thread.ll	tsan: implement no_sanitize_thread attribute	2013-10-17 07:20:06 +00:00
read_before_write.ll	tsan: implement no_sanitize_thread attribute	2013-10-17 07:20:06 +00:00
read_from_global.ll	tsan: implement no_sanitize_thread attribute	2013-10-17 07:20:06 +00:00
tsan-vs-gvn.ll	Unify clang/llvm attributes for asan/tsan/msan (LLVM part)	2013-02-26 06:58:09 +00:00
tsan_basic.ll	tsan: implement no_sanitize_thread attribute	2013-10-17 07:20:06 +00:00
vptr_read.ll	tsan: implement no_sanitize_thread attribute	2013-10-17 07:20:06 +00:00
vptr_update.ll	[tsan] fix PR18146: sometimes a variable written into vptr could have an integer type (after other optimizations)	2013-12-05 15:03:02 +00:00