llvm-project/llvm/test/CodeGen/X86
Amara Emerson 84fdd9d7a5 [X86] Fix prolog/epilog mismatch for stack protectors on win32-macho.
The xor'ing behaviour is only used for msvc/crt environments, when we're targeting
macho the guard load code doesn't know about the xor in the epilog. Disable xor'ing
when targeting win32-macho to be consistent.

Differential Revision: https://reviews.llvm.org/D71095
2019-12-06 14:44:56 -08:00
..
GC [lit] Delete empty lines at the end of lit.local.cfg NFC 2019-06-17 09:51:07 +00:00
GlobalISel [GlobalISel]: Allow targets to override how to widen constants during legalization 2019-12-03 10:41:10 -08:00
avx512-shuffles [X86] Teach lowerV4I32Shuffle to only use broadcasts if the mask has more than one undef element. Prioritize shifts over broadcast in lowerV8I16Shuffle. 2019-08-19 18:15:50 +00:00
3addr-16bit.ll
3addr-or.ll
3dnow-intrinsics.ll [X86] Add custom type legalization for bitcasting mmx to v2i32/v4i16/v8i8 to use movq2dq instead of going through memory. 2019-08-15 18:23:37 +00:00
4char-promote.ll Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default." 2019-08-07 16:24:26 +00:00
8bit_cmov_of_trunc_promotion.ll
2003-08-03-CallArgLiveRanges.ll
2003-08-23-DeadBlockTest.ll
2003-11-03-GlobalBool.ll
2004-02-13-FrameReturnAddress.ll
2004-02-14-InefficientStackPointer.ll
2004-02-22-Casts.ll
2004-03-30-Select-Max.ll
2004-04-13-FPCMOV-Crash.ll
2004-06-10-StackifierCrash.ll
2004-10-08-SelectSetCCFold.ll
2005-01-17-CycleInDAG.ll
2005-02-14-IllegalAssembler.ll
2005-05-08-FPStackifierPHI.ll
2006-01-19-ISelFoldingBug.ll
2006-03-01-InstrSchedBug.ll
2006-03-02-InstrSchedBug.ll
2006-04-04-CrossBlockCrash.ll
2006-04-27-ISelFoldingBug.ll
2006-05-01-SchedCausingSpills.ll
2006-05-02-InstrSched1.ll
2006-05-02-InstrSched2.ll
2006-05-08-CoalesceSubRegClass.ll
2006-05-08-InstrSched.ll
2006-05-11-InstrSched.ll
2006-05-17-VectorArg.ll
2006-05-22-FPSetEQ.ll
2006-05-25-CycleInDAG.ll
2006-07-10-InlineAsmAConstraint.ll
2006-07-12-InlineAsmQConstraint.ll
2006-07-20-InlineAsm.ll
2006-07-28-AsmPrint-Long-As-Pointer.ll
2006-07-31-SingleRegClass.ll
2006-08-07-CycleInDAG.ll
2006-08-16-CycleInDAG.ll
2006-08-21-ExtraMovInst.ll
2006-09-01-CycleInDAG.ll
2006-10-02-BoolRetCrash.ll
2006-10-09-CycleInDAG.ll
2006-10-10-FindModifiedNodeSlotBug.ll
2006-10-12-CycleInDAG.ll
2006-10-13-CycleInDAG.ll
2006-10-19-SwitchUnnecessaryBranching.ll
2006-11-12-CSRetCC.ll
2006-11-17-IllegalMove.ll
2006-11-27-SelectLegalize.ll
2006-12-16-InlineAsmCrash.ll
2006-12-19-IntelSyntax.ll
2007-01-08-InstrSched.ll
2007-01-08-X86-64-Pointer.ll
2007-01-13-StackPtrIndex.ll
2007-01-29-InlineAsm-ir.ll
2007-02-04-OrAddrMode.ll
2007-02-16-BranchFold.ll
2007-02-19-LiveIntervalAssert.ll
2007-02-23-DAGCombine-Miscompile.ll
2007-02-25-FastCCStack.ll
2007-03-01-SpillerCrash.ll
2007-03-15-GEP-Idx-Sink.ll
2007-03-16-InlineAsm.ll
2007-03-18-LiveIntervalAssert.ll
2007-03-24-InlineAsmMultiRegConstraint.ll
2007-03-24-InlineAsmPModifier.ll
2007-03-24-InlineAsmVectorOp.ll
2007-03-24-InlineAsmXConstraint.ll
2007-03-26-CoalescerBug.ll
2007-04-08-InlineAsmCrash.ll
2007-04-11-InlineAsmVectorResult.ll
2007-04-17-LiveIntervalAssert.ll
2007-04-24-Huge-Stack.ll
2007-04-24-VectorCrash.ll
2007-04-27-InlineAsm-IntMemInput.ll
2007-05-05-Personality.ll
2007-05-05-VecCastExpand.ll
2007-05-14-LiveIntervalAssert.ll
2007-05-15-maskmovq.ll
2007-05-17-ShuffleISelBug.ll
2007-06-04-X86-64-CtorAsmBugs.ll
2007-06-28-X86-64-isel.ll
2007-06-29-DAGCombinerBug.ll
2007-06-29-VecFPConstantCSEBug.ll
2007-07-03-GR64ToVR64.ll
2007-07-10-StackerAssert.ll
2007-07-18-Vector-Extract.ll
2007-08-01-LiveVariablesBug.ll
2007-08-09-IllegalX86-64Asm.ll
2007-08-10-SignExtSubreg.ll
2007-09-05-InvalidAsm.ll
2007-09-06-ExtWeakAliasee.ll
2007-09-27-LDIntrinsics.ll
2007-10-04-AvoidEFLAGSCopy.ll
2007-10-12-CoalesceExtSubReg.ll
2007-10-12-SpillerUnfold1.ll
2007-10-12-SpillerUnfold2.ll
2007-10-14-CoalescerCrash.ll
2007-10-15-CoalescerCrash.ll
2007-10-16-CoalescerCrash.ll
2007-10-19-SpillerUnfold.ll
2007-10-28-inlineasm-q-modifier.ll
2007-10-29-ExtendSetCC.ll
2007-10-30-LSRCrash.ll
2007-10-31-extractelement-i64.ll
2007-11-01-ISelCrash.ll
2007-11-03-x86-64-q-constraint.ll
2007-11-04-LiveIntervalCrash.ll
2007-11-04-LiveVariablesBug.ll
2007-11-04-rip-immediate-constant.ll
2007-11-06-InstrSched.ll
2007-11-07-MulBy4.ll
2007-11-30-LoadFolding-Bug.ll
2007-12-16-BURRSchedCrash.ll
2007-12-18-LoadCSEBug.ll
2008-01-08-IllegalCMP.ll
2008-01-08-SchedulerCrash.ll
2008-01-09-LongDoubleSin.ll
2008-01-16-FPStackifierAssert.ll
2008-01-16-InvalidDAGCombineXform.ll
2008-02-05-ISelCrash.ll
2008-02-06-LoadFoldingBug.ll
2008-02-14-BitMiscompile.ll
2008-02-18-TailMergingBug.ll
2008-02-20-InlineAsmClobber.ll
2008-02-22-LocalRegAllocBug.ll
2008-02-25-InlineAsmBug.ll
2008-02-25-X86-64-CoalescerBug.ll
2008-02-26-AsmDirectMemOp.ll
2008-02-27-DeadSlotElimBug.ll
2008-02-27-PEICrash.ll
2008-03-06-frem-fpstack.ll
2008-03-07-APIntBug.ll
2008-03-10-RegAllocInfLoop.ll
2008-03-12-ThreadLocalAlias.ll
2008-03-13-TwoAddrPassCrash.ll
2008-03-14-SpillerCrash.ll
2008-03-19-DAGCombinerBug.ll
2008-03-23-DarwinAsmComments.ll
2008-03-25-TwoAddrPassBug.ll
2008-03-31-SpillerFoldingBug.ll
2008-04-02-unnamedEH.ll
2008-04-08-CoalescerCrash.ll
2008-04-09-BranchFolding.ll
2008-04-15-LiveVariableBug.ll
2008-04-16-CoalescerBug.ll
2008-04-16-ReMatBug.ll
2008-04-17-CoalescerBug.ll
2008-04-24-MemCpyBug.ll
2008-04-24-pblendw-fold-crash.ll
2008-04-26-Asm-Optimize-Imm.ll
2008-04-28-CoalescerBug.ll
2008-04-28-CyclicSchedUnit.ll
2008-05-01-InvalidOrdCompare.ll
2008-05-09-PHIElimBug.ll
2008-05-09-ShuffleLoweringBug.ll
2008-05-12-tailmerge-5.ll
2008-05-21-CoalescerBug.ll
2008-05-22-FoldUnalignedLoad.ll
2008-05-28-CoalescerBug.ll
2008-05-28-LocalRegAllocBug.ll
2008-06-13-NotVolatileLoadStore.ll
2008-06-13-VolatileLoadStore.ll
2008-06-16-SubregsBug.ll
2008-06-25-VecISelBug.ll
2008-07-07-DanglingDeadInsts.ll
2008-07-09-ELFSectionAttributes.ll
2008-07-11-SHLBy1.ll
2008-07-16-CoalescerCrash.ll
2008-07-19-movups-spills.ll
2008-07-22-CombinerCrash.ll
2008-07-23-VSetCC.ll
2008-08-06-CmpStride.ll
2008-08-06-RewriterBug.ll
2008-08-17-UComiCodeGenBug.ll
2008-08-23-64Bit-maskmovq.ll
2008-08-31-EH_RETURN32.ll
2008-08-31-EH_RETURN64.ll
2008-09-05-sinttofp-2xi32.ll Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default." 2019-08-07 16:24:26 +00:00
2008-09-09-LinearScanBug.ll
2008-09-11-CoalescerBug.ll
2008-09-11-CoalescerBug2.ll [X86] Use MOVZX16rr8/MOVZXrm8 when extending input for i8 udivrem. 2019-09-06 19:15:04 +00:00
2008-09-17-inline-asm-1.ll
2008-09-18-inline-asm-2.ll
2008-09-19-RegAllocBug.ll
2008-09-25-sseregparm-1.ll
2008-09-26-FrameAddrBug.ll
2008-09-29-ReMatBug.ll
2008-09-29-VolatileBug.ll
2008-10-06-x87ld-nan-1.ll
2008-10-06-x87ld-nan-2.ll
2008-10-07-SSEISelBug.ll
2008-10-11-CallCrash.ll
2008-10-13-CoalescerBug.ll
2008-10-16-VecUnaryOp.ll
2008-10-17-Asm64bitRConstraint.ll
2008-10-20-AsmDoubleInI32.ll
2008-10-24-FlippedCompare.ll
2008-10-27-CoalescerBug.ll
2008-10-29-ExpandVAARG.ll
2008-11-03-F80VAARG.ll
2008-11-06-testb.ll
2008-11-13-inlineasm-3.ll
2008-11-29-ULT-Sign.ll
2008-12-01-SpillerAssert.ll
2008-12-01-loop-iv-used-outside-loop.ll
2008-12-02-IllegalResultType.ll
2008-12-02-dagcombine-1.ll
2008-12-02-dagcombine-2.ll
2008-12-02-dagcombine-3.ll
2008-12-16-dagcombine-4.ll
2008-12-19-EarlyClobberBug.ll
2008-12-22-dagcombine-5.ll
2008-12-23-crazy-address.ll
2008-12-23-dagcombine-6.ll
2009-01-13-DoubleUpdate.ll
2009-01-16-SchedulerBug.ll
2009-01-16-UIntToFP.ll
2009-01-18-ConstantExprCrash.ll
2009-01-25-NoSSE.ll
2009-01-26-WrongCheck.ll
2009-01-27-NullStrings.ll
2009-01-31-BigShift.ll
2009-01-31-BigShift2.ll
2009-01-31-BigShift3.ll
2009-02-01-LargeMask.ll
2009-02-03-AnalyzedTwice.ll
2009-02-04-sext-i64-gep.ll
2009-02-08-CoalescerBug.ll
2009-02-09-ivs-different-sizes.ll
2009-02-11-codegenprepare-reuse.ll
2009-02-12-DebugInfoVLA.ll
2009-02-12-InlineAsm-nieZ-constraints.ll
2009-02-12-SpillerBug.ll
2009-02-21-ExtWeakInitializer.ll
2009-02-25-CommuteBug.ll
2009-02-26-MachineLICMBug.ll [X86] Narrow i64 compares with constant to i32 when the upper 32-bits are known zero. 2019-10-29 11:38:15 -07:00
2009-03-03-BTHang.ll
2009-03-03-BitcastLongDouble.ll
2009-03-05-burr-list-crash.ll
2009-03-09-APIntCrash.ll
2009-03-09-SpillerBug.ll
2009-03-10-CoalescerBug.ll
2009-03-12-CPAlignBug.ll
2009-03-13-PHIElimBug.ll
2009-03-16-PHIElimInLPad.ll
2009-03-23-LinearScanBug.ll
2009-03-23-MultiUseSched.ll
2009-03-25-TestBug.ll
2009-03-26-NoImplicitFPBug.ll
2009-04-12-FastIselOverflowCrash.ll
2009-04-12-picrel.ll
2009-04-13-2AddrAssert-2.ll
2009-04-13-2AddrAssert.ll
2009-04-14-IllegalRegs.ll
2009-04-16-SpillerUnfold.ll
2009-04-24.ll
2009-04-25-CoalescerBug.ll
2009-04-27-CoalescerAssert.ll
2009-04-27-LiveIntervalsAssert.ll
2009-04-27-LiveIntervalsAssert2.ll
2009-04-29-IndirectDestOperands.ll
2009-04-29-LinearScanBug.ll
2009-04-29-RegAllocAssert.ll
2009-04-scale.ll
2009-05-08-InlineAsmIOffset.ll
2009-05-11-tailmerge-crash.ll
2009-05-19-SingleElementExtractElement.ll
2009-05-23-available_externally.ll
2009-05-23-dagcombine-shifts.ll
2009-05-28-DAGCombineCrash.ll
2009-05-30-ISelBug.ll
2009-06-02-RewriterBug.ll
2009-06-03-Win64DisableRedZone.ll
2009-06-03-Win64SpillXMM.ll
2009-06-04-VirtualLiveIn.ll
2009-06-05-VZextByteShort.ll Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default." 2019-08-07 16:24:26 +00:00
2009-06-05-VariableIndexInsert.ll
2009-06-05-sitofpCrash.ll
2009-06-06-ConcatVectors.ll
2009-06-12-x86_64-tail-call-conv-out-of-sync-bug.ll
2009-06-15-not-a-tail-call.ll
2009-06-18-movlp-shuffle-register.ll
2009-07-06-TwoAddrAssert.ll
2009-07-07-SplitICmp.ll
2009-07-09-ExtractBoolFromVector.ll
2009-07-15-CoalescerBug.ll
2009-07-16-CoalescerBug.ll
2009-07-19-AsmExtraOperands.ll
2009-07-20-CoalescerBug.ll
2009-07-20-DAGCombineBug.ll
2009-08-06-branchfolder-crash.ll
2009-08-06-inlineasm.ll
2009-08-08-CastError.ll
2009-08-12-badswitch.ll
2009-08-14-Win64MemoryIndirectArg.ll
2009-08-19-LoadNarrowingMiscompile.ll
2009-08-23-SubRegReuseUndo.ll
2009-09-10-LoadFoldingBug.ll
2009-09-10-SpillComments.ll
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2009-09-19-earlyclobber.ll
2009-09-21-NoSpillLoopCount.ll
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2009-11-13-VirtRegRewriterBug.ll
2009-11-16-MachineLICM.ll
2009-11-16-UnfoldMemOpBug.ll
2009-11-17-UpdateTerminator.ll
2009-11-18-TwoAddrKill.ll
2009-11-25-ImpDefBug.ll
2009-12-01-EarlyClobberBug.ll
2009-12-11-TLSNoRedZone.ll
2010-01-05-ZExt-Shl.ll
2010-01-07-ISelBug.ll
2010-01-08-Atomic64Bug.ll
2010-01-11-ExtraPHIArg.ll
2010-01-13-OptExtBug.ll
2010-01-15-SelectionDAGCycle.ll
2010-01-18-DbgValue.ll
2010-01-19-OptExtBug.ll
2010-02-01-DbgValueCrash.ll
2010-02-01-TaillCallCrash.ll
2010-02-03-DualUndef.ll
2010-02-04-SchedulerBug.ll
2010-02-11-NonTemporal.ll
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2010-02-23-RematImplicitSubreg.ll
2010-02-23-SingleDefPhiJoin.ll
2010-03-04-Mul8Bug.ll
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2010-04-30-LocalAlloc-LandingPad.ll
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2010-06-15-FastAllocEarlyCLobber.ll
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2010-07-06-asm-RIP.ll
2010-07-11-FPStackLoneUse.ll
2010-07-13-indirectXconstraint.ll
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2010-07-29-SetccSimplify.ll
2010-08-04-MaskedSignedCompare.ll [FIX] Forces shrink wrapping to consider any memory access as aliasing with the stack 2019-06-13 13:56:19 +00:00
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2011-02-04-FastRegallocNoFP.ll
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2011-05-09-loaduse.ll [X86][SSE] Remove XFormVExtractWithShuffleIntoLoad to prevent legalization infinite loops (PR43971) 2019-11-19 11:55:44 +00:00
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2011-06-14-mmx-inlineasm.ll
2011-06-19-QuicksortCoalescerBug.ll
2011-07-13-BadFrameIndexDisplacement.ll
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2011-10-19-LegelizeLoad.ll [X86] Use MOVSX by default instead of CBW to extend i8 to AX for i8 sdivrem. 2019-09-06 19:17:02 +00:00
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2011-12-06-BitcastVectorGlobal.ll
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2011-12-8-bitcastintprom.ll Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default." 2019-08-07 16:24:26 +00:00
2011-12-15-vec_shift.ll
2011-12-26-extractelement-duplicate-load.ll
2011-12-28-vselecti8.ll Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default." 2019-08-07 16:24:26 +00:00
2011-20-21-zext-ui2fp.ll
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2012-1-10-buildvector.ll
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2012-01-12-extract-sv.ll
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2012-01-18-vbitcast.ll Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default." 2019-08-07 16:24:26 +00:00
2012-02-12-dagco.ll
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2012-03-15-build_vector_wl.ll Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default." 2019-08-07 16:24:26 +00:00
2012-03-20-LargeConstantExpr.ll
2012-03-26-PostRALICMBug.ll
2012-04-09-TwoAddrPassBug.ll
2012-04-26-sdglue.ll [X86] Make getZeroVector return floating point vectors in their native type on SSE2 and later. 2019-09-08 00:43:52 +00:00
2012-05-17-TwoAddressBug.ll
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2012-07-10-extload64.ll Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default." 2019-08-07 16:24:26 +00:00
2012-07-10-shufnorm.ll
2012-07-15-BuildVectorPromote.ll
2012-07-15-broadcastfold.ll
2012-07-15-tconst_shl.ll
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2012-07-16-fp2ui-i1.ll
2012-07-17-vtrunc.ll
2012-07-23-select_cc.ll
2012-08-07-CmpISelBug.ll [TargetLowering] Add SimplifyMultipleUseDemandedBits 2019-07-23 12:39:08 +00:00
2012-08-16-setcc.ll
2012-08-17-legalizer-crash.ll
2012-08-28-UnsafeMathCrash.ll
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2013-10-14-FastISel-incorrect-vreg.ll
2014-05-29-factorial.ll
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9601.ll
20090313-signext.ll
AppendingLinkage.ll
Atomics-64.ll
DbgValueOtherTargets.test
DynamicCalleeSavedRegisters.ll [X86] Regenerate callee-saved test checks to make D65354 diff easier 2019-07-31 12:29:07 +00:00
MachineBranchProb.ll Rename ExpandISelPseudo->FinalizeISel, delay register reservation 2019-06-19 00:25:39 +00:00
MachineSink-CritEdge.ll
MachineSink-DbgValue.ll
MachineSink-PHIUse.ll
MachineSink-SubReg.ll
MachineSink-eflags.ll [FIX] Forces shrink wrapping to consider any memory access as aliasing with the stack 2019-06-13 13:56:19 +00:00
MergeConsecutiveStores.ll
O0-pipeline.ll Revert "[PGO][PGSO] Instrument the code gen / target passes." 2019-12-06 12:17:32 -08:00
O3-pipeline.ll Revert "[PGO][PGSO] Instrument the code gen / target passes." 2019-12-06 12:17:32 -08:00
PR34565.ll
PR37310.mir [Alignment] Use llvm::Align in MachineFunction and TargetLowering - fixes mir parsing 2019-09-11 11:16:48 +00:00
PR40322.ll
StackColoring-dbg.ll
StackColoring.ll
SwitchLowering.ll
SwizzleShuff.ll Recommit r368079 "[X86] Remove uses of the -x86-experimental-vector-widening-legalization flag from test/CodeGen/X86/" 2019-08-07 16:33:37 +00:00
TruncAssertSext.ll
TruncAssertZext.ll
WidenArith.ll
abi-isel.ll
absolute-bit-mask-fastisel.ll
absolute-bit-mask.ll
absolute-bt.ll
absolute-cmp.ll
absolute-constant.ll [X86] Automatically generate various tests. NFC 2019-08-26 13:53:29 +00:00
absolute-rotate.ll
add-ext.ll
add-i64.ll
add-of-carry.ll [DAGCombiner] Don't combine (addcarry (uaddo X, Y), 0, Carry) -> (addcarry X, Y, Carry) if the Carry comes from the uaddo. 2019-07-04 18:18:46 +00:00
add-sub-nsw-nuw.ll
add.ll [X86] Teach convertToThreeAddress to handle SUB with immediate 2019-07-15 23:07:56 +00:00
add32ri8.ll
add_shl_constant.ll
addcarry.ll [SelectionDAG] Combine U{ADD,SUB}O diamonds into {ADD,SUB}CARRY 2019-11-20 16:25:42 +02:00
addcarry2.ll
addr-label-difference.ll
addr-mode-matcher-2.ll [Peephole] Allow folding loads into instructions w/multiple uses (such as test64rr) 2019-06-25 17:29:18 +00:00
addr-mode-matcher.ll
addr-of-ret-addr.ll
address-type-promotion-constantexpr.ll
addrsig.ll
addsub-constant-folding.ll
adx-commute.mir [Alignment] Use llvm::Align in MachineFunction and TargetLowering - fixes mir parsing 2019-09-11 11:16:48 +00:00
adx-intrinsics-upgrade.ll
adx-intrinsics.ll
aes_intrinsics.ll
alias-gep.ll
alias-static-alloca.ll [X86] Regenerate alias-static-alloca test checks to make D65354 diff easier 2019-07-31 12:27:47 +00:00
aliases.ll
aligned-comm.ll
aligned-variadic.ll
alignment-2.ll
alignment.ll
all-ones-vector.ll [X86] Pass v32i16/v64i8 in zmm registers on KNL target. 2019-08-30 17:35:08 +00:00
alldiv-divdi3.ll
alloca-align-rounding-32.ll
alloca-align-rounding.ll
alloca-overaligned.ll [Tests] Add a test showing how we handle overaligned allocas w/ no-realign-stack 2019-07-18 00:26:03 +00:00
allrem-moddi3.ll
and-encoding.ll
and-load-fold.ll Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default." 2019-08-07 16:24:26 +00:00
and-or-fold.ll
and-sink.ll
and-su.ll
andimm8.ll
anyext.ll [X86] Use MOVZX16rr8/MOVZXrm8 when extending input for i8 udivrem. 2019-09-06 19:15:04 +00:00
anyregcc-crash.ll
anyregcc.ll
apm.ll
arg-cast.ll
arg-copy-elide-win64.ll
arg-copy-elide.ll
arg_returned_bitcast.ll [SelectionDAG][FIX] Allow "returned" arguments to be bit-casted 2019-06-04 20:34:43 +00:00
asm-block-labels.ll
asm-global-imm.ll
asm-indirect-mem.ll
asm-invalid-register-class-crasher.ll
asm-label.ll
asm-label2.ll
asm-mismatched-types.ll
asm-modifier-P.ll
asm-modifier.ll
asm-reg-type-mismatch-avx512.ll
asm-reg-type-mismatch.ll
asm-reject-reg-type-mismatch.ll
asm-reject-rex.ll
asm-reject-vk32-vk64.ll
asm-reject-xmm16.ll
atom-call-reg-indirect-foldedreload32.ll
atom-call-reg-indirect-foldedreload64.ll
atom-call-reg-indirect.ll
atom-cmpb.ll
atom-fixup-lea1.ll
atom-fixup-lea2.ll
atom-fixup-lea3.ll
atom-fixup-lea4.ll
atom-lea-addw-bug.ll
atom-lea-sp.ll
atom-pad-short-functions.ll
atom-sched.ll
atom-shuf.ll
atomic-add.ll
atomic-dagsched.ll
atomic-eflags-reuse.ll
atomic-flags.ll
atomic-fp.ll
atomic-idempotent.ll
atomic-load-store-wide.ll
atomic-load-store.ll
atomic-mi.ll
atomic-minmax-i6432.ll
atomic-monotonic.ll Use the handle --check-prefixes mechanism to de-verbosify a couple atomics tests [NFC] 2019-08-28 20:27:39 +00:00
atomic-non-integer-fp128.ll [X86/Atomics] (Semantically) revert G246098, switch back to the old atomic example 2019-11-05 11:24:27 -08:00
atomic-non-integer.ll [X86/Atomics] (Semantically) revert G246098, switch back to the old atomic example 2019-11-05 11:24:27 -08:00
atomic-op.ll
atomic-ops-ancient-64.ll
atomic-or.ll
atomic-pointer.ll
atomic-unordered.ll [SelectionDAG] Enable lowering unordered atomics loads w/LoadSDNode (and stores w/StoreSDNode) by default 2019-10-29 12:46:24 -07:00
atomic8.ll
atomic16.ll
atomic32.ll
atomic64.ll
atomic128.ll
atomic6432.ll
atomicf128.ll [X86] Enable fp128 as a legal type with SSE1 rather than with MMX. 2019-09-02 20:16:30 +00:00
attribute-sections.ll
avg-mask.ll [X86] Pass v32i16/v64i8 in zmm registers on KNL target. 2019-08-30 17:35:08 +00:00
avg.ll [X86] Pass v32i16/v64i8 in zmm registers on KNL target. 2019-08-30 17:35:08 +00:00
avoid-lea-scale2.ll
avoid-loop-align-2.ll
avoid-loop-align.ll
avoid-sfb-g-no-change.mir [Alignment] Use llvm::Align in MachineFunction and TargetLowering - fixes mir parsing 2019-09-11 11:16:48 +00:00
avoid-sfb-g-no-change2.mir [Alignment] Use llvm::Align in MachineFunction and TargetLowering - fixes mir parsing 2019-09-11 11:16:48 +00:00
avoid-sfb-g-no-change3.mir [Alignment] Use llvm::Align in MachineFunction and TargetLowering - fixes mir parsing 2019-09-11 11:16:48 +00:00
avoid-sfb-kill-flags.mir [Alignment] Use llvm::Align in MachineFunction and TargetLowering - fixes mir parsing 2019-09-11 11:16:48 +00:00
avoid-sfb-offset.mir [Alignment] Use llvm::Align in MachineFunction and TargetLowering - fixes mir parsing 2019-09-11 11:16:48 +00:00
avoid-sfb-overlaps.ll
avoid-sfb.ll
avoid_complex_am.ll
avx-arith.ll
avx-basic.ll [X86] Make getZeroVector return floating point vectors in their native type on SSE2 and later. 2019-09-08 00:43:52 +00:00
avx-bitcast.ll [X86] Automatically generate various tests. NFC 2019-08-26 13:53:29 +00:00
avx-brcond.ll
avx-cast.ll
avx-cmp.ll
avx-cvt-2.ll Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default." 2019-08-07 16:24:26 +00:00
avx-cvt-3.ll
avx-cvt.ll
avx-cvttp2si.ll
avx-fp2int.ll Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default." 2019-08-07 16:24:26 +00:00
avx-gfni-intrinsics.ll
avx-insertelt.ll
avx-intel-ocl.ll [X86] Teach X86MCInstLower to swap operands of commutable instructions to enable 2-byte VEX encoding. 2019-11-04 22:07:46 -08:00
avx-intrinsics-fast-isel.ll
avx-intrinsics-x86-upgrade.ll [x86] split 256-bit store of concatenated vectors 2019-06-04 16:40:04 +00:00
avx-intrinsics-x86.ll [x86] split 256-bit store of concatenated vectors 2019-06-04 16:40:04 +00:00
avx-intrinsics-x86_64.ll
avx-isa-check.ll [X86] Automatically generate various tests. NFC 2019-08-26 13:53:29 +00:00
avx-load-store.ll [x86] avoid crashing when splitting AVX stores with non-simple type (PR43916) 2019-11-06 09:28:41 -05:00
avx-logic.ll
avx-minmax.ll [X86] Automatically generate various tests. NFC 2019-08-26 13:53:29 +00:00
avx-select.ll
avx-shift.ll
avx-shuffle-x86_32.ll
avx-splat.ll [X86][AVX] Add i686 avx splat tests 2019-10-13 13:18:07 +00:00
avx-trunc.ll
avx-unpack.ll
avx-varargs-x86_64.ll
avx-vbroadcast.ll [X86][AVX] Access a scalar float/double as a free extract from a broadcast load (PR43217) 2019-10-06 21:11:45 +00:00
avx-vbroadcastf128.ll
avx-vextractf128.ll
avx-vinsertf128.ll
avx-vpclmulqdq.ll [X86] Automatically generate various tests. NFC 2019-08-26 13:53:29 +00:00
avx-vperm2x128.ll
avx-vzeroupper.ll [X86] Add support for -mvzeroupper and -mno-vzeroupper to match gcc 2019-11-04 11:03:54 -08:00
avx-win64-args.ll
avx-win64.ll
avx.ll
avx1-logical-load-folding.ll
avx2-arith.ll
avx2-cmp.ll
avx2-conversions.ll Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default." 2019-08-07 16:24:26 +00:00
avx2-fma-fneg-combine.ll
avx2-gather.ll [X86] Make getZeroVector return floating point vectors in their native type on SSE2 and later. 2019-09-08 00:43:52 +00:00
avx2-intrinsics-canonical.ll [X86] Regenerate tests. NFCI. 2019-07-10 17:22:31 +00:00
avx2-intrinsics-fast-isel.ll
avx2-intrinsics-x86-upgrade.ll
avx2-intrinsics-x86.ll [X86] Call SimplifyDemandedBits in combineGatherScatter any time the mask element is wider than i1, not just when AVX512 is disabled. 2019-09-27 18:23:55 +00:00
avx2-logic.ll
avx2-masked-gather.ll Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default." 2019-08-07 16:24:26 +00:00
avx2-nontemporal.ll
avx2-phaddsub.ll
avx2-pmovxrm.ll
avx2-shift.ll
avx2-vbroadcast.ll Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default." 2019-08-07 16:24:26 +00:00
avx2-vbroadcasti128.ll
avx2-vector-shifts.ll
avx2-vperm.ll
avx512-adc-sbb.ll
avx512-any_extend_load.ll [X86] Remove some code from combineShuffle that seems largely unnecessary with widening legalization. 2019-08-11 02:08:38 +00:00
avx512-arith.ll [X86] Add broadcast load folding patterns to NoVLX VPMULLQ/VPMAXSQ/VPMAXUQ/VPMINSQ/VPMINUQ patterns. 2019-10-03 03:16:27 +00:00
avx512-broadcast-unfold.ll [X86] Add broadcast load unfolding support for VPTESTMD/Q and VPTESTNMD/Q. 2019-09-28 01:56:36 +00:00
avx512-bugfix-23634.ll
avx512-bugfix-25270.ll Automatically generate AVX512 test cases. NFC 2019-08-19 14:34:08 +00:00
avx512-bugfix-26264.ll
avx512-build-vector.ll
avx512-calling-conv.ll [X86] Rewrite to the vXi1 subvector insertion code to not rely on the value of bits that might be undef 2019-10-02 17:47:09 +00:00
avx512-cmp-kor-sequence.ll
avx512-cmp-mask.ll [X86] Add test case for PR32546 2019-09-08 11:56:07 +00:00
avx512-cmp.ll [X86] Add CodeGenOnly instructions for (f32 (X86selects $mask, (loadf32 addr), fp32imm0) to use masked MOVSS from memory. 2019-09-26 22:23:09 +00:00
avx512-cvt.ll [X86] Add floating point execution domain to comi/ucomi/cvtss2si/cvtsd2si/cvttss2si/cvttsd2si/cvtsi2ss/cvtsi2sd instructions. 2019-11-30 11:26:28 -08:00
avx512-cvttp2i.ll
avx512-ext.ll [X86] Rewrite to the vXi1 subvector insertion code to not rely on the value of bits that might be undef 2019-10-02 17:47:09 +00:00
avx512-extract-subvector-load-store.ll
avx512-extract-subvector.ll
avx512-fma-commute.ll Automatically generate AVX512 test cases. NFC 2019-08-19 14:34:08 +00:00
avx512-fma-intrinsics-upgrade.ll
avx512-fma-intrinsics.ll
avx512-fma.ll [TargetLowering] SimplifyDemandedBits - legal checks for SIGN/ZERO_EXTEND -> ZERO/ANY_EXTEND 2019-06-25 10:51:15 +00:00
avx512-fsel.ll
avx512-gather-scatter-intrin-deprecated.ll
avx512-gather-scatter-intrin.ll
avx512-gfni-intrinsics.ll Revert r373172 "[X86] Add custom isel logic to match VPTERNLOG from 2 logic ops." 2019-10-01 22:40:03 +00:00
avx512-hadd-hsub.ll
avx512-i1test.ll
avx512-inc-dec.ll Automatically generate AVX512 test cases. NFC 2019-08-19 14:34:08 +00:00
avx512-insert-extract.ll [X86] Rewrite to the vXi1 subvector insertion code to not rely on the value of bits that might be undef 2019-10-02 17:47:09 +00:00
avx512-insert-extract_i1.ll
avx512-intel-ocl.ll [WinEH] Allocate space in funclets stack to save XMM CSRs 2019-08-27 01:53:24 +00:00
avx512-intrinsics-canonical.ll
avx512-intrinsics-fast-isel.ll [X86] SimplifyDemandedVectorElts - attempt to recombine target shuffle using DemandedElts mask (REAPPLIED) 2019-11-04 11:37:57 +00:00
avx512-intrinsics-upgrade.ll [X86] Add DAG combine to turn (bitcast (vbroadcast_load)) into just a vbroadcast_load if the scalar size is the same. 2019-10-03 05:30:02 +00:00
avx512-intrinsics-x86_64.ll
avx512-intrinsics.ll [X86] Use sse_load_f32/f64 and timm in patterns for memory form of vgetmantss/sd. 2019-09-21 06:44:29 +00:00
avx512-load-store.ll
avx512-load-trunc-store-i1.ll
avx512-logic.ll [X86] Pass v32i16/v64i8 in zmm registers on KNL target. 2019-08-30 17:35:08 +00:00
avx512-mask-op.ll [X86] Teach X86MCInstLower to swap operands of commutable instructions to enable 2-byte VEX encoding. 2019-11-04 22:07:46 -08:00
avx512-mask-spills.ll Automatically generate AVX512 test cases. NFC 2019-08-19 14:34:08 +00:00
avx512-mask-zext-bugfix.ll
avx512-masked-memop-64-32.ll [X86] Remove patterns from MOVLPSmr and MOVHPSmr instructions. 2019-07-06 17:59:51 +00:00
avx512-masked_memop-16-8.ll [ScalarizeMaskedMemIntrin] Bitcast the mask to the scalar domain and use scalar bit tests for the branches. 2019-07-31 22:58:15 +00:00
avx512-memfold.ll Automatically generate AVX512 test cases. NFC 2019-08-19 14:34:08 +00:00
avx512-mov.ll
avx512-nontemporal.ll Automatically generate AVX512 test cases. NFC 2019-08-19 14:34:08 +00:00
avx512-pmovxrm.ll
avx512-regcall-Mask.ll [X86] Print register names in .seh_* directives 2019-08-30 21:23:05 +00:00
avx512-regcall-NoMask.ll [X86] Teach X86MCInstLower to swap operands of commutable instructions to enable 2-byte VEX encoding. 2019-11-04 22:07:46 -08:00
avx512-rndscale.ll
avx512-rotate.ll
avx512-scalar.ll
avx512-scalarIntrinsics.ll
avx512-scalar_mask.ll Automatically generate AVX512 test cases. NFC 2019-08-19 14:34:08 +00:00
avx512-select.ll [X86] Add VMOVSSZrrk/VMOVSDZrrk/VMOVSSZrrkz/VMOVSDZrrkz to getUndefRegClearance. 2019-09-26 22:56:06 +00:00
avx512-shift.ll
avx512-skx-insert-subvec.ll [X86] Teach lower1BitShuffle to recognize padding a subvector with zeros with V2 as the source and V1 as the zero vector. 2019-08-19 00:39:22 +00:00
avx512-trunc.ll [X86] Enable use of avx512 saturating truncate instructions in more cases. 2019-10-13 19:07:28 +00:00
avx512-unsafe-fp-math.ll [X86] Specifically limit fmin/fmax commutativity to NoNaNs + NoSignedZeros 2019-11-05 19:34:06 +01:00
avx512-vbroadcast.ll [X86] Pass v32i16/v64i8 in zmm registers on KNL target. 2019-08-30 17:35:08 +00:00
avx512-vbroadcasti128.ll [X86] Pass v32i16/v64i8 in zmm registers on KNL target. 2019-08-30 17:35:08 +00:00
avx512-vbroadcasti256.ll [X86] Pass v32i16/v64i8 in zmm registers on KNL target. 2019-08-30 17:35:08 +00:00
avx512-vec-cmp.ll [LegalizeTypes] Don't call PromoteTargetBoolean from SplitVecOp_VSETCC. 2019-10-16 02:50:04 +00:00
avx512-vec3-crash.ll Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default." 2019-08-07 16:24:26 +00:00
avx512-vpclmulqdq.ll
avx512-vpermv3-commute.ll
avx512-vpternlog-commute.ll
avx512-vselect-crash.ll
avx512-vselect.ll [X86] Teach X86MCInstLower to swap operands of commutable instructions to enable 2-byte VEX encoding. 2019-11-04 22:07:46 -08:00
avx512bf16-intrinsics.ll [X86] Regenerate intrinsics tests. NFCI. 2019-07-11 10:40:23 +00:00
avx512bf16-vl-intrinsics.ll
avx512bw-arith.ll
avx512bw-intrinsics-canonical.ll
avx512bw-intrinsics-fast-isel.ll
avx512bw-intrinsics-upgrade.ll [X86] Add a VBROADCAST_LOAD ISD opcode representing a scalar load broadcasted to a vector. 2019-10-01 16:28:20 +00:00
avx512bw-intrinsics.ll
avx512bw-mask-op.ll
avx512bw-mov.ll
avx512bw-vec-cmp.ll
avx512bw-vec-test-testn.ll
avx512bwvl-arith.ll
avx512bwvl-intrinsics-canonical.ll
avx512bwvl-intrinsics-fast-isel.ll
avx512bwvl-intrinsics-upgrade.ll [X86] Add a VBROADCAST_LOAD ISD opcode representing a scalar load broadcasted to a vector. 2019-10-01 16:28:20 +00:00
avx512bwvl-intrinsics.ll
avx512bwvl-mov.ll
avx512bwvl-vec-cmp.ll
avx512bwvl-vec-test-testn.ll
avx512cd-intrinsics-fast-isel.ll
avx512cd-intrinsics-upgrade.ll
avx512cd-intrinsics.ll
avx512cdvl-intrinsics-upgrade.ll
avx512cdvl-intrinsics.ll
avx512dq-intrinsics-fast-isel.ll
avx512dq-intrinsics-upgrade.ll
avx512dq-intrinsics.ll
avx512dq-mask-op.ll
avx512dqvl-intrinsics-fast-isel.ll
avx512dqvl-intrinsics-upgrade.ll [X86] Add DAG combine to turn (bitcast (vbroadcast_load)) into just a vbroadcast_load if the scalar size is the same. 2019-10-03 05:30:02 +00:00
avx512dqvl-intrinsics.ll [X86] Correct v4f32->v2i64 cvt(t)ps2(u)qq memory isel patterns 2019-07-01 19:01:37 +00:00
avx512er-intrinsics.ll
avx512f-256-set0.mir [Alignment] Use llvm::Align in MachineFunction and TargetLowering - fixes mir parsing 2019-09-11 11:16:48 +00:00
avx512f-vec-test-testn.ll [X86] Canonicalize all zeroes vector to RHS in X86DAGToDAGISel::tryVPTESTM. 2019-09-23 05:35:23 +00:00
avx512ifma-intrinsics-fast-isel.ll
avx512ifma-intrinsics-upgrade.ll [X86] Add DAG combine to turn (bitcast (vbroadcast_load)) into just a vbroadcast_load if the scalar size is the same. 2019-10-03 05:30:02 +00:00
avx512ifma-intrinsics.ll [X86] Add DAG combine to turn (bitcast (vbroadcast_load)) into just a vbroadcast_load if the scalar size is the same. 2019-10-03 05:30:02 +00:00
avx512ifmavl-intrinsics-fast-isel.ll
avx512ifmavl-intrinsics-upgrade.ll
avx512ifmavl-intrinsics.ll
avx512vbmi-intrinsics-fast-isel.ll
avx512vbmi-intrinsics-upgrade.ll
avx512vbmi-intrinsics.ll
avx512vbmi2-funnel-shifts.ll [X86][VBMI2] Add vector funnel shift tests 2019-10-29 17:57:55 +00:00
avx512vbmi2-intrinsics-fast-isel.ll
avx512vbmi2-intrinsics-upgrade.ll
avx512vbmi2-intrinsics.ll
avx512vbmi2vl-funnel-shifts.ll [X86][VBMI2] Add vector funnel shift tests 2019-10-29 17:57:55 +00:00
avx512vbmi2vl-intrinsics-fast-isel.ll
avx512vbmi2vl-intrinsics-upgrade.ll
avx512vbmi2vl-intrinsics.ll
avx512vbmivl-intrinsics-fast-isel.ll
avx512vbmivl-intrinsics-upgrade.ll
avx512vbmivl-intrinsics.ll
avx512vl-arith.ll
avx512vl-intrinsics-canonical.ll
avx512vl-intrinsics-fast-isel.ll Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default." 2019-08-07 16:24:26 +00:00
avx512vl-intrinsics-upgrade.ll [X86] Add DAG combine to turn (bitcast (vbroadcast_load)) into just a vbroadcast_load if the scalar size is the same. 2019-10-03 05:30:02 +00:00
avx512vl-intrinsics.ll
avx512vl-logic.ll
avx512vl-mov.ll
avx512vl-nontemporal.ll Automatically generate AVX512 test cases. NFC 2019-08-19 14:34:08 +00:00
avx512vl-vbroadcast.ll
avx512vl-vec-cmp.ll [X86] Add broadcast load folding patterns to the NoVLX compare patterns. 2019-10-02 04:45:02 +00:00
avx512vl-vec-masked-cmp.ll [X86] Add broadcast load folding patterns to the NoVLX compare patterns. 2019-10-02 04:45:02 +00:00
avx512vl-vec-test-testn.ll
avx512vl-vpclmulqdq.ll
avx512vl_vnni-intrinsics-upgrade.ll [X86] Add proper execution domain information to the avx512vnni instructions. 2019-11-25 17:07:35 -08:00
avx512vl_vnni-intrinsics.ll [X86] Add proper execution domain information to the avx512vnni instructions. 2019-11-25 17:07:35 -08:00
avx512vlcd-intrinsics-fast-isel.ll [X86] Add a DAG combine to transform (i8 (bitcast (v8i1 (extract_subvector (v16i1 X), 0)))) -> (i8 (trunc (i16 (bitcast (v16i1 X))))) on KNL target 2019-08-20 20:20:04 +00:00
avx512vlvp2intersect-intrinsics.ll [X86] Add DAG combine to turn (bitcast (vbroadcast_load)) into just a vbroadcast_load if the scalar size is the same. 2019-10-03 05:30:02 +00:00
avx512vnni-intrinsics-upgrade.ll [X86] Add proper execution domain information to the avx512vnni instructions. 2019-11-25 17:07:35 -08:00
avx512vnni-intrinsics.ll [X86] Add proper execution domain information to the avx512vnni instructions. 2019-11-25 17:07:35 -08:00
avx512vnni.ll [X86] Add isel patterns to match vpdpwssd avx512vnni instruction from add+pmaddwd nodes. 2019-08-24 23:14:57 +00:00
avx512vp2intersect-intrinsics.ll [X86] Add DAG combine to turn (bitcast (vbroadcast_load)) into just a vbroadcast_load if the scalar size is the same. 2019-10-03 05:30:02 +00:00
avx512vpopcntdq-intrinsics.ll
backpropmask.ll
bad-tls-fold.mir [Alignment] Use llvm::Align in MachineFunction and TargetLowering - fixes mir parsing 2019-09-11 11:16:48 +00:00
barrier-sse.ll
barrier.ll
base-pointer-and-cmpxchg.ll
basic-promote-integers.ll
bb_rotate.ll
bc-extract.ll
bigstructret.ll
bigstructret2.ll
bit-piece-comment.ll
bit-test-shift.ll [X86] Automatically generate various tests. NFC 2019-08-26 13:53:29 +00:00
bitcast-and-setcc-128.ll [X86][SSE] lowerV16I8Shuffle - tryToWidenViaDuplication - undef unpack args 2019-10-19 13:18:02 +00:00
bitcast-and-setcc-256.ll [X86][AVX] Push sign extensions of comparison bool results through bitops (PR42025) 2019-10-05 20:49:34 +00:00
bitcast-and-setcc-512.ll [X86][AVX] Push sign extensions of comparison bool results through bitops (PR42025) 2019-10-05 20:49:34 +00:00
bitcast-i256.ll
bitcast-int-to-vector-bool-sext.ll [X86][AVX1] Combine concat_vectors(pshufd(x,c),pshufd(y,c)) -> vpermilps(concat_vectors(x,y),c) 2019-07-04 10:17:10 +00:00
bitcast-int-to-vector-bool-zext.ll [X86] Add a VBROADCAST_LOAD ISD opcode representing a scalar load broadcasted to a vector. 2019-10-01 16:28:20 +00:00
bitcast-int-to-vector-bool.ll [X86][AVX1] Combine concat_vectors(pshufd(x,c),pshufd(y,c)) -> vpermilps(concat_vectors(x,y),c) 2019-07-04 10:17:10 +00:00
bitcast-int-to-vector.ll
bitcast-mmx.ll [X86][SelectionDAGBuilder] Move the hack for handling MMX shift by i32 intrinsics into the X86 backend. 2019-09-23 01:05:33 +00:00
bitcast-setcc-128.ll [X86][SSE] lowerV16I8Shuffle - tryToWidenViaDuplication - undef unpack args 2019-10-19 13:18:02 +00:00
bitcast-setcc-256.ll
bitcast-setcc-512.ll [X86] Pass v32i16/v64i8 in zmm registers on KNL target. 2019-08-30 17:35:08 +00:00
bitcast-vector-bool.ll [TargetLowering] SimplifyDemandedBits - call SimplifyMultipleUseDemandedBits for ISD::TRUNCATE 2019-08-12 10:56:05 +00:00
bitcast.ll
bitcast2.ll
bitcnt-false-dep.ll
bitreverse.ll Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default." 2019-08-07 16:24:26 +00:00
block-placement.ll Reland "b19ec1eb3d0c [BPI] Improve unreachable/ColdCall heurstics to handle loops." 2019-12-02 10:28:40 -08:00
block-placement.mir [Alignment] Use llvm::Align in MachineFunction and TargetLowering - fixes mir parsing 2019-09-11 11:16:48 +00:00
bmi-intrinsics-fast-isel-x86_64.ll [X86] Teach convertToThreeAddress to handle SUB with immediate 2019-07-15 23:07:56 +00:00
bmi-intrinsics-fast-isel.ll [X86] Teach convertToThreeAddress to handle SUB with immediate 2019-07-15 23:07:56 +00:00
bmi-x86_64.ll [X86] X86DAGToDAGISel::matchBEXTRFromAndImm(): if can't use BEXTR, fallback to BZHI is profitable (PR43381) 2019-09-22 22:04:29 +00:00
bmi.ll [NFC][X86] Adjust check prefixes in bmi.ll (PR43381) 2019-09-21 11:12:55 +00:00
bmi2-x86_64.ll
bmi2.ll
bool-ext-inc.ll
bool-math.ll
bool-simplify.ll
bool-vector.ll
bool-zext.ll
br-fold.ll [Windows] Replace TrapUnreachable with an int3 insertion pass 2019-09-09 23:04:25 +00:00
branchfolding-catchpads.ll
branchfolding-debug-invariant.mir [BranchFolding] Fix PR43964 about branch folder not being debug invariant 2019-11-21 18:13:32 +01:00
branchfolding-debugloc.ll
branchfolding-landingpads.ll
branchfolding-undef.mir
brcond.ll
break-anti-dependencies.ll
break-false-dep.ll
broadcast-elm-cross-splat-vec.ll [X86] Pass v32i16/v64i8 in zmm registers on KNL target. 2019-08-30 17:35:08 +00:00
broadcastm-lowering.ll
bss_pagealigned.ll
bswap-inline-asm.ll
bswap-rotate.ll
bswap-vector.ll Recommit r368079 "[X86] Remove uses of the -x86-experimental-vector-widening-legalization flag from test/CodeGen/X86/" 2019-08-07 16:33:37 +00:00
bswap-wide-int.ll
bswap.ll
bswap_tree.ll [DAGCombine] Match more patterns for half word bswap 2019-10-10 13:20:10 +00:00
bswap_tree2.ll
bt.ll
btc_bts_btr.ll
btq.ll
bug26810.ll
bug37521.ll
build-vector-128.ll
build-vector-256.ll
build-vector-512.ll [X86] Pass v32i16/v64i8 in zmm registers on KNL target. 2019-08-30 17:35:08 +00:00
buildvec-extract.ll
buildvec-insertvec.ll Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default." 2019-08-07 16:24:26 +00:00
bypass-slow-division-32.ll [X86] Use MOVZX16rr8/MOVZXrm8 when extending input for i8 udivrem. 2019-09-06 19:15:04 +00:00
bypass-slow-division-64.ll [BypassSlowDivision][CodeGenPrepare] avoid crashing on unused code (PR43514) 2019-10-01 21:25:36 +00:00
bypass-slow-division-tune.ll [X86] Use MOVZX16rr8/MOVZXrm8 when extending input for i8 udivrem. 2019-09-06 19:15:04 +00:00
byval-align.ll
byval-callee-cleanup.ll
byval.ll
byval2.ll
byval3.ll
byval4.ll
byval5.ll
byval6.ll
byval7.ll
cache-intrinsic.ll
call-imm.ll
call-push.ll
call-site-info-output.ll [ISEL][X86] Tracking of registers that forward call arguments 2019-06-27 10:51:15 +00:00
callbr-asm-bb-exports.ll
callbr-asm-blockplacement.ll
callbr-asm-branch-folding.ll
callbr-asm-destinations.ll
callbr-asm-errors.ll
callbr-asm-label-addr.ll [MC] Don't recreate a label if it's already used 2019-08-09 20:16:31 +00:00
callbr-asm-obj-file.ll [CodeGen] Require a name for a block addr target 2019-08-09 20:18:30 +00:00
callbr-asm-outputs.ll
callbr-asm.ll [MC] Don't recreate a label if it's already used 2019-08-09 20:16:31 +00:00
cas.ll
cast-vsel.ll [x86] split 256-bit vector selects if operands are vector concats 2019-06-16 14:04:49 +00:00
catch.ll
catchpad-dynamic-alloca.ll
catchpad-lifetime.ll [Windows] Replace TrapUnreachable with an int3 insertion pass 2019-09-09 23:04:25 +00:00
catchpad-realign-savexmm.ll [X86] Print register names in .seh_* directives 2019-08-30 21:23:05 +00:00
catchpad-regmask.ll [Windows] Replace TrapUnreachable with an int3 insertion pass 2019-09-09 23:04:25 +00:00
catchpad-reuse.ll
catchpad-weight.ll Rename ExpandISelPseudo->FinalizeISel, delay register reservation 2019-06-19 00:25:39 +00:00
catchret-empty-fallthrough.ll
catchret-fallthrough.ll
catchret-regmask.ll [Windows] Replace TrapUnreachable with an int3 insertion pass 2019-09-09 23:04:25 +00:00
cfguard-checks.ll [X86] Don't setup and teardown memory for a musttail call 2019-12-06 12:58:54 -08:00
cfguard-module-flag.ll Convert files added in d157a9bc8b to unix line endings. 2019-10-28 14:39:45 -04:00
cfguard-x86-64-vectorcall.ll Convert files added in d157a9bc8b to unix line endings. 2019-10-28 14:39:45 -04:00
cfguard-x86-vectorcall.ll Convert files added in d157a9bc8b to unix line endings. 2019-10-28 14:39:45 -04:00
cfi-inserter-cfg-with-merge.mir
cfi-inserter-check-order.ll
cfi-inserter-noreturnblock.mir
cfi-inserter-verify-inconsistent-offset.mir
cfi-inserter-verify-inconsistent-register.mir
cfi-xmm.ll
cfi.ll
cfstring.ll
cgp-usubo.ll [X86] Teach convertToThreeAddress to handle SUB with immediate 2019-07-15 23:07:56 +00:00
chain_order.ll
change-compare-stride-1.ll
change-compare-stride-trickiness-0.ll
change-compare-stride-trickiness-1.ll
change-compare-stride-trickiness-2.ll
change-unsafe-fp-math.ll
cldemote-intrinsic.ll
cleanuppad-inalloca.ll
cleanuppad-large-codemodel.ll
cleanuppad-realign.ll [X86] Print register names in .seh_* directives 2019-08-30 21:23:05 +00:00
clear-highbits.ll
clear-lowbits.ll
clear_upper_vector_element_bits.ll [X86] EltsFromConsecutiveLoads - support common source loads (REAPPLIED) 2019-07-22 12:44:10 +00:00
clflushopt.ll
clwb.ll
clz.ll
clzero.ll
cmov-double.ll
cmov-fp.ll
cmov-into-branch.ll
cmov-promotion.ll Teach the DAGCombine to fold this pattern(c1 and c2 is constant). 2019-06-26 05:12:53 +00:00
cmov.ll [NFC][X86] Fixup comment in CodeGen/X86/cmov.ll 2019-11-19 16:24:07 +03:00
cmovcmov.ll
cmp-fast-isel.ll
cmp.ll [X86] Narrow i64 compares with constant to i32 when the upper 32-bits are known zero. 2019-10-29 11:38:15 -07:00
cmpxchg-clobber-flags.ll
cmpxchg-i1.ll
cmpxchg-i128-i1.ll
cmpxchg8b.ll [X86] Make CMPXCHG16B feature imply CMPXCHG8B feature. 2019-08-08 18:11:17 +00:00
cmpxchg8b_alloca_regalloc_handling.ll [X86] Fix latent bugs in 32-bit CMPXCHG8B inserter 2019-09-11 21:56:17 +00:00
cmpxchg16b.ll
coal-sections.ll
coalesce-dbg-value-subreg-rewrite.mir
coalesce-dead-lanes.mir
coalesce-esp.ll
coalesce-implicitdef.ll
coalesce_commute_movsd.ll [X86] Allow execution domain fixing to turn SHUFPD into SHUFPS. 2019-07-08 06:52:49 +00:00
coalesce_commute_subreg.ll
coalescer-commute1.ll
coalescer-commute2.ll
coalescer-commute3.ll
coalescer-commute4.ll
coalescer-commute5.ll
coalescer-cross.ll
coalescer-dce.ll
coalescer-dce2.ll
coalescer-identity.ll
coalescer-remat.ll
coalescer-subreg.ll
coalescer-win64.ll
code-model-elf-memset.ll
code-model-elf.ll
code-model-kernel.ll
code_placement.ll Revert [MBP] Disable aggressive loop rotate in plain mode 2019-08-29 19:03:58 +00:00
code_placement_align_all.ll
code_placement_cold_loop_blocks.ll [MBP] Move a latch block with conditional exit and multi predecessors to top of loop 2019-06-14 23:08:59 +00:00
code_placement_eh.ll
code_placement_ignore_succ_in_inner_loop.ll Revert [MBP] Disable aggressive loop rotate in plain mode 2019-08-29 19:03:58 +00:00
code_placement_loop_rotation.ll
code_placement_loop_rotation2.ll Revert r368339 "[MBP] Disable aggressive loop rotate in plain mode" 2019-08-12 14:23:13 +00:00
code_placement_loop_rotation3.ll
code_placement_no_header_change.ll Revert [MBP] Disable aggressive loop rotate in plain mode 2019-08-29 19:03:58 +00:00
codegen-prepare-addrmode-sext.ll
codegen-prepare-cast.ll
codegen-prepare-crash.ll
codegen-prepare-extload.ll
codegen-prepare-replacephi.mir
codegen-prepare-replacephi2.mir [CodeGenPrepare] Mend "avoid crashing from replacing a phi twice" fix. 2019-09-27 13:01:37 +00:00
codegen-prepare-uaddo.ll
codegen-prepare.ll
codemodel.ll
coff-comdat.ll
coff-comdat2.ll
coff-comdat3.ll
coff-feat00.ll
coff-fp-section-name.ll [COFF] Fix section name for constants larger than 64 bits on Windows 2019-08-22 01:48:34 +00:00
coff-no-dead-strip.ll
coff-weak.ll
coldcc64.ll
combine-64bit-vec-binop.ll Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default." 2019-08-07 16:24:26 +00:00
combine-abs.ll
combine-adc.ll
combine-add-ssat.ll
combine-add-usat.ll
combine-add.ll
combine-addo.ll
combine-adx.ll
combine-and.ll
combine-avx-intrinsics.ll
combine-avx2-intrinsics.ll
combine-bitreverse.ll
combine-bitselect.ll [X86] Add broadcast load folding patterns to the NoVLX compare patterns. 2019-10-02 04:45:02 +00:00
combine-bswap.ll
combine-concatvectors.ll
combine-fabs.ll [X86] Automatically generate various tests. NFC 2019-08-26 13:53:29 +00:00
combine-fcopysign.ll Revert "[NFC][CodeGen] Add unary FNeg tests to X86/combine-fcopysign.ll X86/dag-fmf-cse.ll X86/fast-isel-fneg.ll X86/fdiv.ll" 2019-06-13 19:24:38 +00:00
combine-lds.ll [X86] Automatically generate various tests. NFC 2019-08-26 13:53:29 +00:00
combine-mul.ll [DAGCombine] visitMUL - allow shift by zero in MulByConstant. 2019-06-24 12:47:17 +00:00
combine-mulo.ll [TargetLowering] Simplify expansion of S{ADD,SUB}O 2019-09-30 07:58:50 +00:00
combine-multiplies.ll
combine-or.ll Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default." 2019-08-07 16:24:26 +00:00
combine-pmuldq.ll [X86][SSE] combinePMULDQ - pmuldq(x, 0) -> zero vector (PR43159) 2019-08-29 20:22:08 +00:00
combine-rotates.ll
combine-sbb.ll [x86] try harder to form LEA from ADD to avoid flag conflicts (PR40483) 2019-07-18 12:48:01 +00:00
combine-sdiv.ll [X86] Enable BuildSDIVPow2 for i16. 2019-09-05 18:49:52 +00:00
combine-select.ll
combine-sext-in-reg.ll
combine-shl.ll [DAGCombiner] Support (shl (zext (srl x, C)), C) -> (zext (shl (srl x, C), C)) non-uniform folds. 2019-06-20 14:42:27 +00:00
combine-smax.ll
combine-smin.ll
combine-sra.ll
combine-srem.ll [X86] Enable BuildSDIVPow2 for i16. 2019-09-05 18:49:52 +00:00
combine-srl.ll
combine-sse41-intrinsics.ll [X86][SSE] Swap X86ISD::BLENDV inputs with an inverted selection mask (PR42825) 2019-08-09 12:44:20 +00:00
combine-sub-ssat.ll
combine-sub-usat.ll
combine-sub.ll
combine-subo.ll
combine-testm-and.ll
combine-udiv.ll [TargetLowering] SimplifyDemandedVectorElts - add shift/rotate support. 2019-06-27 14:25:54 +00:00
combine-umax.ll
combine-umin.ll
combine-urem.ll
combineIncDecVector-crash.ll [X86/Atomics] (Semantically) revert G246098, switch back to the old atomic example 2019-11-05 11:24:27 -08:00
commandline-metadata.ll
commute-3dnow.ll
commute-blend-avx2.ll
commute-blend-sse41.ll
commute-clmul.ll
commute-fcmp.ll [X86] Update commutable EVEX vcmp patterns to use timm instead of imm. 2019-09-22 19:06:13 +00:00
commute-intrinsic.ll
commute-two-addr.ll
commute-vpclmulqdq-avx.ll
commute-vpclmulqdq-avx512.ll
commute-xop.ll
commuted-blend-mask.ll
compact-unwind.ll
compare-add.ll
compare-global.ll
compare-inf.ll
compare_folding.ll
compiler_used.ll
complex-asm.ll
complex-fastmath.ll Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default." 2019-08-07 16:24:26 +00:00
complex-fca.ll
computeKnownBits_urem.ll
condbr_if.ll
condbr_switch.ll
conditional-indecrement.ll
conditional-tailcall-samedest.mir [Alignment] Use llvm::Align in MachineFunction and TargetLowering - fixes mir parsing 2019-09-11 11:16:48 +00:00
conditional-tailcall.ll [X86] Print register names in .seh_* directives 2019-08-30 21:23:05 +00:00
consecutive-load-shuffle.ll
const-base-addr.ll
const-shift-of-constmasked.ll
constant-combines.ll
constant-hoisting-and.ll
constant-hoisting-bfi.ll
constant-hoisting-cmp.ll
constant-hoisting-optnone.ll
constant-hoisting-shift-immediate.ll
constant-pool-remat-0.ll
constant-pool-sharing.ll
constpool.ll
constrained-fp80-trunc-ext.ll [FPEnv] Strict FP tests should use the requisite function attributes. 2019-10-04 17:03:46 +00:00
constructor.ll
convert-2-addr-3-addr-inc64.ll
copy-eflags.ll [FIX] Forces shrink wrapping to consider any memory access as aliasing with the stack 2019-06-13 13:56:19 +00:00
copy-propagation.ll
copysign-constant-magnitude.ll Automaticaly generate copysign-constant-magnitude.ll . NFC 2019-12-04 16:05:45 +01:00
cpus-amd-no-x86_64.ll
cpus-amd.ll
cpus-intel-no-x86_64.ll
cpus-intel.ll [X86] Support -march=tigerlake 2019-08-12 01:29:46 +00:00
cpus-no-x86_64.ll
cpus-other.ll
crash-O0.ll
crash-lre-eliminate-dead-def.ll
crash-nosse.ll
crash.ll
critical-anti-dep-breaker.ll
critical-edge-split-2.ll
cse-add-with-overflow.ll
csr-split.ll [NFC][Regalloc] Add testcases for D66576 2019-08-26 05:06:30 +00:00
cstring.ll
ctor-priority-coff.ll
ctpop-combine.ll [X86] Narrow i64 compares with constant to i32 when the upper 32-bits are known zero. 2019-10-29 11:38:15 -07:00
cvt16.ll
cvtv2f32.ll Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default." 2019-08-07 16:24:26 +00:00
cxx_tlscc64.ll
dag-fmf-cse.ll Revert "[NFC][CodeGen] Add unary FNeg tests to X86/combine-fcopysign.ll X86/dag-fmf-cse.ll X86/fast-isel-fneg.ll X86/fdiv.ll" 2019-06-13 19:24:38 +00:00
dag-merge-fast-accesses.ll [X86] Remove patterns from MOVLPSmr and MOVHPSmr instructions. 2019-07-06 17:59:51 +00:00
dag-optnone.ll
dag-rauw-cse.ll
dag-update-nodetomatch.ll
dagcombine-and-setcc.ll
dagcombine-buildvector.ll
dagcombine-cse.ll
dagcombine-select.ll
dagcombine-shifts.ll
dagcombine-tokenfactor-limit-crash.ll
dagcombine-unsafe-math.ll Migrate some more fadd and fsub cases away from UnsafeFPMath control to utilize NoSignedZerosFPMath options control 2019-07-31 21:57:28 +00:00
darwin-bzero.ll
darwin-no-dead-strip.ll
darwin-preemption.ll
darwin-quote.ll
darwin-tls.ll
dbg-baseptr.ll
dbg-changes-codegen-branch-folding.ll
dbg-changes-codegen-branch-folding2.mir [Alignment] Use llvm::Align in MachineFunction and TargetLowering - fixes mir parsing 2019-09-11 11:16:48 +00:00
dbg-changes-codegen.ll
dbg-combine.ll
dbg-line-0-no-discriminator.ll
dbg-value-func-arg.ll [DebugInfo] Fix for DW_OP_LLVM_fragment in DIExpression::isImplicit() 2019-11-03 17:37:49 +01:00
dbg-value-superreg-copy.mir
debug-loclists-lto.ll DebugInfo: Fix LTO+DWARFv5 loclists 2019-12-05 12:47:54 -08:00
debug-loclists.ll Recommit "[DWARF] Support for loclist.dwo section in llvm and llvm-dwarfdump." 2019-11-23 20:10:23 +05:30
debug-nodebug-crash.ll
debuginfo-locations-dce.ll
debugloc-argsize.ll
debugloc-no-line-0.ll
deopt-bundles.ll
deopt-intrinsic-cconv.ll
deopt-intrinsic.ll
disable-tail-calls.ll
discontiguous-loops.ll
discriminate-mem-ops-missing-info.ll
discriminate-mem-ops-skip-pfetch.ll
discriminate-mem-ops.ll
div-rem-pair-recomposition-signed.ll [X86] Use MOVSX by default instead of CBW to extend i8 to AX for i8 sdivrem. 2019-09-06 19:17:02 +00:00
div-rem-pair-recomposition-unsigned.ll [X86] Use MOVZX16rr8/MOVZXrm8 when extending input for i8 udivrem. 2019-09-06 19:15:04 +00:00
div-rem-simplify.ll
div8.ll
divide-by-constant.ll
divide-windows-itanium.ll
divrem.ll [X86] Use MOVSX by default instead of CBW to extend i8 to AX for i8 sdivrem. 2019-09-06 19:17:02 +00:00
divrem8_ext.ll [X86] Use MOVSX by default instead of CBW to extend i8 to AX for i8 sdivrem. 2019-09-06 19:17:02 +00:00
dllexport-x86_64.ll
dllexport.ll
dllimport-x86_64.ll
dllimport.ll
dollar-name.ll
domain-reassignment-implicit-def.ll
domain-reassignment-test.ll
domain-reassignment.mir [X86] Model MXCSR for all AVX512 instructions 2019-12-04 08:07:38 +08:00
dont-trunc-store-double-to-float.ll [X86] Automatically generate various tests. NFC 2019-08-26 13:53:29 +00:00
dropped_constructor.ll
dtor-priority-coff.ll Fixed placement of llvm.global_dtors on Windows. 2019-08-19 21:07:03 +00:00
dwarf-comp-dir.ll
dwarf-eh-prepare.ll
dwarf-headers.ll [DWARF5][Debuginfo] Compilation unit type (DW_UT_skeleton) and root DIE (DW_TAG_compile_unit) do not match. 2019-12-05 00:53:47 +03:00
dwarf-split-line-1.ll
dwarf-split-line-2.ll
dyn-stackalloc.ll
dyn_alloca_aligned.ll
dynamic-alloca-in-entry.ll
dynamic-alloca-lifetime.ll
dynamic-allocas-VLAs.ll
dynamic-regmask.ll
early-cfi-sections.ll
early-ifcvt-crash.ll
early-ifcvt.ll
eh-frame-unreachable.ll
eh-label.ll
eh-nolandingpads.ll
eh-null-personality.ll
eh-unknown.ll
eh_frame.ll
eip-addressing-i386.ll
element-wise-atomic-memory-intrinsics.ll
elf-associated.ll Revert r367501 "Create unique, but identically-named ELF sections..." 2019-08-07 20:45:23 +00:00
elf-comdat.ll
elf-comdat2.ll
emit-big-cst.ll
empty-function.ll [Windows] Replace TrapUnreachable with an int3 insertion pass 2019-09-09 23:04:25 +00:00
empty-functions.ll
empty-struct-return-type.ll
emutls-pic.ll
emutls-pie.ll
emutls.ll
emutls_generic.ll
enqcmd-intrinsics.ll
epilogue-cfi-fp.ll
epilogue-cfi-no-fp.ll
epilogue.ll
equiv_with_fndef.ll
equiv_with_vardef.ll
evex-to-vex-compress.mir [X86] Model MXCSR for all AVX512 instructions 2019-12-04 08:07:38 +08:00
exception-label.ll
exedeps-movq.ll
exedepsfix-broadcast.ll [X86] Gate select->fmin/fmax transform on NoSignedZeros instead of UnsafeFPMath 2019-11-05 21:28:41 +01:00
expand-integer-x86_64-intrinsic-error.ll
expand-opaque-const.ll
expand-post-ra-pseudo.mir
expand-vr64-gr64-copy.mir
extend-set-cc-uses-dbg.ll
extend.ll
extended-fma-contraction.ll
extern_weak.ll
extmul64.ll
extmul128.ll
extract-bits.ll [X86] X86DAGToDAGISel::matchBitExtract(): pattern c: truncation awareness 2019-06-26 12:19:47 +00:00
extract-combine.ll [X86] Automatically generate various tests. NFC 2019-08-26 13:53:29 +00:00
extract-concat.ll Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default." 2019-08-07 16:24:26 +00:00
extract-extract.ll [X86] Automatically generate various tests. NFC 2019-08-26 13:53:29 +00:00
extract-fp.ll
extract-insert.ll Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default." 2019-08-07 16:24:26 +00:00
extract-lowbits.ll [X86] X86DAGToDAGISel::matchBitExtract(): pattern c: truncation awareness 2019-06-26 12:19:47 +00:00
extract-store.ll [X86] Enable fp128 as a legal type with SSE1 rather than with MMX. 2019-09-02 20:16:30 +00:00
extractelement-fp.ll
extractelement-from-arg.ll
extractelement-index.ll [SDAG] fold extract_vector_elt with undef index 2019-10-25 19:27:26 -04:00
extractelement-legalization-cycle.ll
extractelement-legalization-store-ordering.ll
extractelement-load.ll [X86][SSE] Remove XFormVExtractWithShuffleIntoLoad to prevent legalization infinite loops (PR43971) 2019-11-19 11:55:44 +00:00
extractelement-shuffle.ll
extractps.ll
f16c-intrinsics-fast-isel.ll
f16c-intrinsics.ll Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default." 2019-08-07 16:24:26 +00:00
fabs.ll
fadd-combines.ll [DAGCombiner] exclude x*2.0 from normal negation profitability rules 2019-08-09 21:37:32 +00:00
fast-cc-callee-pops.ll
fast-cc-merge-stack-adj.ll
fast-cc-pass-in-regs.ll
fast-isel-abort-warm.ll
fast-isel-agg-constant.ll
fast-isel-args-fail.ll
fast-isel-args-fail2.ll
fast-isel-args.ll
fast-isel-atomic.ll
fast-isel-avoid-unnecessary-pic-base.ll
fast-isel-bail.ll
fast-isel-bc.ll
fast-isel-bitcasts-avx.ll
fast-isel-bitcasts-avx512.ll
fast-isel-bitcasts.ll
fast-isel-branch_weights.ll
fast-isel-call-bool.ll
fast-isel-call-cleanup.ll
fast-isel-call.ll
fast-isel-cmp-branch.ll
fast-isel-cmp-branch2.ll
fast-isel-cmp-branch3.ll
fast-isel-cmp.ll
fast-isel-constant.ll
fast-isel-constpool.ll
fast-isel-constrain-store-indexreg.ll
fast-isel-deadcode.ll
fast-isel-divrem-x86-64.ll
fast-isel-divrem.ll [X86] Teach FixupBWInsts to turn MOVSX16rr8/MOVZX16rr8/MOVSX16rm8/MOVZX16rm8 into their 32-bit dest equivalents when the upper part of the register is dead. 2019-09-06 19:14:49 +00:00
fast-isel-double-half-convertion.ll
fast-isel-emutls.ll
fast-isel-expect.ll
fast-isel-extract.ll
fast-isel-float-half-convertion.ll
fast-isel-fneg-kill.ll Rename ExpandISelPseudo->FinalizeISel, delay register reservation 2019-06-19 00:25:39 +00:00
fast-isel-fneg.ll Revert "[NFC][CodeGen] Add unary FNeg tests to X86/combine-fcopysign.ll X86/dag-fmf-cse.ll X86/fast-isel-fneg.ll X86/fdiv.ll" 2019-06-13 19:24:38 +00:00
fast-isel-fold-mem.ll
fast-isel-fptrunc-fpext.ll
fast-isel-gc-intrinsics.ll
fast-isel-gep.ll
fast-isel-gv.ll
fast-isel-i1.ll
fast-isel-int-float-conversion-x86-64.ll
fast-isel-int-float-conversion.ll
fast-isel-load-i1.ll
fast-isel-mem.ll
fast-isel-movsbl-indexreg.ll
fast-isel-nontemporal.ll [X86] Pass v32i16/v64i8 in zmm registers on KNL target. 2019-08-30 17:35:08 +00:00
fast-isel-noplt-pic.ll
fast-isel-ret-ext.ll
fast-isel-select-cmov.ll
fast-isel-select-cmov2.ll
fast-isel-select-cmp.ll
fast-isel-select-pseudo-cmov.ll [X86] Add VMOVSSZrrk/VMOVSDZrrk/VMOVSSZrrkz/VMOVSDZrrkz to getUndefRegClearance. 2019-09-26 22:56:06 +00:00
fast-isel-select-sse.ll [X86] Add VMOVSSZrrk/VMOVSDZrrk/VMOVSSZrrkz/VMOVSDZrrkz to getUndefRegClearance. 2019-09-26 22:56:06 +00:00
fast-isel-select.ll
fast-isel-sext-zext.ll
fast-isel-sext.ll
fast-isel-shift.ll
fast-isel-sse12-fptoint.ll
fast-isel-stackcheck.ll
fast-isel-store.ll [DAGCombine] narrowInsertExtractVectorBinOp - add CONCAT_VECTORS support 2019-07-11 14:45:03 +00:00
fast-isel-tailcall.ll
fast-isel-tls.ll
fast-isel-trunc-kill-subreg.ll
fast-isel-uint-float-conversion-x86-64.ll
fast-isel-uint-float-conversion.ll
fast-isel-vecload.ll [X86] Pass v32i16/v64i8 in zmm registers on KNL target. 2019-08-30 17:35:08 +00:00
fast-isel-x32.ll
fast-isel-x86-64.ll
fast-isel-x86.ll
fast-isel.ll
fastcall-correct-mangling.ll
fastcc-2.ll
fastcc-byval.ll
fastcc-sret.ll
fastcc.ll
fastcc3struct.ll
fastisel-gep-promote-before-add.ll
fastisel-softfloat.ll
fastmath-float-half-conversion.ll
fcmove.ll
fcmp-constant.ll
fdiv-combine-vec.ll
fdiv-combine.ll adding more fmf propagation for selects plus updated tests 2019-06-15 04:53:51 +00:00
fdiv.ll Revert "[NFC][CodeGen] Add unary FNeg tests to X86/combine-fcopysign.ll X86/dag-fmf-cse.ll X86/fast-isel-fneg.ll X86/fdiv.ll" 2019-06-13 19:24:38 +00:00
fentry-insertion.ll
field-extract-use-trunc.ll
fildll.ll
file-directive.ll
file-source-filename.ll
finite-libcalls.ll
fixed-stack-di-mir.ll Rename ExpandISelPseudo->FinalizeISel, delay register reservation 2019-06-19 00:25:39 +00:00
fixup-bw-copy.ll [DAGCombiner] Remove mostly redundant calls to AddToWorklist 2019-08-21 18:51:08 +00:00
fixup-bw-copy.mir
fixup-bw-inst.ll
fixup-bw-inst.mir [Alignment] Use llvm::Align in MachineFunction and TargetLowering - fixes mir parsing 2019-09-11 11:16:48 +00:00
fixup-lea.ll
flags-copy-lowering.mir
float-asmprint.ll
float-conv-elim.ll
floor-soft-float.ll
fltused.ll
fltused_function_pointer.ll
fltused_math.ll
fma-commute-x86.ll
fma-do-not-commute.ll
fma-fneg-combine-2.ll [DAGCombine] GetNegatedExpression - add FMA\FMAD support 2019-08-23 10:49:46 +00:00
fma-fneg-combine.ll Revert "[NFC][CodeGen] Add unary fneg tests to X86/fma-fneg-combine.ll" 2019-06-13 19:24:41 +00:00
fma-intrinsics-canonical.ll Revert "[NFC][CodeGen] Add unary FNeg tests to X86/fma-intrinsics-canonical.ll" 2019-06-13 19:24:47 +00:00
fma-intrinsics-fast-isel.ll Revert "[NFC][CodeGen] Add unary FNeg tests to some X86/ and XCore/ tests." 2019-06-13 19:24:51 +00:00
fma-intrinsics-phi-213-to-231.ll
fma-intrinsics-x86-upgrade.ll
fma-intrinsics-x86.ll Revert "[NFC][CodeGen] Add unary fneg tests to X86/fma-intrinsics-x86.ll" 2019-06-13 19:24:57 +00:00
fma-phi-213-to-231.ll
fma-scalar-combine.ll Revert "[NFC][CodeGen] Add unary fneg tests to X86/fma-scalar-combine.ll" 2019-06-13 19:25:00 +00:00
fma-scalar-memfold.ll
fma.ll [X86] Remove patterns from MOVLPSmr and MOVHPSmr instructions. 2019-07-06 17:59:51 +00:00
fma4-commute-x86.ll
fma4-fneg-combine.ll Revert "[NFC][CodeGen] Add unary fneg tests to X86/fma4-fneg-combine.ll" 2019-06-13 19:25:03 +00:00
fma4-intrinsics-x86-upgrade.ll
fma4-intrinsics-x86.ll Revert "[NFC][CodeGen] Add unary fneg tests to X86/fma4-intrinsics-x86.ll" 2019-06-13 19:24:54 +00:00
fma4-intrinsics-x86_64-folded-load.ll
fma4-scalar-memfold.ll
fma_patterns.ll Revert "[NFC][CodeGen] Add unary fneg tests to X86/fma_patterns.ll" 2019-06-13 19:25:06 +00:00
fma_patterns_wide.ll Revert "[NFC][CodeGen] Add unary fneg tests to X86/fma_patterns_wide.ll" 2019-06-13 19:25:09 +00:00
fmaddsub-combine.ll
fmaxnum.ll [X86] Add VMOVSSZrrk/VMOVSDZrrk/VMOVSSZrrkz/VMOVSDZrrkz to getUndefRegClearance. 2019-09-26 22:56:06 +00:00
fmf-flags.ll
fmf-propagation.ll
fminnum.ll [X86] Add VMOVSSZrrk/VMOVSDZrrk/VMOVSSZrrkz/VMOVSDZrrkz to getUndefRegClearance. 2019-09-26 22:56:06 +00:00
fmsubadd-combine.ll
fmul-combines.ll Migrate some more fadd and fsub cases away from UnsafeFPMath control to utilize NoSignedZerosFPMath options control 2019-07-31 21:57:28 +00:00
fnabs.ll Revert "[NFC][CodeGen] Add unary fneg tests to fmul-combines.ll fnabs.ll" 2019-06-13 19:25:12 +00:00
fold-add.ll
fold-and-shift-x86_64.ll
fold-and-shift.ll
fold-call-2.ll
fold-call-3.ll
fold-call-oper.ll
fold-call.ll
fold-imm.ll
fold-load-binops.ll [X86] Add load folding isel patterns to scalar_math_patterns and AVX512_scalar_math_fp_patterns. 2019-06-11 04:30:53 +00:00
fold-load-unops.ll [X86] Teach selectScalarSSELoad to not narrow volatile loads. 2019-06-27 05:51:56 +00:00
fold-load-vec.ll [X86] Teach materializeVectorConstant to not call getZeroVector/getOnesVector on the types we already have isel patterns for. 2019-09-08 19:24:29 +00:00
fold-load.ll
fold-mul-lohi.ll
fold-pcmpeqd-1.ll
fold-pcmpeqd-2.ll [FIX] Forces shrink wrapping to consider any memory access as aliasing with the stack 2019-06-13 13:56:19 +00:00
fold-push.ll
fold-rmw-ops.ll
fold-sext-trunc.ll
fold-tied-op.ll
fold-vector-bv-crash.ll
fold-vector-sext-crash.ll
fold-vector-sext-crash2.ll
fold-vector-sext-zext.ll Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default." 2019-08-07 16:24:26 +00:00
fold-vector-shl-crash.ll
fold-vector-shuffle-crash.ll
fold-vector-trunc-sitofp.ll
fold-vex.ll
fold-xmm-zero.ll
fold-zext-trunc.ll
fops-windows-itanium.ll
force-align-stack-alloca.ll
force-align-stack.ll
fp-arith.ll [X86] Don't set the operation action for i16 SINT_TO_FP to Promote just because SSE1 is enabled. 2019-11-13 14:07:56 -08:00
fp-cvt.ll [TargetLowering] Fix another potential FPE in expandFP_TO_UINT 2019-12-06 14:11:04 -08:00
fp-double-rounding.ll
fp-elim-and-no-fp-elim.ll
fp-elim.ll
fp-fast.ll Migrate some more fadd and fsub cases away from UnsafeFPMath control to utilize NoSignedZerosFPMath options control 2019-07-31 21:57:28 +00:00
fp-fold.ll Migrate some more fadd and fsub cases away from UnsafeFPMath control to utilize NoSignedZerosFPMath options control 2019-07-31 21:57:28 +00:00
fp-immediate-shorten.ll
fp-in-intregs.ll Revert "[NFC][CodeGen] Add unary fneg tests to fp-fast.ll fp-fold.ll fp-in-intregs.ll fp-stack-compare-cmov.ll fp-stack-compare.ll fsxor-alignment.ll" 2019-06-13 19:25:16 +00:00
fp-intrinsics-fma.ll [LegalizeDAG] Convert strict fp nodes to libcalls without losing the chain. 2019-11-18 11:24:08 -08:00
fp-intrinsics.ll [TargetLowering] Fix another potential FPE in expandFP_TO_UINT 2019-12-06 14:11:04 -08:00
fp-load-trunc.ll
fp-logic-replace.ll
fp-logic.ll
fp-select-cmp-and.ll
fp-stack-2results.ll
fp-stack-O0-crash.ll
fp-stack-O0.ll
fp-stack-compare-cmov.ll Revert "[NFC][CodeGen] Add unary fneg tests to fp-fast.ll fp-fold.ll fp-in-intregs.ll fp-stack-compare-cmov.ll fp-stack-compare.ll fsxor-alignment.ll" 2019-06-13 19:25:16 +00:00
fp-stack-compare.ll Revert "[NFC][CodeGen] Add unary fneg tests to fp-fast.ll fp-fold.ll fp-in-intregs.ll fp-stack-compare-cmov.ll fp-stack-compare.ll fsxor-alignment.ll" 2019-06-13 19:25:16 +00:00
fp-stack-direct-ret.ll
fp-stack-ret-conv.ll
fp-stack-ret-store.ll
fp-stack-ret.ll
fp-stack-retcopy.ll
fp-stack-set-st1.ll
fp-stack.ll
fp-strict-scalar.ll [X86] Add strict fp support for operations of X87 instructions 2019-11-26 10:59:41 -08:00
fp-trunc.ll
fp-undef.ll
fp-une-cmp.ll
fp2sint.ll
fp80-strict-scalar.ll [X86] Add strict fp support for operations of X87 instructions 2019-11-26 10:59:41 -08:00
fp128-calling-conv.ll
fp128-cast-strict.ll [FPEnv][SelectionDAG] Relax chain requirements 2019-12-06 11:02:11 +01:00
fp128-cast.ll [X86] Fix i16->f128 sitofp to promote the i16 to i32 before trying to form a libcall. 2019-11-20 17:09:32 -08:00
fp128-compare.ll [X86] Move x86_64 fp128 conversion to libcalls from type legalization to DAG legalization 2019-09-11 21:30:09 +00:00
fp128-extract.ll [X86] Change legalization action for f128 fadd/fsub/fmul/fdiv from Custom to LibCall. 2019-11-21 11:44:29 -08:00
fp128-g.ll [X86] Change legalization action for f128 fadd/fsub/fmul/fdiv from Custom to LibCall. 2019-11-21 11:44:29 -08:00
fp128-i128.ll Reland [MachineCopyPropagation] Extend MCP to do trivial copy backward propagation. 2019-12-05 14:32:11 +08:00
fp128-libcalls-strict.ll [FPEnv][SelectionDAG] Relax chain requirements 2019-12-06 11:02:11 +01:00
fp128-libcalls.ll [X86] Add 32-bit RUN line to fp128-libcalls.ll. Add nounwind to test functions. NFC 2019-11-24 21:58:57 -08:00
fp128-load.ll
fp128-select.ll [LegalizeTypes] Teach SoftenFloatOp_SELECT_CC to handle operand 2 or 3 being softened. 2019-09-10 07:56:02 +00:00
fp128-store.ll
fp_constant_op.ll
fp_load_cast_fold.ll
fp_load_fold.ll
fpcmp-soft-fp.ll
fpstack-debuginstr-kill.ll
fptosi-constant.ll
frame-base.ll
frame-lowering-debug-intrinsic-2.ll
frame-lowering-debug-intrinsic.ll
frame-order.ll
frameaddr.ll
frameregister.ll
frem-msvc32.ll
fsgsbase.ll
fshl.ll
fshr.ll Reland [MachineCopyPropagation] Extend MCP to do trivial copy backward propagation. 2019-12-05 14:32:11 +08:00
fsxor-alignment.ll Revert "[NFC][CodeGen] Add unary fneg tests to fp-fast.ll fp-fold.ll fp-in-intregs.ll fp-stack-compare-cmov.ll fp-stack-compare.ll fsxor-alignment.ll" 2019-06-13 19:25:16 +00:00
ftrunc.ll [X86] Add floating point execution domain to comi/ucomi/cvtss2si/cvtsd2si/cvttss2si/cvttsd2si/cvtsi2ss/cvtsi2sd instructions. 2019-11-30 11:26:28 -08:00
full-lsr.ll
funclet-layout.ll [Windows] Replace TrapUnreachable with an int3 insertion pass 2019-09-09 23:04:25 +00:00
function-alias.ll
function-subtarget-features-2.ll
function-subtarget-features.ll
funnel-shift-rot.ll
funnel-shift.ll
ga-offset.ll
ga-offset2.ll
gather-addresses.ll [X86] Remove patterns from MOVLPSmr and MOVHPSmr instructions. 2019-07-06 17:59:51 +00:00
gcc_except_table.ll [X86] Print register names in .seh_* directives 2019-08-30 21:23:05 +00:00
gcc_except_table_functions.ll
gep-expanded-vector.ll
getelementptr.ll
gfni-intrinsics.ll
ghc-cc.ll
ghc-cc64.ll
global-access-pie-copyrelocs.ll
global-access-pie.ll
global-fill.ll
global-sections-comdat.ll
global-sections-tls.ll
global-sections.ll
gnu-seh-nolpads.ll
gpr-to-mask.ll [X86] Add VMOVSSZrrk/VMOVSDZrrk/VMOVSSZrrkz/VMOVSDZrrkz to getUndefRegClearance. 2019-09-26 22:56:06 +00:00
greedy_regalloc_bad_eviction_sequence.ll
gs-fold.ll
h-register-addressing-32.ll
h-register-addressing-64.ll
h-register-store.ll
h-registers-0.ll [X86] Autogenerate complete checks. NFC 2019-10-14 01:41:04 +00:00
h-registers-1.ll
h-registers-2.ll [X86] Automatically generate various tests. NFC 2019-08-26 13:53:29 +00:00
h-registers-3.ll [X86] Autogenerate complete checks. NFC 2019-10-14 01:41:04 +00:00
haddsub-2.ll
haddsub-3.ll [X86][SSE] LowerUINT_TO_FP_i64 - only use HADDPD for size/fast-hops 2019-10-19 11:53:48 +00:00
haddsub-broadcast.ll [X86][SSE] LowerUINT_TO_FP_i64 - only use HADDPD for size/fast-hops 2019-10-19 11:53:48 +00:00
haddsub-shuf-undef-operand.ll [x86] fix horizontal math bug exposed by improved demanded elements analysis (PR43225) 2019-09-05 17:28:17 +00:00
haddsub-shuf.ll [X86][AVX] Add broadcast(v4f64 hadd) test 2019-06-13 11:42:32 +00:00
haddsub-undef.ll
haddsub.ll [SDAG][x86] check for relaxed math when matching an FP reduction 2019-08-15 12:43:15 +00:00
half.ll [X86] Remove patterns from MOVLPSmr and MOVHPSmr instructions. 2019-07-06 17:59:51 +00:00
handle-move.ll
heap-alloc-markers.mir [MIR] Add MIR parsing for heap alloc site instruction markers 2019-11-05 12:57:45 -08:00
hhvm-cc.ll
hidden-vis-2.ll
hidden-vis-3.ll
hidden-vis-4.ll
hidden-vis-pic.ll
hidden-vis.ll
hipe-cc.ll
hipe-cc64.ll
hipe-prologue.ll
hoist-and-by-const-from-lshr-in-eqcmp-zero.ll [Codegen] (X & (C l>>/<< Y)) ==/!= 0 --> ((X <</l>> Y) & C) ==/!= 0 fold 2019-07-24 22:57:22 +00:00
hoist-and-by-const-from-shl-in-eqcmp-zero.ll [Codegen] (X & (C l>>/<< Y)) ==/!= 0 --> ((X <</l>> Y) & C) ==/!= 0 fold 2019-07-24 22:57:22 +00:00
hoist-common.ll
hoist-invariant-load.ll
hoist-spill-lpad.ll
hoist-spill.ll
horizontal-reduce-smax.ll [X86][SSE] Enable min/max partial reduction 2019-08-06 11:00:34 +00:00
horizontal-reduce-smin.ll [X86][SSE] Enable min/max partial reduction 2019-08-06 11:00:34 +00:00
horizontal-reduce-umax.ll [X86][SSE] Enable min/max partial reduction 2019-08-06 11:00:34 +00:00
horizontal-reduce-umin.ll [X86][SSE] Enable min/max partial reduction 2019-08-06 11:00:34 +00:00
horizontal-shuffle-demanded.ll
horizontal-shuffle.ll
huge-stack-offset.ll
huge-stack-offset2.ll
i1narrowfail.ll
i2k.ll
i16lshr8pat.ll Rename ExpandISelPseudo->FinalizeISel, delay register reservation 2019-06-19 00:25:39 +00:00
i64-mem-copy.ll
i64-to-float.ll
i128-add.ll [X86] Delay combineIncDecVector until after op legalization. 2019-08-26 22:17:54 +00:00
i128-and-beyond.ll
i128-immediate.ll
i128-mul.ll Reland [MachineCopyPropagation] Extend MCP to do trivial copy backward propagation. 2019-12-05 14:32:11 +08:00
i128-ret.ll
i128-sdiv.ll
i256-add.ll
i386-setjmp-pic.ll
i386-shrink-wrapping.ll [FIX] Forces shrink wrapping to consider any memory access as aliasing with the stack 2019-06-13 13:56:19 +00:00
i386-tlscall-fastregalloc.ll
i486-fence-loop.ll
i686-win-shrink-wrapping.ll
iabs.ll
icall-branch-funnel.ll [CodeGen] Make branch funnels pass the machine verifier 2019-07-03 17:16:45 +00:00
icmp-opt.ll
ident-metadata.ll
ifunc-asm.ll [AsmPrinter] Delete redundant .type foo, @function when emitting an ifunc 2019-08-14 10:30:27 +00:00
illegal-bitfield-loadstore.ll
illegal-insert.ll
illegal-vector-args-return.ll
immediate_merging.ll
immediate_merging64.ll
implicit-faultmap.ll
implicit-null-check-negative.ll
implicit-null-check.ll [Test] Add a test case fo a missed oppurtunity in implicit null checking 2019-10-04 23:46:26 +00:00
implicit-null-checks.mir ImplicitNullChecks: Don't add a dead definition of DepMI as live-in 2019-12-03 11:02:53 +01:00
implicit-null-chk-reg-rewrite.mir [Alignment] Use llvm::Align in MachineFunction and TargetLowering - fixes mir parsing 2019-09-11 11:16:48 +00:00
implicit-use-spill.mir
imul-lea-2.ll
imul-lea.ll
imul.ll [SDAG] Fold umul_lohi with 0 or 1 multiplicand 2019-08-25 08:04:22 +00:00
inalloca-ctor.ll
inalloca-invoke.ll
inalloca-regparm.ll
inalloca-stdcall.ll
inalloca.ll
inc-of-add.ll [NFC][Codegen][X86][AArch64][ARM][PowerPC] Recommit: Add test coverage for "add-of-inc" vs "sub-of-not" 2019-07-02 16:48:49 +00:00
inconsistent_landingpad.ll
indirect-branch-tracking-r2.ll
indirect-branch-tracking.ll
indirect-hidden.ll
init-priority.ll
inline-0bh.ll
inline-asm-2addr.ll
inline-asm-A-constraint.ll
inline-asm-R-constraint.ll
inline-asm-avx-v-constraint-32bit.ll
inline-asm-avx-v-constraint.ll
inline-asm-avx512f-v-constraint.ll
inline-asm-avx512f-x-constraint.ll Rename ExpandISelPseudo->FinalizeISel, delay register reservation 2019-06-19 00:25:39 +00:00
inline-asm-avx512vl-v-constraint-32bit.ll
inline-asm-avx512vl-v-constraint.ll
inline-asm-bad-constraint-n.ll Emit diagnostic if an inline asm constraint requires an immediate 2019-08-03 05:52:47 +00:00
inline-asm-bad-modifier.ll
inline-asm-default-clobbers.ll Rename ExpandISelPseudo->FinalizeISel, delay register reservation 2019-06-19 00:25:39 +00:00
inline-asm-duplicated-constraint.ll
inline-asm-e-constraint.ll Emit diagnostic if an inline asm constraint requires an immediate 2019-08-03 05:52:47 +00:00
inline-asm-error.ll
inline-asm-flag-clobber.ll
inline-asm-flag-output.ll
inline-asm-fpstack.ll
inline-asm-h.ll
inline-asm-i-constraint-i1.ll
inline-asm-imm-out-of-range.ll Emit diagnostic if an inline asm constraint requires an immediate 2019-08-03 05:52:47 +00:00
inline-asm-modifier-V.ll
inline-asm-modifier-c.ll
inline-asm-modifier-n.ll
inline-asm-modifier-q.ll
inline-asm-mrv.ll
inline-asm-multilevel-gep.ll
inline-asm-n-constraint.ll Emit diagnostic if an inline asm constraint requires an immediate 2019-08-03 05:52:47 +00:00
inline-asm-out-regs.ll
inline-asm-pic.ll
inline-asm-ptr-cast.ll
inline-asm-q-regs.ll
inline-asm-sp-clobber-memcpy.ll
inline-asm-stack-realign.ll
inline-asm-stack-realign2.ll
inline-asm-stack-realign3.ll
inline-asm-tied.ll
inline-asm-x-scalar.ll
inline-asm.ll
inline-sse.ll
inlineasm-sched-bug.ll Stricter check for the memory access. 2019-07-27 18:57:59 +00:00
inreg.ll
ins_split_regalloc.ll
ins_subreg_coalesce-1.ll
ins_subreg_coalesce-2.ll
ins_subreg_coalesce-3.ll
insert-into-constant-vector.ll [X86] Remove patterns from MOVLPSmr and MOVHPSmr instructions. 2019-07-06 17:59:51 +00:00
insert-loaded-scalar.ll
insert-positions.ll
insert-prefetch-inline.afdo [AutoFDO] Properly merge context-sensitive profile of inlinee back to outlined function 2019-12-05 15:57:55 -08:00
insert-prefetch-inline.ll
insert-prefetch-invalid-instr.afdo
insert-prefetch-invalid-instr.ll
insert-prefetch-other.afdo
insert-prefetch.afdo
insert-prefetch.ll
insertelement-copytoregs.ll [X86] Automatically generate various tests. NFC 2019-08-26 13:53:29 +00:00
insertelement-duplicates.ll
insertelement-legalize.ll [X86] Automatically generate various tests. NFC 2019-08-26 13:53:29 +00:00
insertelement-ones.ll [X86] Remove patterns from MOVLPSmr and MOVHPSmr instructions. 2019-07-06 17:59:51 +00:00
insertelement-shuffle.ll [X86] Teach lowerV4I32Shuffle to only use broadcasts if the mask has more than one undef element. Prioritize shifts over broadcast in lowerV8I16Shuffle. 2019-08-19 18:15:50 +00:00
insertelement-var-index.ll [DAGCombiner] avoid crash on out-of-bounds insert index (PR44139) 2019-11-25 16:24:06 -05:00
insertelement-zero.ll
insertps-O0-bug.ll
insertps-combine.ll [X86][SSE] Remove XFormVExtractWithShuffleIntoLoad to prevent legalization infinite loops (PR43971) 2019-11-19 11:55:44 +00:00
insertps-from-constantpool.ll
insertps-unfold-load-bug.ll
instr-symbols.mir
int-intrinsic.ll
intersect-fma-fmf.ll
interval-update-remat.ll
invalid-liveness.mir
invalid-shift-immediate.ll
invpcid-intrinsic.ll
ipra-inline-asm.ll RegUsageInfoCollector: Skip AMDGPU entry point functions 2019-07-05 23:33:43 +00:00
ipra-local-linkage.ll
ipra-reg-alias.ll
ipra-reg-usage.ll [X86] Model MXCSR for all SSE instructions 2019-10-30 15:07:49 -07:00
ipra-transform.ll
isel-blendi-gettargetconstant.ll Fix missed case of switching getConstant to getTargetConstant. Try 2. 2019-09-20 22:26:55 +00:00
isel-optnone.ll
isel-sink.ll
isel-sink2.ll
isel-sink3.ll
isint.ll
isnan.ll
isnan2.ll
ispositive.ll
jump_sign.ll [X86] Merge negated ISD::SUB nodes into X86ISD::SUB equivalent (PR40483) 2019-07-11 15:56:33 +00:00
known-bits-vector.ll [x86] try to keep FP casted+truncated+extracted vector element out of GPRs 2019-07-15 18:17:23 +00:00
known-bits.ll [X86] Teach EmitTest to handle ISD::SSUBO/USUBO in order to use the Z flag from the subtract directly during isel. 2019-10-14 06:47:56 +00:00
known-signbits-vector.ll [X86] Regenerate known-signbits-vector.ll tests. 2019-11-04 15:12:01 +00:00
kshift.ll [X86] Pass v32i16/v64i8 in zmm registers on KNL target. 2019-08-30 17:35:08 +00:00
label-annotation.ll
label-heapallocsite.ll Recommit "Add a heap alloc site marker field to the ExtraInfo in MachineInstrs" 2019-10-28 16:59:32 -07:00
label-redefinition.ll
lack-of-signed-truncation-check.ll
lakemont.ll
large-code-model-isel.ll
large-constants.ll
large-gep-chain.ll
large-gep-scale.ll
large-global.ll
large-pic-string.ll
late-address-taken.ll
late-remat-update-2.mir
late-remat-update.mir [Alignment] Use llvm::Align in MachineFunction and TargetLowering - fixes mir parsing 2019-09-11 11:16:48 +00:00
ldzero.ll
lea-2.ll
lea-3.ll
lea-4.ll
lea-5.ll
lea-dagdag.ll
lea-opt-cse1.ll
lea-opt-cse2.ll
lea-opt-cse3.ll
lea-opt-cse4.ll
lea-opt-memop-check-1.ll
lea-opt-memop-check-2.ll
lea-opt-with-debug.mir [Alignment] Use llvm::Align in MachineFunction and TargetLowering - fixes mir parsing 2019-09-11 11:16:48 +00:00
lea-opt.ll
lea-recursion.ll
lea.ll
leaFixup32.mir [X86] Autogenerate checks in leaFixup32.mir and leaFixup64.mir. NFC 2019-10-07 06:50:56 +00:00
leaFixup64.mir [MachineBasicBlock] Skip over debug instructions in computeRegisterLiveness before checking for begin 2019-11-01 14:43:17 -07:00
leaf-fp-elim.ll
legalize-fmp-oeq-vector-select.ll
legalize-libcalls.ll
legalize-shift-64.ll
legalize-shift.ll
legalize-shl-vec.ll
legalize-sub-zero-2.ll
legalize-sub-zero.ll
legalize-types-remapid.ll
legalize-vaarg.ll [SelectionDAG] Legalize vaargs that require vector splitting 2019-06-18 12:24:02 +00:00
legalizedag_vec.ll
libcall-sret.ll
licm-dominance.ll
licm-nested.ll
licm-regpressure.ll
licm-symbol.ll
lifetime-alias.ll
limit-split-cost.mir [Alignment] Use llvm::Align in MachineFunction and TargetLowering - fixes mir parsing 2019-09-11 11:16:48 +00:00
limited-prec.ll
linux-preemption.ll
lit.local.cfg [lit] Delete empty lines at the end of lit.local.cfg NFC 2019-06-17 09:51:07 +00:00
live-out-reg-info.ll
live-range-nosubreg.ll
liveness-local-regalloc.ll
llc-override-mcpu-mattr.ll
llc-print-machineinstrs.mir
llc-start-stop-instance.ll
llrint-conv-i32.ll
llrint-conv.ll
llround-conv-i32.ll
llround-conv.ll
load-combine-dbg.ll
load-combine.ll Reland "[DAGCombiner] Allow zextended load combines." 2019-11-22 14:47:18 +01:00
load-local-v3i1.ll [X86] Automatically generate load-local-v3i1.ll . NFC 2019-08-23 18:12:33 +00:00
load-partial.ll [X86][SSE] EltsFromConsecutiveLoads - ignore non-zero offset base loads (PR43227) 2019-09-05 15:07:07 +00:00
load-scalar-as-vector.ll
load-slice.ll
loadStore_vectorizer.ll
loc-remat.ll
local_stack_symbol_ordering.ll
localescape.ll [X86] Print register names in .seh_* directives 2019-08-30 21:23:05 +00:00
log2_not_readnone.ll
logical-load-fold.ll
long-setcc.ll
longlong-deadload.ll
loop-blocks.ll Revert [MBP] Disable aggressive loop rotate in plain mode 2019-08-29 19:03:58 +00:00
loop-hoist.ll
loop-rotate.ll Revert [MBP] Disable aggressive loop rotate in plain mode 2019-08-29 19:03:58 +00:00
loop-search.ll [Codegen] Merge tail blocks with no successors after block placement 2019-06-13 18:11:32 +00:00
loop-strength-reduce-2.ll
loop-strength-reduce-3.ll
loop-strength-reduce-crash.ll
loop-strength-reduce.ll
loop-strength-reduce2.ll
loop-strength-reduce4.ll
loop-strength-reduce5.ll
loop-strength-reduce6.ll
loop-strength-reduce7.ll
loop-strength-reduce8.ll
lower-bitcast.ll Recommit r368079 "[X86] Remove uses of the -x86-experimental-vector-widening-legalization flag from test/CodeGen/X86/" 2019-08-07 16:33:37 +00:00
lower-ptrmask.ll Add ptrmask intrinsic 2019-08-15 10:12:26 +00:00
lower-vec-shift-2.ll
lower-vec-shift.ll
lower-vec-shuffle-bug.ll
lrint-conv-i32.ll
lrint-conv.ll
lround-conv-i32.ll
lround-conv.ll
lrshrink.ll [X86] Regenerate lrshrink test checks to make D65354 diff easier 2019-07-31 12:30:24 +00:00
lsr-crash-empty-uses.ll
lsr-delayed-fold.ll
lsr-i386.ll
lsr-interesting-step.ll
lsr-loop-exit-cond.ll Revert [MBP] Disable aggressive loop rotate in plain mode 2019-08-29 19:03:58 +00:00
lsr-negative-stride.ll
lsr-nonaffine.ll
lsr-normalization.ll
lsr-overflow.ll
lsr-quadratic-expand.ll
lsr-redundant-addressing.ll
lsr-reuse-trunc.ll
lsr-reuse.ll
lsr-sort.ll
lsr-static-addr.ll
lsr-wrap.ll
lwp-intrinsics-x86_64.ll
lwp-intrinsics.ll
lzcnt-tzcnt.ll
lzcnt-zext-cmp.ll [X86] Add floating point execution domain to comi/ucomi/cvtss2si/cvtsd2si/cvttss2si/cvttsd2si/cvtsi2ss/cvtsi2sd instructions. 2019-11-30 11:26:28 -08:00
lzcnt.ll
macCatalyst.ll [macCatalyst] Use macCatalyst pretty name in .build_version darwin 2019-07-12 22:06:08 +00:00
machine-combiner-int-vec.ll Revert r373172 "[X86] Add custom isel logic to match VPTERNLOG from 2 logic ops." 2019-10-01 22:40:03 +00:00
machine-combiner-int.ll
machine-combiner.ll [X86] Specifically limit fmin/fmax commutativity to NoNaNs + NoSignedZeros 2019-11-05 19:34:06 +01:00
machine-copy-prop.mir
machine-cp-debug.mir
machine-cp.ll [Codegen] Merge tail blocks with no successors after block placement 2019-06-13 18:11:32 +00:00
machine-cse.ll
machine-outliner-debuginfo.ll
machine-outliner-disubprogram.ll
machine-outliner-noredzone.ll
machine-outliner-tailcalls.ll
machine-outliner.ll
machine-region-info.mir
machine-sink-and-implicit-null-checks.ll
machine-sink.ll
machine-trace-metrics-crash.ll
machinesink-merge-debuginfo.ll [debug-info] Make a couple of tests more robust. 2019-06-27 15:53:07 +00:00
machinesink-null-debuginfo.ll [debug-info] Make a couple of tests more robust. 2019-06-27 15:53:07 +00:00
macho-comdat.ll
macho-trap.ll
madd.ll [X86] Teach X86MCInstLower to swap operands of commutable instructions to enable 2-byte VEX encoding. 2019-11-04 22:07:46 -08:00
mangle-question-mark.ll
mask-negated-bool.ll
masked-iv-safe.ll [X86] Automatically generate various tests. NFC 2019-08-26 13:53:29 +00:00
masked-iv-unsafe.ll [X86] Automatically generate various tests. NFC 2019-08-26 13:53:29 +00:00
masked_compressstore.ll [X86] Teach X86MCInstLower to swap operands of commutable instructions to enable 2-byte VEX encoding. 2019-11-04 22:07:46 -08:00
masked_expandload.ll [X86] Teach X86MCInstLower to swap operands of commutable instructions to enable 2-byte VEX encoding. 2019-11-04 22:07:46 -08:00
masked_gather.ll [ScalarizeMaskedMemIntrin] Bitcast the mask to the scalar domain and use scalar bit tests for the branches. 2019-07-31 22:58:15 +00:00
masked_gather_scatter.ll [X86] Shrink zero extends of gather indices from type less than i32 to types larger than i32. 2019-10-07 23:03:12 +00:00
masked_gather_scatter_widen.ll Recommit r368079 "[X86] Remove uses of the -x86-experimental-vector-widening-legalization flag from test/CodeGen/X86/" 2019-08-07 16:33:37 +00:00
masked_load.ll [SelectionDAG][X86] Move setcc mask splitting for mload/mstore/mgather/mscatter from DAGCombiner to the type legalizer. 2019-08-08 21:14:08 +00:00
masked_store.ll [X86] Rewrite to the vXi1 subvector insertion code to not rely on the value of bits that might be undef 2019-10-02 17:47:09 +00:00
masked_store_trunc.ll [X86] Pass v32i16/v64i8 in zmm registers on KNL target. 2019-08-30 17:35:08 +00:00
masked_store_trunc_ssat.ll [X86] Enable use of avx512 saturating truncate instructions in more cases. 2019-10-13 19:07:28 +00:00
masked_store_trunc_usat.ll [X86] Enable use of avx512 saturating truncate instructions in more cases. 2019-10-13 19:07:28 +00:00
maskmovdqu.ll
materialize.ll
mature-mc-support.ll
mbp-false-cfg-break.ll
mcinst-avx-lowering.ll
mcinst-lowering.ll
mcu-abi.ll
mem-intrin-base-reg.ll
mem-promote-integers.ll
membarrier.ll
memcmp-mergeexpand.ll Revert "Reland "r364412 [ExpandMemCmp][MergeICmps] Move passes out of CodeGen into opt pipeline."" 2019-09-10 10:39:09 +00:00
memcmp-minsize.ll [X86] Make memcmp() use PTEST if possible and also enable AVX1 2019-10-15 17:40:12 +00:00
memcmp-more-load-pairs.ll [X86] Reland: Enable YMM memcmp with AVX1 2019-11-01 08:58:48 +02:00
memcmp-optsize.ll [X86] Reland: Enable YMM memcmp with AVX1 2019-11-01 08:58:48 +02:00
memcmp.ll [X86] Reland: Enable YMM memcmp with AVX1 2019-11-01 08:58:48 +02:00
memcpy-2.ll
memcpy-from-string.ll
memcpy-struct-by-value.ll
memcpy.ll Prefer AVX512 memcpy when applicable 2019-09-23 05:00:59 +00:00
mempcpy-32.ll
mempcpy.ll
memset-2.ll
memset-3.ll [X86] Automatically generate various tests. NFC 2019-08-26 13:53:29 +00:00
memset-nonzero.ll [X86] Reduce the number of unique check prefixes in memset-nonzero.ll. NFC 2019-09-23 21:29:28 +00:00
memset-sse-stack-realignment.ll [X86] Automatically generate various tests. NFC 2019-08-26 13:53:29 +00:00
memset-zero.ll Prefer AVX512 memcpy when applicable 2019-09-23 05:00:59 +00:00
memset.ll
memset64-on-x86-32.ll
merge-consecutive-loads-128.ll [X86] Add PS<->PD domain changing support for MOVH/MOVL load instructions and MOVH store instructions. 2019-07-06 17:59:57 +00:00
merge-consecutive-loads-256.ll Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default." 2019-08-07 16:24:26 +00:00
merge-consecutive-loads-512.ll [X86] Pass v32i16/v64i8 in zmm registers on KNL target. 2019-08-30 17:35:08 +00:00
merge-consecutive-stores-i1.ll
merge-consecutive-stores-nt.ll [X86][AMDGPU][DAGCombiner] Move call to allowsMemoryAccess into isLoadBitCastBeneficial/isStoreBitCastBeneficial to allow X86 to bypass it 2019-07-09 19:55:28 +00:00
merge-consecutive-stores.ll
merge-sp-update-lea.ll
merge-sp-updates-cfi.ll
merge-store-constants.ll
merge-store-partially-alias-loads.ll
merge-vector-stores-scale-idx-crash.ll
merge_store.ll
merge_store_duplicated_loads.ll
mfence.ll
midpoint-int-vec-128.ll Revert r373172 "[X86] Add custom isel logic to match VPTERNLOG from 2 logic ops." 2019-10-01 22:40:03 +00:00
midpoint-int-vec-256.ll [X86] Teach X86MCInstLower to swap operands of commutable instructions to enable 2-byte VEX encoding. 2019-11-04 22:07:46 -08:00
midpoint-int-vec-512.ll Revert r373172 "[X86] Add custom isel logic to match VPTERNLOG from 2 logic ops." 2019-10-01 22:40:03 +00:00
midpoint-int.ll [X86] Add a one use check on the setcc to the min/max canonicalization code in combineSelect. 2019-10-13 06:48:05 +00:00
min-legal-vector-width.ll [X86] Don't consider v64i1 as a legal type unless v64i8 is also a legal type. 2019-11-12 14:56:02 -08:00
mingw-alloca.ll
mingw-comdats-xdata.ll
mingw-comdats.ll
mingw-refptr.ll [TargetMachine] Don't try to create COFFSTUB references on windows on non-COFF 2019-08-20 18:58:05 +00:00
misaligned-memset.ll
misched-aa-colored.ll
misched-aa-mmos.ll
misched-balance.ll
misched-code-difference-with-debug.ll
misched-copy.ll
misched-crash.ll
misched-fusion.ll
misched-ilp.ll
misched-matmul.ll
misched-matrix.ll
misched-new.ll
misched_phys_reg_assign_order.ll
mixed-ptr-sizes.ll Add support for lowering 32-bit/64-bit pointers 2019-12-04 11:39:03 -08:00
mmx-arg-passing-x86-64.ll [X86] Add custom type legalization for bitcasting mmx to v2i32/v4i16/v8i8 to use movq2dq instead of going through memory. 2019-08-15 18:23:37 +00:00
mmx-arg-passing.ll
mmx-arith.ll [X86] Clamp large constant shift amounts for MMX shift intrinsics to 8-bits. 2019-11-06 13:03:18 -08:00
mmx-bitcast-fold.ll
mmx-bitcast.ll
mmx-build-vector.ll [X86] Add patterns to select (scalar_to_vector (loadf32)) as (V)MOVSSrm instead of COPY_TO_REGCLASS + (V)MOVSSrm_alt. 2019-07-02 17:51:02 +00:00
mmx-coalescing.ll [MBP] Avoid tail duplication if it can't bring benefit 2019-12-06 09:53:53 -08:00
mmx-copy-gprs.ll
mmx-cvt.ll [X86] Add custom type legalization for bitcasting mmx to v2i32/v4i16/v8i8 to use movq2dq instead of going through memory. 2019-08-15 18:23:37 +00:00
mmx-fold-load.ll [X86][SelectionDAGBuilder] Move the hack for handling MMX shift by i32 intrinsics into the X86 backend. 2019-09-23 01:05:33 +00:00
mmx-fold-zero.ll
mmx-intrinsics.ll [X86] Use timm in MMX pinsrw/pextrw isel patterns. Add missing test cases. 2019-09-20 06:00:35 +00:00
mmx-only.ll
mod128.ll
movbe.ll
movddup-load-fold.ll
movdir-intrinsic-x86.ll
movdir-intrinsic-x86_64.ll
move_latch_to_loop_top.ll Revert [MBP] Disable aggressive loop rotate in plain mode 2019-08-29 19:03:58 +00:00
movfs.ll
movgs.ll
movmsk-cmp.ll [X86][AVX] Add support for and/or scalar bool reduction with AVX512 mask registers 2019-11-01 17:55:31 +00:00
movmsk.ll
movntdq-no-avx.ll
movpc32-check.ll
movtopush.ll
movtopush.mir [Alignment] Use llvm::Align in MachineFunction and TargetLowering - fixes mir parsing 2019-09-11 11:16:48 +00:00
movtopush64.ll
ms-inline-asm-avx512.ll [X86] Remove what little support we had for MPX 2019-08-29 18:09:02 +00:00
ms-inline-asm-redundant-clobber.ll
ms-inline-asm.ll
mul-constant-i8.ll
mul-constant-i16.ll
mul-constant-i32.ll
mul-constant-i64.ll
mul-constant-result.ll [Codegen] Merge tail blocks with no successors after block placement 2019-06-13 18:11:32 +00:00
mul-i256.ll [SDAG] Fold umul_lohi with 0 or 1 multiplicand 2019-08-25 08:04:22 +00:00
mul-i512.ll Reland [MachineCopyPropagation] Extend MCP to do trivial copy backward propagation. 2019-12-05 14:32:11 +08:00
mul-i1024.ll [SDAG] Fold umul_lohi with 0 or 1 multiplicand 2019-08-25 08:04:22 +00:00
mul-legalize.ll
mul-remat.ll
mul-shift-reassoc.ll
mul64.ll
mul128.ll [SDAG] Fold umul_lohi with 0 or 1 multiplicand 2019-08-25 08:04:22 +00:00
mul128_sext_loop.ll
mulfix_combine.ll [Intrinsic] Add the llvm.umul.fix.sat intrinsic 2019-09-07 12:16:14 +00:00
mulo-pow2.ll [TargetLowering] Simplify expansion of S{ADD,SUB}O 2019-09-30 07:58:50 +00:00
muloti.ll
mult-alt-generic-i686.ll
mult-alt-generic-x86_64.ll
mult-alt-x86.ll
multiple-loop-post-inc.ll
multiple-return-values-cross-block.ll
mulvi32.ll Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default." 2019-08-07 16:24:26 +00:00
mulx32.ll
mulx64.ll
musttail-fastcall.ll [X86] Disable use of zmm registers for varargs musttail calls under prefer-vector-width=256 and min-legal-vector-width=256. 2019-08-12 17:43:26 +00:00
musttail-inalloca.ll [X86] Don't setup and teardown memory for a musttail call 2019-12-06 12:58:54 -08:00
musttail-indirect.ll
musttail-tailcc.ll [X86] Don't setup and teardown memory for a musttail call 2019-12-06 12:58:54 -08:00
musttail-thiscall.ll
musttail-varargs.ll [X86] Don't setup and teardown memory for a musttail call 2019-12-06 12:58:54 -08:00
musttail.ll
mwaitx.ll
mxcsr-reg-usage.ll [X86] Model DAZ and FTZ 2019-12-04 08:22:45 +08:00
named-reg-alloc.ll
named-reg-notareg.ll
nancvt.ll
narrow-shl-cst.ll
narrow-shl-load.ll
narrow_op-1.ll
neg-of-3ops-lea.ll [X86][Codegen] Add missed pattern that may be a lea+neg 2019-06-08 19:38:14 +00:00
neg-shl-add.ll
neg_cmp.ll
neg_fp.ll Revert "[NFC][CodeGen] Add unary FNeg tests to some X86/ and XCore/ tests." 2019-06-13 19:24:51 +00:00
negate-add-zero.ll
negate-i1.ll
negate-shift.ll
negate.ll
negative-offset.ll
negative-sin.ll
negative-stride-fptosi-user.ll
negative-subscript.ll
negative_zero.ll
new-remat.ll
newline-and-quote.ll
no-and8ri8.ll
no-cmov.ll
no-plt-libcalls.ll [SimplifyLibCalls] Mark known arguments with nonnull 2019-09-17 09:32:52 +00:00
no-plt.ll
no-prolog-kill.ll
no-sse2-avg.ll
no-stack-arg-probe.ll
nobt.ll
nocf_check.ll
nocx16.ll
nomovtopush.ll [X86] Fix stack probe issue on windows32. 2019-08-10 02:49:02 +00:00
non-lazy-bind.ll
non-unique-sections.ll
non-value-mem-operand.mir [Alignment] Use llvm::Align in MachineFunction and TargetLowering - fixes mir parsing 2019-09-11 11:16:48 +00:00
nonconst-static-ev.ll
nonconst-static-iv.ll
nontemporal-2.ll [DAGCombine] narrowInsertExtractVectorBinOp - add CONCAT_VECTORS support 2019-07-11 14:45:03 +00:00
nontemporal-3.ll [X86] Make getZeroVector return floating point vectors in their native type on SSE2 and later. 2019-09-08 00:43:52 +00:00
nontemporal-loads-2.ll [X86] Pass v32i16/v64i8 in zmm registers on KNL target. 2019-08-30 17:35:08 +00:00
nontemporal-loads.ll [X86] Pass v32i16/v64i8 in zmm registers on KNL target. 2019-08-30 17:35:08 +00:00
nontemporal.ll
noreturn-call-linux.ll [X86] Don't emit unreachable stack adjustments 2019-08-29 21:24:41 +00:00
noreturn-call-win64.ll [Windows] Replace TrapUnreachable with an int3 insertion pass 2019-09-09 23:04:25 +00:00
noreturn-call.ll [X86] Don't emit unreachable stack adjustments 2019-08-29 21:24:41 +00:00
norex-subreg.ll
nosse-error1.ll
nosse-error2.ll
nosse-varargs.ll
nosse-vector.ll
not-and-simplify.ll
note-cet-property.ll
note-sections.ll
null-streamer.ll
objc-gc-module-flags.ll
oddshuffles.ll [DAGCombiner][X86] Teach visitCONCAT_VECTORS to combine (concat_vectors (concat_vectors X, Y), undef)) -> (concat_vectors X, Y, undef, undef) 2019-08-20 22:12:50 +00:00
oddsubvector.ll Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default." 2019-08-07 16:24:26 +00:00
omit-urem-of-power-of-two-or-zero-when-comparing-with-zero.ll [CodeGen] [SelectionDAG] More efficient code for X % C == 0 (UREM case) (try 3) 2019-06-27 21:52:10 +00:00
opaque-constant-asm.ll
opt-ext-uses.ll
opt-shuff-tstore.ll
opt_phis.mir
opt_phis2.mir [Alignment] Use llvm::Align in MachineFunction and TargetLowering - fixes mir parsing 2019-09-11 11:16:48 +00:00
optimize-max-0.ll
optimize-max-1.ll
optimize-max-2.ll
optimize-max-3.ll
or-address.ll
or-branch.ll [Peephole] Allow folding loads into instructions w/multiple uses (such as test64rr) 2019-06-25 17:29:18 +00:00
or-lea.ll
osx-private-labels.ll
overflow-intrinsic-setcc-fold.ll
overflow.ll [SDAG] Fold umul_lohi with 0 or 1 multiplicand 2019-08-25 08:04:22 +00:00
overlap-shift.ll
packed_struct.ll
packss.ll [X86][SSE] matchVectorShuffleAsBlend - use Zeroable element mask directly. 2019-10-06 12:38:38 +00:00
paddus.ll [X86] Add DAG combine to fold any_extend_vector_inreg+truncstore to an extractelement+store 2019-07-31 22:43:08 +00:00
palignr.ll [X86] Allow execution domain fixing to turn SHUFPD into SHUFPS. 2019-07-08 06:52:49 +00:00
parity.ll
partial-fold32.ll
partial-fold64.ll
partition.ll
pass-three.ll
patchable-prologue.ll
patchpoint-invoke.ll
patchpoint-verifiable.mir
patchpoint-webkit_jscc.ll
patchpoint.ll
pause.ll
peep-setb.ll
peep-test-0.ll
peep-test-1.ll
peep-test-2.ll
peep-test-3.ll
peep-test-4.ll
peephole-cvt-sse.ll
peephole-fold-movsd.ll [X86] Regenerate load fold peephole test. 2019-07-04 12:33:37 +00:00
peephole-fold-testrr.mir [Alignment] Use llvm::Align in MachineFunction and TargetLowering - fixes mir parsing 2019-09-11 11:16:48 +00:00
peephole-multiple-folds.ll
peephole-na-phys-copy-folding.ll
peephole-recurrence.mir
peephole.mir
personality.ll
personality_size.ll
phaddsub-extract.ll [DAGCombine] matchBinOpReduction - add partial reduction matching 2019-07-24 17:29:56 +00:00
phaddsub-undef.ll
phaddsub.ll
phi-bit-propagation.ll
phi-immediate-factoring.ll
phielim-split.ll
phys-reg-local-regalloc.ll
phys_subreg_coalesce-2.ll
phys_subreg_coalesce-3.ll
phys_subreg_coalesce.ll
physreg-pairs-error.ll
physreg-pairs.ll
pic-load-remat.ll
pic.ll
pic_jumptable.ll
pie.ll
pku.ll
pmaddubsw.ll [X86] Improve the AVX512 bailout in combineTruncateWithSat to allow pack instructions in more situations. 2019-10-11 00:38:51 +00:00
pmovext.ll
pmovsx-inreg.ll [x86] split 256-bit store of concatenated vectors 2019-06-04 16:40:04 +00:00
pmul.ll [X86] Pass v32i16/v64i8 in zmm registers on KNL target. 2019-08-30 17:35:08 +00:00
pmulh.ll [X86] Pass v32i16/v64i8 in zmm registers on KNL target. 2019-08-30 17:35:08 +00:00
pmulld.ll
pointer-vector.ll Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default." 2019-08-07 16:24:26 +00:00
pop-stack-cleanup-msvc.ll
pop-stack-cleanup.ll
popcnt.ll [X86] Add custom isel to select ADD/SUB/OR/XOR/AND to their non-immediate forms under optsize when the immediate has additional users. 2019-07-04 22:53:57 +00:00
post-ra-sched-with-debug.mir
post-ra-sched.ll
postalloc-coalescing.ll
postra-ignore-dbg-instrs.mir [Alignment] Use llvm::Align in MachineFunction and TargetLowering - fixes mir parsing 2019-09-11 11:16:48 +00:00
postra-licm.ll
pow.75.ll
pow.ll
powi-windows.ll [AArch64][X86] Don't assume __powidf2 is available on Windows. 2019-11-08 12:43:21 -08:00
powi.ll
pr1462.ll
pr1489.ll
pr1505.ll
pr1505b.ll
pr2177.ll
pr2182.ll
pr2326.ll
pr2585.ll
pr2656.ll [X86] Add patterns to select (scalar_to_vector (loadf32)) as (V)MOVSSrm instead of COPY_TO_REGCLASS + (V)MOVSSrm_alt. 2019-07-02 17:51:02 +00:00
pr2659.ll
pr2849.ll
pr2924.ll
pr2982.ll
pr3154.ll
pr3216.ll
pr3241.ll
pr3243.ll
pr3244.ll
pr3250.ll
pr3317.ll
pr3366.ll
pr3457.ll
pr3522.ll
pr5145.ll
pr7882.ll
pr9127.ll
pr9517.ll
pr9743.ll
pr10068.ll
pr10475.ll
pr10499.ll
pr10523.ll
pr10524.ll
pr10525.ll
pr10526.ll
pr11202.ll
pr11334.ll [X86] Add PS<->PD domain changing support for MOVH/MOVL load instructions and MOVH store instructions. 2019-07-06 17:59:57 +00:00
pr11415.ll
pr11468.ll
pr11985.ll
pr11998.ll
pr12360.ll
pr12889.ll
pr13209.ll
pr13220.ll
pr13458.ll
pr13577.ll
pr13859.ll
pr13899.ll
pr14088.ll
pr14098.ll
pr14161.ll Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default." 2019-08-07 16:24:26 +00:00
pr14204.ll
pr14314.ll
pr14333.ll
pr14562.ll
pr15267.ll
pr15296.ll
pr15309.ll
pr15705.ll
pr15981.ll
pr16031.ll
pr16360.ll
pr16807.ll
pr17546.ll
pr17631.ll
pr17764.ll
pr18014.ll
pr18054.ll
pr18162.ll
pr18344.ll
pr18846.ll
pr19049.ll
pr20011.ll
pr20012.ll
pr20020.ll
pr20088.ll
pr21099.ll
pr21792.ll
pr22019.ll
pr22103.ll
pr22338.ll
pr22473.ll
pr22774.ll
pr22970.ll
pr23103.ll
pr23246.ll
pr23273.ll
pr23603.ll
pr23664.ll
pr24139.ll
pr24374.ll [Windows] Replace TrapUnreachable with an int3 insertion pass 2019-09-09 23:04:25 +00:00
pr24602.ll
pr25828.ll
pr26350.ll
pr26625.ll
pr26652.ll
pr26757.ll
pr26835.ll
pr26870.ll
pr27071.ll
pr27202.ll [X86] Add custom isel to select ADD/SUB/OR/XOR/AND to their non-immediate forms under optsize when the immediate has additional users. 2019-07-04 22:53:57 +00:00
pr27501.ll
pr27591.ll
pr27681.mir
pr28129.ll
pr28173.ll
pr28444.ll
pr28472.ll [X86] Automatically generate various tests. NFC 2019-08-26 13:53:29 +00:00
pr28489.ll
pr28515.ll
pr28560.ll
pr28824.ll
pr29010.ll
pr29022.ll
pr29061.ll
pr29112.ll [X86] Teach X86MCInstLower to swap operands of commutable instructions to enable 2-byte VEX encoding. 2019-11-04 22:07:46 -08:00
pr29170.ll
pr29222.ll
pr30284.ll [TargetLowering] SimplifyDemandedBits - legal checks for SIGN/ZERO_EXTEND -> ZERO/ANY_EXTEND 2019-06-25 10:51:15 +00:00
pr30290.ll
pr30430.ll [X86] Add patterns to select (scalar_to_vector (loadf32)) as (V)MOVSSrm instead of COPY_TO_REGCLASS + (V)MOVSSrm_alt. 2019-07-02 17:51:02 +00:00
pr30511.ll
pr30562.ll
pr30813.ll
pr30821.mir [Alignment] Use llvm::Align in MachineFunction and TargetLowering - fixes mir parsing 2019-09-11 11:16:48 +00:00
pr31045.ll
pr31088.ll
pr31143.ll
pr31242.ll
pr31271.ll
pr31323.ll
pr31593.ll
pr31773.ll
pr31956.ll
pr32108.ll
pr32241.ll
pr32256.ll
pr32278.ll
pr32282.ll
pr32284.ll
pr32329.ll
pr32340.ll
pr32345.ll
pr32368.ll
pr32420.ll
pr32451.ll
pr32484.ll
pr32515.ll
pr32588.ll
pr32610.ll
pr32659.ll
pr32907.ll
pr33010.ll
pr33290.ll
pr33349.ll
pr33396.ll
pr33715.ll
pr33747.ll
pr33828.ll
pr33954.ll
pr33960.ll
pr34080-2.ll Set the floating point status register as reserved 2019-11-03 23:14:34 -08:00
pr34080.ll
pr34088.ll
pr34137.ll
pr34139.ll
pr34149.ll
pr34177.ll [LegalizeTypes][X86] When splitting a vselect for type legalization, don't split a setcc condition if the setcc input is legal and vXi1 conditions are supported 2019-10-06 18:43:03 +00:00
pr34271-1.ll
pr34271.ll
pr34292.ll
pr34381.ll
pr34397.ll
pr34421.ll
pr34592.ll
pr34605.ll
pr34629.ll
pr34634.ll
pr34653.ll
pr34657.ll
pr34855.ll
pr35272.ll
pr35316.ll
pr35399.ll
pr35443.ll
pr35636.ll
pr35761.ll
pr35763.ll
pr35765.ll
pr35918.ll Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default." 2019-08-07 16:24:26 +00:00
pr35972.ll
pr35982.ll
pr36199.ll
pr36274.ll
pr36312.ll
pr36553.ll
pr36602.ll
pr36865.ll
pr37063.ll [X86] Narrow i64 compares with constant to i32 when the upper 32-bits are known zero. 2019-10-29 11:38:15 -07:00
pr37264.ll
pr37359.ll
pr37499.ll
pr37820.ll
pr37826.ll
pr37879.ll
pr37916.ll Reland "b19ec1eb3d0c [BPI] Improve unreachable/ColdCall heurstics to handle loops." 2019-12-02 10:28:40 -08:00
pr38038.ll
pr38185.ll Revert [MBP] Disable aggressive loop rotate in plain mode 2019-08-29 19:03:58 +00:00
pr38217.ll
pr38533.ll
pr38539.ll
pr38639.ll
pr38738.ll
pr38743.ll This reverts r365061 and r365062 (test update) 2019-07-05 12:42:06 +00:00
pr38762.ll
pr38763.ll
pr38795.ll [MBP] Avoid tail duplication if it can't bring benefit 2019-12-06 09:53:53 -08:00
pr38803.ll [X86] Add VMOVSSZrrk/VMOVSDZrrk/VMOVSSZrrkz/VMOVSDZrrkz to getUndefRegClearance. 2019-09-26 22:56:06 +00:00
pr38819.ll
pr38865-2.ll
pr38865-3.ll
pr38865.ll
pr38952.mir [Alignment] Use llvm::Align in MachineFunction and TargetLowering - fixes mir parsing 2019-09-11 11:16:48 +00:00
pr39098.ll
pr39187-g.ll
pr39243.ll
pr39666.ll [ScalarizeMaskedMemIntrin] Bitcast the mask to the scalar domain and use scalar bit tests for the branches for expandload/compressstore. 2019-08-02 23:43:53 +00:00
pr39733.ll
pr39896.ll Rename ExpandISelPseudo->FinalizeISel, delay register reservation 2019-06-19 00:25:39 +00:00
pr39926.ll
pr40090.ll
pr40289-64bit.ll
pr40289.ll
pr40529.ll
pr40539.ll
pr40631_deadstore_elision.ll
pr40730.ll
pr40737.ll
pr40811.ll
pr40891.ll
pr40994.ll Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default." 2019-08-07 16:24:26 +00:00
pr41619.ll
pr41678.ll
pr41748.ll
pr42452.ll [X86] Improve the type checking fast-isel handling of vector bitcasts. 2019-07-01 07:09:34 +00:00
pr42565.ll [X86] Don't convert 8 or 16 bit ADDs to LEAs on Atom in FixupLEAPass. 2019-07-11 01:01:39 +00:00
pr42616.ll [X86] Remove offset of 8 from the call to FuseInst for UNPCKLPDrr folding added in r365287. 2019-07-14 04:13:33 +00:00
pr42727.ll [SelectionDAG] makeEquivalentMemoryOrdering - early out for equal chains (PR42727) 2019-07-24 16:53:14 +00:00
pr42870.ll [X86] Match the IR pattern form movmsk on SSE1 only targets where v4i32 isn't legal 2019-08-10 07:51:13 +00:00
pr42905.ll [X86] Add floating point execution domain to comi/ucomi/cvtss2si/cvtsd2si/cvttss2si/cvttsd2si/cvtsi2ss/cvtsi2sd instructions. 2019-11-30 11:26:28 -08:00
pr42909.ll [X86] Remove -x86-experimental-vector-widening-legalization command line option and all its uses. 2019-08-08 06:48:22 +00:00
pr42992.ll [X86] Manually reimplement getTargetInsertSubreg in X86DAGToDAGISel::matchBitExtract so we can call insertDAGNode on the target constant. 2019-08-16 04:47:44 +00:00
pr42998.ll [X86] Teach -Os immediate sharing code to not count constant uses that will become INC/DEC. 2019-08-25 05:22:40 +00:00
pr43157.ll [X86] Make inline assembly 'x' and 'v' constraints work for f128. 2019-08-29 05:13:56 +00:00
pr43507.ll [X86] Mask off upper bits of splat element in LowerBUILD_VECTORvXi1 when forming a SELECT. 2019-09-30 18:43:44 +00:00
pr43509.ll [X86] Add ANY_EXTEND to switch in ReplaceNodeResults, but just fall back to default handling. 2019-09-30 17:14:22 +00:00
pr43529.ll [X86] convertToThreeAddress, make sure second operand of SUB32ri is really an immediate before calling getImm(). 2019-10-01 21:55:55 +00:00
pr43575.ll [FastISel] Copy the inline assembly dialect to the INLINEASM instruction. 2019-10-05 23:21:17 +00:00
pr43820.ll [LegalizeTypes] When promoting BITREVERSE/BSWAP don't take the shift amount into account when determining the shift amount VT. 2019-10-27 12:20:35 -07:00
pr43866.ll [X86] Change the behavior of canWidenShuffleElements used by lowerV2X128Shuffle to match the behavior in lowerVectorShuffle with regards to zeroable elements. 2019-11-01 13:06:03 -07:00
pr43952.ll [X86] Handle MO_ConstantPoolIndex in X86AsmPrinter::PrintOperand 2019-11-09 18:01:26 -08:00
pr44140.ll [CriticalAntiDepBreaker] Teach the regmask clobber check to check if any subregister is preserved before considering the super register clobbered 2019-11-27 11:20:58 -08:00
pre-coalesce-2.ll
pre-coalesce.ll
pre-coalesce.mir [Alignment] Use llvm::Align in MachineFunction and TargetLowering - fixes mir parsing 2019-09-11 11:16:48 +00:00
pre-ra-sched.ll
prefer-avx256-lzcnt.ll
prefer-avx256-mask-extend.ll
prefer-avx256-mask-shuffle.ll [X86][AVX] Add SimplifyDemandedVectorElts support for KSHIFTL/KSHIFTR 2019-08-27 13:13:17 +00:00
prefer-avx256-popcnt.ll
prefer-avx256-shift.ll
prefer-avx256-trunc.ll
prefer-avx256-wide-mul.ll
prefetch.ll
prefixdata.ll
preserve_allcc64.ll
preserve_mostcc64.ll
private-2.ll
private.ll
probe-stack-x32.ll
prolog-push-seq.ll
prologepilog_deref_size.mir Describe stack-id as an enum 2019-06-17 09:13:29 +00:00
prologue-epilogue-remarks.mir
prologuedata.ll
promote-assert-zext.ll
promote-i16.ll
promote-trunc.ll
promote-vec3.ll [TargetLowering] Teach computeRegisterProperties to only widen v3i16/v3f16 vectors to the next power of 2 type if that's legal. 2019-08-18 06:28:06 +00:00
promote.ll Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default." 2019-08-07 16:24:26 +00:00
ps4-noreturn.ll
ps4-ssp-nop.ll
psadbw.ll [X86][SSE] Add test showing missing demanded elts PSADBW handling 2019-08-12 14:01:16 +00:00
pseudo_cmov_lower.ll
pseudo_cmov_lower1.ll
pseudo_cmov_lower2.ll
pshufb-mask-comments.ll
pshufd-combine-crash.ll
psubus.ll Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default." 2019-08-07 16:24:26 +00:00
ptest.ll
ptr-rotate.ll Regenerate ptr-rotate.ll . NFC 2019-10-07 14:10:21 +00:00
ptrtoint-constexpr.ll
ptrtoint-narrow.ll
ptwrite32-intrinsic.ll
ptwrite64-intrinsic.ll
pull-binop-through-shift.ll
pull-conditional-binop-through-shift.ll
push-cfi-debug.ll
push-cfi-obj.ll
push-cfi.ll
ragreedy-bug.ll
ragreedy-hoist-spill.ll [MBP] Avoid tail duplication if it can't bring benefit 2019-12-06 09:53:53 -08:00
ragreedy-last-chance-recoloring.ll
rd-mod-wr-eflags.ll
rdpid.ll
rdpmc.ll
rdrand-x86_64.ll
rdrand.ll
rdseed-x86_64.ll
rdseed.ll
rdtsc-upgrade.ll
rdtsc.ll
read-fp-no-frame-pointer.ll
recip-fastmath.ll [X86] combineFMA - Convert to use isNegatibleForFree/GetNegatedExpression. 2019-10-10 14:14:12 +00:00
recip-fastmath2.ll [X86] combineFMA - Convert to use isNegatibleForFree/GetNegatedExpression. 2019-10-10 14:14:12 +00:00
recip-pic.ll
red-zone.ll
red-zone2.ll
reduce-trunc-shl.ll
regalloc-advanced-split-cost.ll
regalloc-copy-hints.mir [Alignment] Use llvm::Align in MachineFunction and TargetLowering - fixes mir parsing 2019-09-11 11:16:48 +00:00
regalloc-fast-missing-live-out-spill.mir
regalloc-reconcile-broken-hints.ll
regalloc-spill-at-ehpad.ll
regcall-no-plt.ll
reghinting.ll
regparm.ll
regpressure.ll
relptr-rodata.ll IR: Teach Constant::needsRelocation() that relative pointers don't need to be relocated. 2019-07-18 20:56:21 +00:00
rem.ll [X86] Override BuildSDIVPow2 for X86. 2019-09-05 18:15:07 +00:00
rem_crash.ll
remarks-section.ll [Remarks] Remove references to ELF support 2019-10-28 12:50:46 -07:00
remat-constant.ll
remat-fold-load.ll
remat-mov-0.ll
remat-phys-dead.ll
remat-scalar-zero.ll
replace-load-and-with-bzhi.ll
replace_unsupported_masked_mem_intrin.ll
ret-addr.ll
ret-i64-0.ll
ret-mmx.ll Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default." 2019-08-07 16:24:26 +00:00
retpoline-external.ll
retpoline-regparm.ll
retpoline.ll
return-ext.ll
return_zeroext_i2.ll
returned-trunc-tail-calls.ll
reverse_branches.ll [MBP] Avoid tail duplication if it can't bring benefit 2019-12-06 09:53:53 -08:00
rip-rel-address.ll
rip-rel-lea.ll
rodata-relocs.ll
rot16.ll Add test for rotating truncated vectors. NFC 2019-10-08 13:08:51 +00:00
rot32.ll
rot64.ll
rotate-extract-vector.ll [DAGCombiner] Match (add X, X) as (shl X, 1) when detecting rotate. 2019-08-31 11:40:02 +00:00
rotate-extract.ll [DAGCombiner] Match (add X, X) as (shl X, 1) when detecting rotate. 2019-08-31 11:40:02 +00:00
rotate-multi.ll
rotate.ll
rotate2.ll
rotate4.ll
rotate_vec.ll
rounding-ops.ll
rrlist-livereg-corrutpion.ll
rtm.ll
sad.ll [X86] Teach X86MCInstLower to swap operands of commutable instructions to enable 2-byte VEX encoding. 2019-11-04 22:07:46 -08:00
sad_variations.ll
sadd_sat.ll [Codegen] Alter the default promotion for saturating adds and subs 2019-10-18 09:47:48 +00:00
sadd_sat_plus.ll [Codegen] Alter the default promotion for saturating adds and subs 2019-10-18 09:47:48 +00:00
sadd_sat_vec.ll Revert r373172 "[X86] Add custom isel logic to match VPTERNLOG from 2 logic ops." 2019-10-01 22:40:03 +00:00
saddo-redundant-add.ll [X86] Automatically generate various tests. NFC 2019-08-26 13:53:29 +00:00
safestack.ll
safestack_inline.ll
safestack_ssp.ll
sandybridge-loads.ll [x86] avoid vector load narrowing with extracted store uses (PR42305) 2019-06-19 18:13:47 +00:00
sar_fold.ll
sar_fold64.ll
sat-add.ll [TargetLowering] SimplifyMultipleUseDemandedBits - add VECTOR_SHUFFLE support. 2019-07-23 15:35:55 +00:00
sbb.ll
scalar-extract.ll
scalar-fp-to-i32.ll [X86] Don't use Expand for i32 fp_to_uint on SSE1/2 targets on 32-bit target. 2019-09-03 05:57:18 +00:00
scalar-fp-to-i64.ll [TargetLowering] Fix another potential FPE in expandFP_TO_UINT 2019-12-06 14:11:04 -08:00
scalar-int-to-fp.ll [X86] Check Subtarget.hasSSE3() before calling shouldUseHorizontalOp and emitting X86ISD::FHADD in LowerUINT_TO_FP_i64. 2019-10-20 23:54:19 +00:00
scalar-min-max-fill-operand.ll
scalar_sse_minmax.ll
scalar_widen_div.ll [X86] Use MOVSX by default instead of CBW to extend i8 to AX for i8 sdivrem. 2019-09-06 19:17:02 +00:00
scalarize-bitcast.ll
scalarize-fp.ll [DAGCombiner] add one-use restriction to vector transform with cheap extract 2019-09-25 15:08:33 +00:00
scatter-schedule.ll
scavenger.mir
scev-interchange.ll
scheduler-backtracking.ll
sdiv-exact.ll [X86] Allow execution domain fixing to turn SHUFPD into SHUFPS. 2019-07-08 06:52:49 +00:00
sdiv-pow2.ll
section_mergeable_size.ll
segmented-stacks-dynamic.ll
segmented-stacks-standalone.ll
segmented-stacks.ll [X86] for split stack, not save/restore nested arg if unused 2019-07-19 12:54:44 +00:00
seh-catch-all-win32.ll
seh-catch-all.ll
seh-catchpad.ll [X86] Print register names in .seh_* directives 2019-08-30 21:23:05 +00:00
seh-except-finally.ll
seh-exception-code.ll
seh-filter-no-personality.ll
seh-finally.ll
seh-localaddress.ll
seh-no-invokes.ll
seh-safe-div-win32.ll
seh-safe-div.ll
seh-stack-realign.ll
select-1-or-neg1.ll [X86] Support LEA64_32r in processInstrForSlow3OpLEA and use INC/DEC when possible. 2019-10-07 06:27:55 +00:00
select-mmx.ll
select-of-fp-constants.ll [X86] Add CodeGenOnly instructions for (f32 (X86selects $mask, (loadf32 addr), fp32imm0) to use masked MOVSS from memory. 2019-09-26 22:23:09 +00:00
select-sra.ll [DAGCombiner] fold select-of-constants based on sign-bit test 2019-10-15 15:23:57 +00:00
select-with-and-or.ll
select.ll Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default." 2019-08-07 16:24:26 +00:00
select_const.ll
select_meta.ll
selectcc-to-shiftand.ll [DAGCombiner] fold vselect-of-constants to shift 2019-10-11 14:17:56 +00:00
selectiondag-crash.ll
selectiondag-cse.ll
selectiondag-debug-loc.ll
selectiondag-dominator.ll
selectiondag-order.ll
setcc-combine.ll
setcc-logic.ll
setcc-lowering.ll [TargetLowering] SimplifyDemandedBits - legal checks for SIGN/ZERO_EXTEND -> ZERO/ANY_EXTEND 2019-06-25 10:51:15 +00:00
setcc-narrowing.ll
setcc-wide-types.ll [X86] Prefer KORTEST on Knights Landing or later for memcmp() 2019-10-26 21:14:57 +03:00
setcc.ll [x86] add test for setcc to shift transform; NFC 2019-10-17 19:32:24 +00:00
setjmp-spills.ll
setoeq.ll
setuge.ll
sext-i1.ll
sext-load.ll
sext-ret-val.ll
sext-setcc-self.ll
sext-subreg.ll
sext-trunc.ll
sha.ll
shadow-stack.ll [MBP] Avoid tail duplication if it can't bring benefit 2019-12-06 09:53:53 -08:00
shift-amount-mod.ll [DAGCombine][X86][AArch64][MIPS][LANAI] (C - x) - y -> C - (x + y) fold (PR41952) 2019-06-04 11:06:21 +00:00
shift-and-x86_64.ll
shift-and.ll
shift-avx2-crash.ll [X86] Automatically generate shift tests. NFC 2019-08-20 23:47:19 +00:00
shift-bmi2.ll
shift-by-signext.ll [DAGCombine][X86][AArch64][NFC] Add tests for shift-by-signext 2019-09-26 20:49:49 +00:00
shift-coalesce.ll [X86] Automatically generate shift tests. NFC 2019-08-20 23:47:19 +00:00
shift-codegen.ll
shift-combine-crash.ll [X86] Automatically generate shift tests. NFC 2019-08-20 23:47:19 +00:00
shift-combine.ll Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default." 2019-08-07 16:24:26 +00:00
shift-double-x86_64.ll
shift-double.ll
shift-folding.ll
shift-i128.ll Reland [MachineCopyPropagation] Extend MCP to do trivial copy backward propagation. 2019-12-05 14:32:11 +08:00
shift-i256.ll
shift-logic.ll [DAGCombiner] improve throughput of shift+logic+shift 2019-09-01 18:38:15 +00:00
shift-mask.ll
shift-one.ll [X86] Automatically generate shift tests. NFC 2019-08-20 23:47:19 +00:00
shift-pair.ll
shift-parts.ll [X86] Automatically generate shift tests. NFC 2019-08-20 23:47:19 +00:00
shift-pcmp.ll
shift_minsize.ll [SelectionDAG] Don't generate libcalls for wide shifts on Windows (PR42711) 2019-08-28 13:55:10 +00:00
shl-anyext.ll
shl-crash-on-legalize.ll
shl-i64.ll
shl_elim.ll [X86] Automatically generate various tests. NFC 2019-08-26 13:53:29 +00:00
shl_undef.ll
shrink-compare.ll
shrink-fp-const1.ll
shrink-fp-const2.ll
shrink-wrap-chkstk-x86_64.ll [FIX] Forces shrink wrapping to consider any memory access as aliasing with the stack 2019-06-13 13:56:19 +00:00
shrink-wrap-chkstk.ll
shrink-wrapping-vla.ll
shrink_vmul.ll [X86] SimplifyDemandedVectorElts - attempt to recombine target shuffle using DemandedElts mask (REAPPLIED) 2019-11-04 11:37:57 +00:00
shrink_vmul_sse.ll
shrink_wrap_dbg_value.mir [Alignment] Use llvm::Align in MachineFunction and TargetLowering - fixes mir parsing 2019-09-11 11:16:48 +00:00
shrinkwrap-hang.ll
shuffle-combine-crash-2.ll
shuffle-combine-crash.ll [X86] Automatically generate various tests. NFC 2019-08-26 13:53:29 +00:00
shuffle-extract-subvector.ll
shuffle-of-insert.ll
shuffle-of-splat-multiuses.ll
shuffle-strided-with-offset-128.ll Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default." 2019-08-07 16:24:26 +00:00
shuffle-strided-with-offset-256.ll Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default." 2019-08-07 16:24:26 +00:00
shuffle-strided-with-offset-512.ll Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default." 2019-08-07 16:24:26 +00:00
shuffle-vs-trunc-128.ll Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default." 2019-08-07 16:24:26 +00:00
shuffle-vs-trunc-256.ll Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default." 2019-08-07 16:24:26 +00:00
shuffle-vs-trunc-512.ll [X86] Add v32i8 shuffle lowering strategy to recognize two v4i64 vectors truncated to v4i8 and concatenated into the lower 8 bytes with undef/zero upper bytes. 2019-10-03 18:34:42 +00:00
sibcall-2.ll
sibcall-3.ll
sibcall-4.ll
sibcall-5.ll
sibcall-6.ll
sibcall-byval.ll
sibcall-win64.ll
sibcall.ll [Peephole] Allow folding loads into instructions w/multiple uses (such as test64rr) 2019-06-25 17:29:18 +00:00
signbit-shift.ll
signed-truncation-check.ll
simple-register-allocation-read-undef.mir
simple-zext.ll
sincos-opt.ll [TargetLowering][PS4] Add sincos(f) lib functions when target is PS4 2019-09-02 16:53:32 +00:00
sincos.ll
sink-addsub-of-const.ll [DAGCombine][X86][AArch64][MIPS][LANAI] (C - x) - y -> C - (x + y) fold (PR41952) 2019-06-04 11:06:21 +00:00
sink-blockfreq.ll
sink-cheap-instructions.ll
sink-gep-before-mem-inst.ll
sink-hoist.ll
sink-local-value.ll
sink-out-of-loop.ll
sitofp.ll
sjlj-baseptr.ll
sjlj-eh.ll
sjlj-shadow-stack-liveness.mir [Alignment] Use llvm::Align in MachineFunction and TargetLowering - fixes mir parsing 2019-09-11 11:16:48 +00:00
sjlj.ll
slow-incdec.ll
slow-pmulld.ll Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default." 2019-08-07 16:24:26 +00:00
slow-unaligned-mem.ll
small-byval-memcpy.ll
smul-with-overflow.ll
smul_fix.ll [CodeGen] Use FSHR in DAGTypeLegalizer::ExpandIntRes_MULFIX 2019-09-03 19:35:07 +00:00
smul_fix_sat.ll [CodeGen] Use FSHR in DAGTypeLegalizer::ExpandIntRes_MULFIX 2019-09-03 19:35:07 +00:00
smul_fix_sat_constants.ll [X86] Remove redundant ';' chars ending IR lines in lit tests. NFC 2019-08-11 19:27:14 +00:00
soft-fp-legal-in-HW-reg.ll
soft-fp.ll [X86] Change legalization action for f128 fadd/fsub/fmul/fdiv from Custom to LibCall. 2019-11-21 11:44:29 -08:00
soft-sitofp.ll
speculative-load-hardening-call-and-ret.ll
speculative-load-hardening-gather.ll
speculative-load-hardening-indirect.ll
speculative-load-hardening.ll [MBP] Avoid tail duplication if it can't bring benefit 2019-12-06 09:53:53 -08:00
splat-const.ll
splat-for-size.ll
split-eh-lpad-edges.ll
split-extend-vector-inreg.ll
split-store.ll
split-vector-bitcast.ll
split-vector-rem.ll
sqrt-fastmath-mir.ll Rename ExpandISelPseudo->FinalizeISel, delay register reservation 2019-06-19 00:25:39 +00:00
sqrt-fastmath-tune.ll
sqrt-fastmath.ll [X86] Add VMOVSSZrrk/VMOVSDZrrk/VMOVSSZrrkz/VMOVSDZrrkz to getUndefRegClearance. 2019-09-26 22:56:06 +00:00
sqrt-partial.ll [X86] Add floating point execution domain to comi/ucomi/cvtss2si/cvtsd2si/cvttss2si/cvttsd2si/cvtsi2ss/cvtsi2sd instructions. 2019-11-30 11:26:28 -08:00
sqrt.ll [X86] Automatically generate various tests. NFC 2019-08-26 13:53:29 +00:00
srem-lkk.ll [SelectionDAG] Add tests for LKK algorithm 2019-10-05 14:29:25 +00:00
srem-seteq-optsize.ll [CodeGen][SelectionDAG] More efficient code for X % C == 0 (SREM case) 2019-08-13 14:57:37 +00:00
srem-seteq-vec-nonsplat.ll [TargetLowering] x s% C == 0 fold: vector divisor with INT_MIN handling 2019-08-19 15:01:42 +00:00
srem-seteq-vec-splat.ll [CodeGen][SelectionDAG] More efficient code for X % C == 0 (SREM case) 2019-08-13 14:57:37 +00:00
srem-seteq.ll [X86] Override BuildSDIVPow2 for X86. 2019-09-05 18:15:07 +00:00
srem-vector-lkk.ll [SelectionDAG] Add tests for LKK algorithm 2019-10-05 14:29:25 +00:00
sret-implicit.ll
sse-align-0.ll
sse-align-1.ll
sse-align-2.ll
sse-align-3.ll
sse-align-4.ll
sse-align-5.ll
sse-align-6.ll
sse-align-7.ll
sse-align-8.ll
sse-align-9.ll
sse-align-10.ll
sse-align-11.ll
sse-align-12.ll [X86] Allow execution domain fixing to turn SHUFPD into SHUFPS. 2019-07-08 06:52:49 +00:00
sse-commute.ll
sse-cvttp2si.ll
sse-domains.ll
sse-fcopysign.ll [X86] Add patterns to select (scalar_to_vector (loadf32)) as (V)MOVSSrm instead of COPY_TO_REGCLASS + (V)MOVSSrm_alt. 2019-07-02 17:51:02 +00:00
sse-fsignum.ll
sse-intel-ocl.ll
sse-intrinsics-fast-isel-x86_64.ll
sse-intrinsics-fast-isel.ll [X86] Separate the memory size of vzext_load/vextract_store from the element size of the result type. Use them improve the codegen of v2f32 loads/stores with sse1 only. 2019-07-15 02:02:31 +00:00
sse-intrinsics-x86-upgrade.ll
sse-intrinsics-x86.ll
sse-intrinsics-x86_64-upgrade.ll
sse-intrinsics-x86_64.ll
sse-load-ret.ll
sse-minmax.ll [X86] Specifically limit fmin/fmax commutativity to NoNaNs + NoSignedZeros 2019-11-05 19:34:06 +01:00
sse-only.ll [X86] Add PS<->PD domain changing support for MOVH/MOVL load instructions and MOVH store instructions. 2019-07-06 17:59:57 +00:00
sse-regcall.ll
sse-scalar-fp-arith-unary.ll
sse-scalar-fp-arith.ll [X86] Add load folding isel patterns to scalar_math_patterns and AVX512_scalar_math_fp_patterns. 2019-06-11 04:30:53 +00:00
sse-unaligned-mem-feature.ll
sse-varargs.ll
sse1-fcopysign.ll
sse1.ll
sse2-intrinsics-canonical.ll Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default." 2019-08-07 16:24:26 +00:00
sse2-intrinsics-fast-isel-x86_64.ll
sse2-intrinsics-fast-isel.ll [X86] Allow execution domain fixing to turn SHUFPD into SHUFPS. 2019-07-08 06:52:49 +00:00
sse2-intrinsics-x86-upgrade.ll
sse2-intrinsics-x86.ll
sse2-intrinsics-x86_64-upgrade.ll
sse2-intrinsics-x86_64.ll
sse2-vector-shifts.ll Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default." 2019-08-07 16:24:26 +00:00
sse2.ll [X86] Make movsd commutable to shufpd with a 0x02 immediate on pre-SSE4.1 targets. 2019-07-08 06:52:43 +00:00
sse3-avx-addsub-2.ll
sse3-avx-addsub.ll
sse3-intrinsics-fast-isel.ll
sse3-intrinsics-x86.ll
sse3.ll [X86] Add PS<->PD domain changing support for MOVH/MOVL load instructions and MOVH store instructions. 2019-07-06 17:59:57 +00:00
sse4a-intrinsics-fast-isel.ll
sse4a-upgrade.ll
sse4a.ll
sse41-intrinsics-fast-isel.ll
sse41-intrinsics-x86-upgrade.ll
sse41-intrinsics-x86.ll
sse41-pmovxrm.ll
sse41.ll [X86] Add a DAG combine to combine INSERTPS and VBROADCAST of a scalar load. Remove corresponding isel patterns. 2019-08-29 05:48:48 +00:00
sse42-intrinsics-fast-isel-x86_64.ll
sse42-intrinsics-fast-isel.ll
sse42-intrinsics-x86.ll
sse42-intrinsics-x86_64.ll
sse_partial_update.ll
sse_reload_fold.ll
ssp-data-layout.ll
ssp-guard-spill.ll
ssse3-intrinsics-fast-isel.ll
ssse3-intrinsics-x86.ll
ssub_sat.ll [Codegen] Alter the default promotion for saturating adds and subs 2019-10-18 09:47:48 +00:00
ssub_sat_plus.ll [Codegen] Alter the default promotion for saturating adds and subs 2019-10-18 09:47:48 +00:00
ssub_sat_vec.ll [X86] Teach EmitTest to handle ISD::SSUBO/USUBO in order to use the Z flag from the subtract directly during isel. 2019-10-14 06:47:56 +00:00
stack-align-memcpy.ll
stack-align.ll
stack-align2.ll
stack-folding-3dnow.ll [X86] Automatically generate stack folding tests. NFC 2019-08-25 20:48:14 +00:00
stack-folding-adx-x86_64.ll [X86] Automatically generate stack folding tests. NFC 2019-08-25 20:48:14 +00:00
stack-folding-adx.mir [Alignment] Use llvm::Align in MachineFunction and TargetLowering - fixes mir parsing 2019-09-11 11:16:48 +00:00
stack-folding-avx512bf16.ll [X86] Automatically generate stack folding tests. NFC 2019-08-25 20:48:14 +00:00
stack-folding-avx512vp2intersect.ll [X86] Automatically generate stack folding tests. NFC 2019-08-25 20:48:14 +00:00
stack-folding-bmi.ll [X86] Automatically generate stack folding tests. NFC 2019-08-25 20:48:14 +00:00
stack-folding-bmi2.ll [X86] Automatically generate stack folding tests. NFC 2019-08-25 20:48:14 +00:00
stack-folding-bmi2.mir [Alignment] Use llvm::Align in MachineFunction and TargetLowering - fixes mir parsing 2019-09-11 11:16:48 +00:00
stack-folding-fp-avx1.ll [BreakFalseDeps] ignore function with minsize attribute 2019-09-23 17:01:01 +00:00
stack-folding-fp-avx512.ll [X86] Specifically limit fmin/fmax commutativity to NoNaNs + NoSignedZeros 2019-11-05 19:34:06 +01:00
stack-folding-fp-avx512vl.ll [X86] Automatically generate stack folding tests. NFC 2019-08-25 20:48:14 +00:00
stack-folding-fp-sse42.ll [BreakFalseDeps] ignore function with minsize attribute 2019-09-23 17:01:01 +00:00
stack-folding-int-avx1.ll [X86][CodeGen][NFC] Delay `combineIncDecVector()` from DAGCombine to X86DAGToDAGISel 2019-08-29 10:50:09 +00:00
stack-folding-int-avx2.ll [X86] Automatically generate stack folding tests. NFC 2019-08-25 20:48:14 +00:00
stack-folding-int-avx512.ll [X86] Mark the EVEX encoded PSADBW instructions as commutable to enable load folding of the other operand. 2019-09-26 04:42:58 +00:00
stack-folding-int-avx512vl.ll [X86] Mark the EVEX encoded PSADBW instructions as commutable to enable load folding of the other operand. 2019-09-26 04:42:58 +00:00
stack-folding-int-avx512vnni.ll [X86] Add proper execution domain information to the avx512vnni instructions. 2019-11-25 17:07:35 -08:00
stack-folding-int-sse42.ll [X86][CodeGen][NFC] Delay `combineIncDecVector()` from DAGCombine to X86DAGToDAGISel 2019-08-29 10:50:09 +00:00
stack-folding-lwp.ll [X86] Automatically generate stack folding tests. NFC 2019-08-25 20:48:14 +00:00
stack-folding-mmx.ll [X86] Add MMX MOVD/MOVQ stores to folding tables to support stack folding 2019-09-24 16:15:32 +00:00
stack-folding-sha.ll [X86] Automatically generate stack folding tests. NFC 2019-08-25 20:48:14 +00:00
stack-folding-tbm.ll [X86] Automatically generate stack folding tests. NFC 2019-08-25 20:48:14 +00:00
stack-folding-x86_64.ll [X86] Automatically generate stack folding tests. NFC 2019-08-25 20:48:14 +00:00
stack-folding-xop.ll [X86] Automatically generate stack folding tests. NFC 2019-08-25 20:48:14 +00:00
stack-probe-red-zone.ll
stack-probe-size.ll
stack-probes.ll
stack-protector-2.ll [SSP] [3/3] cmpxchg and addrspacecast instructions can now 2019-09-30 15:11:23 +00:00
stack-protector-dbginfo.ll
stack-protector-msvc.ll
stack-protector-remarks.ll
stack-protector-strong-macho-win32-xor.ll [X86] Fix prolog/epilog mismatch for stack protectors on win32-macho. 2019-12-06 14:44:56 -08:00
stack-protector-target.ll
stack-protector-vreg-to-vreg-copy.ll
stack-protector-weight.ll Rename ExpandISelPseudo->FinalizeISel, delay register reservation 2019-06-19 00:25:39 +00:00
stack-protector.ll [SSP] [1/3] Revert "StackProtector: Use PointerMayBeCaptured" 2019-09-30 15:01:35 +00:00
stack-size-section-function-sections.ll
stack-size-section.ll
stack-update-frame-opcode.ll
stack_guard_remat.ll
stackguard-internal.ll
stackmap-fast-isel.ll
stackmap-frame-setup.ll
stackmap-large-constants.ll
stackmap-large-location-size.ll
stackmap-liveness.ll
stackmap-nops.ll
stackmap-shadow-optimization.ll
stackmap.ll
stackpointer.ll
statepoint-allocas.ll
statepoint-call-lowering.ll
statepoint-far-call.ll
statepoint-forward.ll
statepoint-gctransition-call-lowering.ll
statepoint-invoke.ll
statepoint-live-in.ll
statepoint-no-realign-stack.ll [Statepoints] Fix overalignment of loads in no-realign-stack functions 2019-08-02 20:17:37 +00:00
statepoint-stack-usage.ll
statepoint-stackmap-format.ll
statepoint-uniqueing.ll
statepoint-vector-bad-spill.ll
statepoint-vector.ll
stdarg.ll
stdcall-notailcall.ll
stdcall.ll
store-empty-member.ll
store-fp-constant.ll
store-global-address.ll
store-narrow.ll [X86] Automatically generate various tests. NFC 2019-08-26 13:53:29 +00:00
store-zero-and-minus-one.ll
store_op_load_fold.ll
store_op_load_fold2.ll
stores-merging.ll
storetrunc-fp.ll
stride-nine-with-base-reg.ll
stride-reuse.ll
sttni.ll
sub-of-not.ll [Codegen][X86][AArch64][ARM][PowerPC] Inc-of-add vs sub-of-not (PR42457) 2019-07-03 09:41:35 +00:00
sub-with-overflow.ll
sub.ll
subcarry.ll [SelectionDAG] Combine U{ADD,SUB}O diamonds into {ADD,SUB}CARRY 2019-11-20 16:25:42 +02:00
subreg-to-reg-0.ll
subreg-to-reg-1.ll
subreg-to-reg-2.ll
subreg-to-reg-3.ll
subreg-to-reg-4.ll
subreg-to-reg-6.ll
subvector-broadcast.ll [X86] Pass v32i16/v64i8 in zmm registers on KNL target. 2019-08-30 17:35:08 +00:00
sunkaddr-ext.ll
swap.ll
swift-error.ll
swift-return.ll
swiftcc.ll
swifterror.ll [MBP] Move a latch block with conditional exit and multi predecessors to top of loop 2019-06-14 23:08:59 +00:00
swiftself.ll [FastISel] Skip creating unnecessary vregs for arguments 2019-06-10 16:53:37 +00:00
switch-bt.ll Reapply r373431 "Switch lowering: omit range check for bit tests when default is unreachable (PR43129)" 2019-10-02 14:35:06 +00:00
switch-crit-edge-constant.ll
switch-default-only.ll
switch-density.ll
switch-edge-weight.ll Rename ExpandISelPseudo->FinalizeISel, delay register reservation 2019-06-19 00:25:39 +00:00
switch-jump-table.ll Rename ExpandISelPseudo->FinalizeISel, delay register reservation 2019-06-19 00:25:39 +00:00
switch-lower-peel-top-case.ll Rename ExpandISelPseudo->FinalizeISel, delay register reservation 2019-06-19 00:25:39 +00:00
switch-or.ll
switch-order-weight.ll
switch-zextload.ll
switch.ll [test] Change comment wording (NFC) 2019-06-18 23:31:10 +00:00
swizzle-2.ll [X86] Allow execution domain fixing to turn SHUFPD into SHUFPS. 2019-07-08 06:52:49 +00:00
swizzle-avx2.ll
system-intrinsics-64-xsave.ll
system-intrinsics-64-xsavec.ll
system-intrinsics-64-xsaveopt.ll
system-intrinsics-64-xsaves.ll
system-intrinsics-64.ll
system-intrinsics-xgetbv.ll
system-intrinsics-xsave.ll
system-intrinsics-xsavec.ll
system-intrinsics-xsaveopt.ll
system-intrinsics-xsaves.ll
system-intrinsics-xsetbv.ll
system-intrinsics.ll
tail-call-attrs.ll
tail-call-casts.ll
tail-call-conditional.mir
tail-call-deref.ll [Analysis] Attribute deref/deref_or_null should not prevent tail call optimization 2019-11-06 23:08:07 +01:00
tail-call-got.ll
tail-call-legality.ll
tail-call-mutable-memarg.ll
tail-call-parameter-attrs-mismatch.ll
tail-call-win64.ll
tail-dup-addr.ll
tail-dup-catchret.ll
tail-dup-debugloc.ll
tail-dup-merge-loop-headers.ll [MBP] Avoid tail duplication if it can't bring benefit 2019-12-06 09:53:53 -08:00
tail-dup-no-other-successor.ll
tail-dup-repeat.ll [MBP] Avoid tail duplication if it can't bring benefit 2019-12-06 09:53:53 -08:00
tail-merge-after-mbp.mir [MBP] Avoid tail duplication if it can't bring benefit 2019-12-06 09:53:53 -08:00
tail-merge-debugloc.ll
tail-merge-identical.ll
tail-merge-unreachable.ll
tail-merge-wineh.ll
tail-opts.ll [MBP] Avoid tail duplication if it can't bring benefit 2019-12-06 09:53:53 -08:00
tail-threshold.ll [Codegen] Merge tail blocks with no successors after block placement 2019-06-13 18:11:32 +00:00
tailcall-64.ll
tailcall-assume.ll [CodeGen/Analysis] Intrinsic llvm.assume should not block tail call optimization 2019-08-16 16:26:12 +00:00
tailcall-calleesave.ll
tailcall-cgp-dup.ll
tailcall-disable.ll
tailcall-fastisel.ll
tailcall-largecode.ll
tailcall-lifetime-end.ll
tailcall-mem-intrinsics.ll
tailcall-msvc-conventions.ll
tailcall-multiret.ll
tailcall-pseudo-64.mir
tailcall-pseudo.mir
tailcall-readnone.ll
tailcall-returndup-void.ll
tailcall-ri64.ll
tailcall-stackalign.ll
tailcall-structret.ll
tailcall-tailcc.ll [X86] Add new calling convention that guarantees tail call optimization 2019-10-07 22:28:58 +00:00
tailcall.ll
tailcallbyval.ll
tailcallbyval64.ll
tailcallfp.ll
tailcallfp2.ll
tailcallpic1.ll
tailcallpic2.ll
tailcallpic3.ll
tailcallstack64.ll
tailcc-calleesave.ll [X86] Add new calling convention that guarantees tail call optimization 2019-10-07 22:28:58 +00:00
tailcc-disable-tail-calls.ll [X86] Add new calling convention that guarantees tail call optimization 2019-10-07 22:28:58 +00:00
tailcc-fastcc.ll [X86] Add new calling convention that guarantees tail call optimization 2019-10-07 22:28:58 +00:00
tailcc-fastisel.ll [X86] Add new calling convention that guarantees tail call optimization 2019-10-07 22:28:58 +00:00
tailcc-largecode.ll [X86] Add new calling convention that guarantees tail call optimization 2019-10-07 22:28:58 +00:00
tailcc-stackalign.ll [X86] Add new calling convention that guarantees tail call optimization 2019-10-07 22:28:58 +00:00
tailcc-structret.ll [X86] Add new calling convention that guarantees tail call optimization 2019-10-07 22:28:58 +00:00
tailccbyval.ll [X86] Add new calling convention that guarantees tail call optimization 2019-10-07 22:28:58 +00:00
tailccbyval64.ll [X86] Add new calling convention that guarantees tail call optimization 2019-10-07 22:28:58 +00:00
tailccfp.ll [X86] Add new calling convention that guarantees tail call optimization 2019-10-07 22:28:58 +00:00
tailccfp2.ll [X86] Add new calling convention that guarantees tail call optimization 2019-10-07 22:28:58 +00:00
tailccpic1.ll [X86] Add new calling convention that guarantees tail call optimization 2019-10-07 22:28:58 +00:00
tailccpic2.ll [X86] Add new calling convention that guarantees tail call optimization 2019-10-07 22:28:58 +00:00
tailccstack64.ll [X86] Add new calling convention that guarantees tail call optimization 2019-10-07 22:28:58 +00:00
taildup-crash.ll
taildup-heapallocsite.ll Recommit "Add a heap alloc site marker field to the ExtraInfo in MachineInstrs" 2019-10-28 16:59:32 -07:00
tailjmp_gotpcrel_relax_relocation.ll
targetLoweringGeneric.ll
tbm-intrinsics-fast-isel-x86_64.ll [X86] Teach convertToThreeAddress to handle SUB with immediate 2019-07-15 23:07:56 +00:00
tbm-intrinsics-fast-isel.ll [X86] Teach convertToThreeAddress to handle SUB with immediate 2019-07-15 23:07:56 +00:00
tbm-intrinsics-x86_64.ll
tbm-intrinsics.ll
tbm_patterns.ll [X86] Add patterns with and_flag_nocf for BLSI and TBM instructions. 2019-07-10 22:44:32 +00:00
test-nofold.ll
test-shrink-bug.ll Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default." 2019-08-07 16:24:26 +00:00
test-shrink.ll
test-vs-bittest.ll [DAGCombiner] try to form test+set out of shift+mask patterns 2019-09-02 14:52:09 +00:00
test_x86condbr_globaladdr.mir
testb-je-fusion.ll
testl-commute.ll
this-return-64.ll
throws-cfi-fp.ll
throws-cfi-no-fp.ll
tls-addr-non-leaf-function.ll
tls-android-negative.ll
tls-android.ll
tls-local-dynamic.ll
tls-models.ll
tls-no-plt.ll [X86] -fno-plt: use GOT __tls_get_addr only if GOTPCRELX is enabled 2019-07-11 10:10:09 +00:00
tls-pic.ll
tls-pie.ll
tls-shrink-wrapping.ll
tls-windows-itanium.ll
tls.ll
tlv-1.ll
tlv-2.ll
tlv-3.ll
token_landingpad.ll
trap.ll [Windows] Replace TrapUnreachable with an int3 insertion pass 2019-09-09 23:04:25 +00:00
tree_way_unsigned_cmp.ll [NFC] Added test from PR19758 2019-06-09 15:12:46 +00:00
trunc-and.ll [DAGCombiner][x86] prevent infinite loop from truncate/extend transforms 2019-08-05 11:27:07 +00:00
trunc-ext-ld-st.ll Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default." 2019-08-07 16:24:26 +00:00
trunc-store.ll
trunc-subvector.ll Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default." 2019-08-07 16:24:26 +00:00
trunc-to-bool.ll
twoaddr-coalesce-2.ll
twoaddr-coalesce-3.ll [X86] Pre-commit test cases and test run line changes for D67087 2019-09-04 17:33:38 +00:00
twoaddr-coalesce.ll
twoaddr-dbg-value.mir
twoaddr-lea.ll
twoaddr-pass-sink.ll
twoaddr-sink-terminator.ll
typeid-alias.ll CodeGen: Don't follow aliases when extracting type info. 2019-08-02 17:43:45 +00:00
uadd_sat.ll [Codegen] Alter the default promotion for saturating adds and subs 2019-10-18 09:47:48 +00:00
uadd_sat_plus.ll [Codegen] Alter the default promotion for saturating adds and subs 2019-10-18 09:47:48 +00:00
uadd_sat_vec.ll [X86] Teach X86MCInstLower to swap operands of commutable instructions to enable 2-byte VEX encoding. 2019-11-04 22:07:46 -08:00
uint64-to-float.ll
uint_to_fp-2.ll
uint_to_fp-3.ll
uint_to_fp.ll
umul-with-carry.ll
umul-with-overflow.ll
umul_fix.ll [CodeGen] Use FSHR in DAGTypeLegalizer::ExpandIntRes_MULFIX 2019-09-03 19:35:07 +00:00
umul_fix_sat.ll [Intrinsic] Add the llvm.umul.fix.sat intrinsic 2019-09-07 12:16:14 +00:00
umulo-64-legalisation-lowering.ll
umulo-128-legalisation-lowering.ll Reland [MachineCopyPropagation] Extend MCP to do trivial copy backward propagation. 2019-12-05 14:32:11 +08:00
unaligned-32-byte-memops.ll
unaligned-load.ll
unaligned-spill-folding.ll
undef-eflags.mir
undef-globals-bss.ll
undef-label.ll [X86] Add floating point execution domain to comi/ucomi/cvtss2si/cvtsd2si/cvttss2si/cvttsd2si/cvtsi2ss/cvtsi2sd instructions. 2019-11-30 11:26:28 -08:00
undef-ops.ll
unfold-masked-merge-scalar-constmask-innerouter.ll
unfold-masked-merge-scalar-constmask-interleavedbits.ll
unfold-masked-merge-scalar-constmask-interleavedbytehalves.ll
unfold-masked-merge-scalar-constmask-lowhigh.ll
unfold-masked-merge-scalar-variablemask.ll
unfold-masked-merge-vector-variablemask-const.ll
unfold-masked-merge-vector-variablemask.ll Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default." 2019-08-07 16:24:26 +00:00
unknown-location.ll
unreachable-loop-sinking.ll
unreachable-mbb-undef-phi.mir
unreachable-trap.ll [Windows] Replace TrapUnreachable with an int3 insertion pass 2019-09-09 23:04:25 +00:00
unreachableblockelim.ll
unused_stackslots.ll
unwind-init.ll
unwindraise.ll
update-terminator-debugloc.ll
update-terminator.mir
urem-i8-constant.ll
urem-lkk.ll [SelectionDAG] Add tests for LKK algorithm 2019-10-05 14:29:25 +00:00
urem-power-of-two.ll [X86] Use MOVZX16rr8/MOVZXrm8 when extending input for i8 udivrem. 2019-09-06 19:15:04 +00:00
urem-seteq-nonzero.ll [Codegen] TargetLowering::prepareUREMEqFold(): `x u% C1 ==/!= C2` (PR35479) 2019-11-22 15:22:42 +03:00
urem-seteq-optsize.ll [CodeGen] [SelectionDAG] More efficient code for X % C == 0 (UREM case) (try 3) 2019-06-27 21:52:10 +00:00
urem-seteq-vec-nonsplat.ll [TargetLowering] SimplifyDemandedBits - call SimplifyMultipleUseDemandedBits for ISD::VECTOR_SHUFFLE 2019-08-07 11:43:13 +00:00
urem-seteq-vec-nonzero.ll [Codegen] TargetLowering::prepareUREMEqFold(): `x u% C1 ==/!= C2` (PR35479) 2019-11-22 15:22:42 +03:00
urem-seteq-vec-splat.ll [NFC][X86][AArch64] Revisit test coverage for X s% C == 0 fold - add tests for negative divisors, INT_MIN divisors 2019-07-30 08:00:49 +00:00
urem-seteq-vec-tautological.ll [Codegen] TargetLowering::prepareUREMEqFold(): `x u% C1 ==/!= C2` with tautological C1 u<= C2 (PR35479) 2019-11-22 15:16:03 +03:00
urem-seteq.ll [NFC][X86][AArch64] Revisit test coverage for X s% C == 0 fold - add tests for negative divisors, INT_MIN divisors 2019-07-30 08:00:49 +00:00
urem-vector-lkk.ll [SelectionDAG] Add tests for LKK algorithm 2019-10-05 14:29:25 +00:00
use-add-flags.ll
use-cr-result-of-dom-icmp-st.ll [CGP] Make ICMP_EQ use CR result of ICMP_S(L|G)T dominators 2019-11-11 17:28:50 +00:00
usub_sat.ll [Codegen] Alter the default promotion for saturating adds and subs 2019-10-18 09:47:48 +00:00
usub_sat_plus.ll [Codegen] Alter the default promotion for saturating adds and subs 2019-10-18 09:47:48 +00:00
usub_sat_vec.ll Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default." 2019-08-07 16:24:26 +00:00
utf8.ll
utf16-cfstrings.ll
uwtables.ll
v2f32.ll
v4f32-immediate.ll
v4i32load-crash.ll
v8i1-masks.ll
vaargs.ll
vaes-intrinsics-avx-x86.ll
vaes-intrinsics-avx512-x86.ll
vaes-intrinsics-avx512vl-x86.ll
var-permute-128.ll [X86] Add PS<->PD domain changing support for MOVH/MOVL load instructions and MOVH store instructions. 2019-07-06 17:59:57 +00:00
var-permute-256.ll [X86][SSE] Fold extract_subvector(vselect(x,y,z),0) -> vselect(extract_subvector(x,0),extract_subvector(y,0),extract_subvector(z,0)) 2019-06-22 17:57:01 +00:00
var-permute-512.ll [X86] Pass v32i16/v64i8 in zmm registers on KNL target. 2019-08-30 17:35:08 +00:00
vararg-callee-cleanup.ll
vararg_no_start.ll
vararg_tailcall.ll
variable-sized-darwin-bzero.ll
variadic-node-pic.ll
vastart-defs-eflags.ll
vbinop-simplify-bug.ll
vec-copysign-avx512.ll [X86] Enable isel to fold broadcast loads that have been bitcasted from FP into a vpternlog. 2019-09-29 01:24:33 +00:00
vec-copysign.ll
vec-libcalls.ll
vec-loadsingles-alignment.ll
vec-strict-128.ll Add strict fp support for instructions fadd/fsub/fmul/fdiv 2019-12-06 09:44:33 +08:00
vec-strict-256.ll Add strict fp support for instructions fadd/fsub/fmul/fdiv 2019-12-06 09:44:33 +08:00
vec-strict-512.ll Add strict fp support for instructions fadd/fsub/fmul/fdiv 2019-12-06 09:44:33 +08:00
vec-trunc-store.ll
vec3.ll
vec_align.ll [X86] Autogenerate vec_* tests. NFC 2019-08-20 23:11:29 +00:00
vec_align_i256.ll [X86] Autogenerate vec_* tests. NFC 2019-08-20 23:11:29 +00:00
vec_anyext.ll [X86] Autogenerate vec_* tests. NFC 2019-08-20 23:11:29 +00:00
vec_call.ll [X86] Autogenerate vec_* tests. NFC 2019-08-20 23:11:29 +00:00
vec_cast.ll [TargetLowering] Teach computeRegisterProperties to only widen v3i16/v3f16 vectors to the next power of 2 type if that's legal. 2019-08-18 06:28:06 +00:00
vec_cast2.ll Recommit r368079 "[X86] Remove uses of the -x86-experimental-vector-widening-legalization flag from test/CodeGen/X86/" 2019-08-07 16:33:37 +00:00
vec_cast3.ll Recommit r368079 "[X86] Remove uses of the -x86-experimental-vector-widening-legalization flag from test/CodeGen/X86/" 2019-08-07 16:33:37 +00:00
vec_cmp_sint-128.ll
vec_cmp_uint-128.ll
vec_compare-sse4.ll
vec_compare.ll
vec_ctbits.ll Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default." 2019-08-07 16:24:26 +00:00
vec_ext_inreg.ll
vec_extract-avx.ll [X86] Add DAG combine to turn (vzmovl (insert_subvector undef, X, 0)) into (insert_subvector allzeros, (vzmovl X), 0) 2019-06-21 19:10:21 +00:00
vec_extract-mmx.ll [X86] Add custom type legalization for bitcasting mmx to v2i32/v4i16/v8i8 to use movq2dq instead of going through memory. 2019-08-15 18:23:37 +00:00
vec_extract-sse4.ll
vec_extract.ll [DAGCombiner] avoid crash on out-of-bounds insert index (PR44139) 2019-11-25 16:24:06 -05:00
vec_fabs.ll
vec_floor.ll
vec_fneg.ll Revert "[NFC][CodeGen] Add unary FNeg tests to some X86/ and XCore/ tests." 2019-06-13 19:24:51 +00:00
vec_fp_to_int.ll [X86] Add floating point execution domain to comi/ucomi/cvtss2si/cvtsd2si/cvttss2si/cvttsd2si/cvtsi2ss/cvtsi2sd instructions. 2019-11-30 11:26:28 -08:00
vec_fpext.ll
vec_fptrunc.ll [x86] split 256-bit store of concatenated vectors 2019-06-04 16:40:04 +00:00
vec_i64.ll
vec_ins_extract-1.ll
vec_ins_extract.ll
vec_insert-2.ll [X86] Add PS<->PD domain changing support for MOVH/MOVL load instructions and MOVH store instructions. 2019-07-06 17:59:57 +00:00
vec_insert-3.ll
vec_insert-4.ll
vec_insert-5.ll Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default." 2019-08-07 16:24:26 +00:00
vec_insert-7.ll [X86] Add custom type legalization for bitcasting mmx to v2i32/v4i16/v8i8 to use movq2dq instead of going through memory. 2019-08-15 18:23:37 +00:00
vec_insert-8.ll
vec_insert-9.ll
vec_insert-mmx.ll Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default." 2019-08-07 16:24:26 +00:00
vec_int_to_fp.ll [X86] Add floating point execution domain to comi/ucomi/cvtss2si/cvtsd2si/cvttss2si/cvttsd2si/cvtsi2ss/cvtsi2sd instructions. 2019-11-30 11:26:28 -08:00
vec_loadsingles.ll
vec_logical.ll Revert "[NFC][CodeGen] Add unary FNeg tests to some X86/ and XCore/ tests." 2019-06-13 19:24:51 +00:00
vec_minmax_match.ll
vec_minmax_sint.ll [TargetLowering] SimplifyMultipleUseDemandedBits - add VECTOR_SHUFFLE support. 2019-07-23 15:35:55 +00:00
vec_minmax_uint.ll [TargetLowering] SimplifyMultipleUseDemandedBits - add VECTOR_SHUFFLE support. 2019-07-23 15:35:55 +00:00
vec_partial.ll
vec_reassociate.ll
vec_return.ll
vec_round.ll [X86] Autogenerate vec_* tests. NFC 2019-08-20 23:11:29 +00:00
vec_saddo.ll [TargetLowering] Simplify expansion of S{ADD,SUB}O 2019-09-30 07:58:50 +00:00
vec_sdiv_to_shift.ll
vec_set-2.ll
vec_set-3.ll
vec_set-4.ll
vec_set-6.ll
vec_set-7.ll
vec_set-8.ll
vec_set-A.ll
vec_set-B.ll
vec_set-C.ll
vec_set-D.ll
vec_set-F.ll
vec_set-H.ll
vec_set.ll
vec_setcc-2.ll
vec_setcc.ll [TargetLowering] Teach computeRegisterProperties to only widen v3i16/v3f16 vectors to the next power of 2 type if that's legal. 2019-08-18 06:28:06 +00:00
vec_shift.ll
vec_shift2.ll
vec_shift3.ll
vec_shift4.ll
vec_shift5.ll
vec_shift6.ll [X86] Pass v32i16/v64i8 in zmm registers on KNL target. 2019-08-30 17:35:08 +00:00
vec_shift7.ll
vec_shuf-insert.ll [X86] Autogenerate vec_* tests. NFC 2019-08-20 23:11:29 +00:00
vec_smulo.ll [X86] SimplifyDemandedVectorElts - attempt to recombine target shuffle using DemandedElts mask (REAPPLIED) 2019-11-04 11:37:57 +00:00
vec_split.ll [X86] Autogenerate vec_* tests. NFC 2019-08-20 23:11:29 +00:00
vec_ss_load_fold.ll [X86] Make getZeroVector return floating point vectors in their native type on SSE2 and later. 2019-09-08 00:43:52 +00:00
vec_ssubo.ll [TargetLowering] Simplify expansion of S{ADD,SUB}O 2019-09-30 07:58:50 +00:00
vec_trunc_sext.ll [X86] Autogenerate vec_* tests. NFC 2019-08-20 23:11:29 +00:00
vec_uaddo.ll [DAGCombiner][X86] Teach visitCONCAT_VECTORS to combine (concat_vectors (concat_vectors X, Y), undef)) -> (concat_vectors X, Y, undef, undef) 2019-08-20 22:12:50 +00:00
vec_uint_to_fp-fastmath.ll
vec_uint_to_fp.ll
vec_umulo.ll [X86] Teach X86MCInstLower to swap operands of commutable instructions to enable 2-byte VEX encoding. 2019-11-04 22:07:46 -08:00
vec_unsafe-fp-math.ll
vec_usubo.ll [DAGCombiner][X86] Teach visitCONCAT_VECTORS to combine (concat_vectors (concat_vectors X, Y), undef)) -> (concat_vectors X, Y, undef, undef) 2019-08-20 22:12:50 +00:00
vec_zero-2.ll [X86] Autogenerate vec_* tests. NFC 2019-08-20 23:11:29 +00:00
vec_zero.ll
vec_zero_cse.ll
vecloadextract.ll Rename ExpandISelPseudo->FinalizeISel, delay register reservation 2019-06-19 00:25:39 +00:00
vector-bitreverse.ll [X86] Split v16i32/v8i64 bitreverse on avx512f targets without avx512bw to enable the use of vpshufb on the 256-bit halves. 2019-09-30 03:14:38 +00:00
vector-blend.ll Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default." 2019-08-07 16:24:26 +00:00
vector-compare-all_of.ll [X86] Add a DAG combine to turn (and (bitcast (vXi1 (concat_vectors (vYi1 setcc), undef,))), C) into (bitcast (vXi1 (concat_vectors (vYi1 setcc), zero,))) 2019-10-28 11:27:01 -07:00
vector-compare-any_of.ll [X86] Add a DAG combine to turn (and (bitcast (vXi1 (concat_vectors (vYi1 setcc), undef,))), C) into (bitcast (vXi1 (concat_vectors (vYi1 setcc), zero,))) 2019-10-28 11:27:01 -07:00
vector-compare-combines.ll
vector-compare-results.ll [X86] Split oversized vXi1 vector arguments and return values into scalars on avx512 targets. 2019-09-17 04:41:14 +00:00
vector-compare-simplify.ll
vector-constrained-fp-intrinsics-fma.ll [FPEnv] Strict FP tests should use the requisite function attributes. 2019-10-04 17:03:46 +00:00
vector-constrained-fp-intrinsics.ll [TargetLowering] Fix another potential FPE in expandFP_TO_UINT 2019-12-06 14:11:04 -08:00
vector-ext-logic.ll Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default." 2019-08-07 16:24:26 +00:00
vector-extend-inreg.ll [X86] Use vmovq for v4i64/v4f64/v8i64/v8f64 vzmovl. 2019-06-21 17:24:21 +00:00
vector-fshl-128.ll [X86] Move bitselect matching to vpternlog into X86ISelDAGToDAG.cpp 2019-09-29 01:24:29 +00:00
vector-fshl-256.ll [X86] Teach X86MCInstLower to swap operands of commutable instructions to enable 2-byte VEX encoding. 2019-11-04 22:07:46 -08:00
vector-fshl-512.ll [X86] Teach X86MCInstLower to swap operands of commutable instructions to enable 2-byte VEX encoding. 2019-11-04 22:07:46 -08:00
vector-fshl-rot-128.ll [X86] Move bitselect matching to vpternlog into X86ISelDAGToDAG.cpp 2019-09-29 01:24:29 +00:00
vector-fshl-rot-256.ll [X86] Teach X86MCInstLower to swap operands of commutable instructions to enable 2-byte VEX encoding. 2019-11-04 22:07:46 -08:00
vector-fshl-rot-512.ll [X86] Teach X86MCInstLower to swap operands of commutable instructions to enable 2-byte VEX encoding. 2019-11-04 22:07:46 -08:00
vector-fshr-128.ll [X86] Move bitselect matching to vpternlog into X86ISelDAGToDAG.cpp 2019-09-29 01:24:29 +00:00
vector-fshr-256.ll [X86] Teach X86MCInstLower to swap operands of commutable instructions to enable 2-byte VEX encoding. 2019-11-04 22:07:46 -08:00
vector-fshr-512.ll [X86] Teach X86MCInstLower to swap operands of commutable instructions to enable 2-byte VEX encoding. 2019-11-04 22:07:46 -08:00
vector-fshr-rot-128.ll [X86] Move bitselect matching to vpternlog into X86ISelDAGToDAG.cpp 2019-09-29 01:24:29 +00:00
vector-fshr-rot-256.ll [X86] Teach X86MCInstLower to swap operands of commutable instructions to enable 2-byte VEX encoding. 2019-11-04 22:07:46 -08:00
vector-fshr-rot-512.ll [X86] Teach X86MCInstLower to swap operands of commutable instructions to enable 2-byte VEX encoding. 2019-11-04 22:07:46 -08:00
vector-gep.ll Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default." 2019-08-07 16:24:26 +00:00
vector-half-conversions.ll Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default." 2019-08-07 16:24:26 +00:00
vector-idiv-sdiv-128.ll [X86] Use MOVSX by default instead of CBW to extend i8 to AX for i8 sdivrem. 2019-09-06 19:17:02 +00:00
vector-idiv-sdiv-256.ll [X86] Teach X86MCInstLower to swap operands of commutable instructions to enable 2-byte VEX encoding. 2019-11-04 22:07:46 -08:00
vector-idiv-sdiv-512.ll [X86] Teach X86MCInstLower to swap operands of commutable instructions to enable 2-byte VEX encoding. 2019-11-04 22:07:46 -08:00
vector-idiv-udiv-128.ll [X86][SSE] Lower shuffle as ANY_EXTEND_VECTOR_INREG 2019-08-10 16:46:07 +00:00
vector-idiv-udiv-256.ll
vector-idiv-udiv-512.ll [X86] Teach X86MCInstLower to swap operands of commutable instructions to enable 2-byte VEX encoding. 2019-11-04 22:07:46 -08:00
vector-idiv-v2i32.ll [X86] Remove unneeded CHECK lines from a test. NFC 2019-09-05 17:24:25 +00:00
vector-idiv.ll
vector-interleave.ll
vector-intrinsics.ll
vector-lzcnt-128.ll
vector-lzcnt-256.ll
vector-lzcnt-512.ll [X86] Pass v32i16/v64i8 in zmm registers on KNL target. 2019-08-30 17:35:08 +00:00
vector-lzcnt-sub128.ll Recommit r368079 "[X86] Remove uses of the -x86-experimental-vector-widening-legalization flag from test/CodeGen/X86/" 2019-08-07 16:33:37 +00:00
vector-merge-store-fp-constants.ll
vector-mul.ll [X86] In decomposeMulByConstant, legalize the VT before querying whether the multiply is legal 2019-08-01 18:49:07 +00:00
vector-mulfix-legalize.ll [Intrinsic] Add the llvm.umul.fix.sat intrinsic 2019-09-07 12:16:14 +00:00
vector-narrow-binop.ll Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default." 2019-08-07 16:24:26 +00:00
vector-partial-undef.ll
vector-pcmp.ll
vector-popcnt-128.ll
vector-popcnt-256.ll
vector-popcnt-512.ll [X86] Pass v32i16/v64i8 in zmm registers on KNL target. 2019-08-30 17:35:08 +00:00
vector-reduce-add.ll [X86][SSE] Avoid unnecessary PMOVZX in v4i8 sum reduction 2019-10-12 15:19:13 +00:00
vector-reduce-and-bool.ll [X86] Add a DAG combine to turn (and (bitcast (vXi1 (concat_vectors (vYi1 setcc), undef,))), C) into (bitcast (vXi1 (concat_vectors (vYi1 setcc), zero,))) 2019-10-28 11:27:01 -07:00
vector-reduce-and.ll Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default." 2019-08-07 16:24:26 +00:00
vector-reduce-fadd-fast.ll [SDAG][x86] check for relaxed math when matching an FP reduction 2019-08-15 12:43:15 +00:00
vector-reduce-fadd.ll Change semantics of fadd/fmul vector reductions. 2019-06-11 08:22:10 +00:00
vector-reduce-fmax-nnan.ll Improve reduction intrinsics by overloading result value. 2019-06-13 09:37:38 +00:00
vector-reduce-fmax.ll Improve reduction intrinsics by overloading result value. 2019-06-13 09:37:38 +00:00
vector-reduce-fmin-nnan.ll Improve reduction intrinsics by overloading result value. 2019-06-13 09:37:38 +00:00
vector-reduce-fmin.ll Improve reduction intrinsics by overloading result value. 2019-06-13 09:37:38 +00:00
vector-reduce-fmul-fast.ll Change semantics of fadd/fmul vector reductions. 2019-06-11 08:22:10 +00:00
vector-reduce-fmul.ll Change semantics of fadd/fmul vector reductions. 2019-06-11 08:22:10 +00:00
vector-reduce-mul.ll [X86][SSE] lowerV16I8Shuffle - tryToWidenViaDuplication - undef unpack args 2019-10-19 13:18:02 +00:00
vector-reduce-or-bool.ll [X86] Add a DAG combine to turn (and (bitcast (vXi1 (concat_vectors (vYi1 setcc), undef,))), C) into (bitcast (vXi1 (concat_vectors (vYi1 setcc), zero,))) 2019-10-28 11:27:01 -07:00
vector-reduce-or.ll Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default." 2019-08-07 16:24:26 +00:00
vector-reduce-smax.ll Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default." 2019-08-07 16:24:26 +00:00
vector-reduce-smin.ll Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default." 2019-08-07 16:24:26 +00:00
vector-reduce-umax.ll Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default." 2019-08-07 16:24:26 +00:00
vector-reduce-umin.ll Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default." 2019-08-07 16:24:26 +00:00
vector-reduce-xor-bool.ll [X86][SSE] Add support for <64 x i1> bool reduction 2019-09-08 11:46:21 +00:00
vector-reduce-xor.ll Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default." 2019-08-07 16:24:26 +00:00
vector-rem.ll [X86][SSE] Regenerate vector-rem tests 2019-10-30 18:58:53 +00:00
vector-rotate-128.ll Add test for rotating truncated vectors. NFC 2019-10-08 13:08:51 +00:00
vector-rotate-256.ll [X86] Teach X86MCInstLower to swap operands of commutable instructions to enable 2-byte VEX encoding. 2019-11-04 22:07:46 -08:00
vector-rotate-512.ll [X86] Teach X86MCInstLower to swap operands of commutable instructions to enable 2-byte VEX encoding. 2019-11-04 22:07:46 -08:00
vector-sext.ll [X86][SSE] lowerV16I8Shuffle - tryToWidenViaDuplication - undef unpack args 2019-10-19 13:18:02 +00:00
vector-shift-ashr-128.ll Revert r373172 "[X86] Add custom isel logic to match VPTERNLOG from 2 logic ops." 2019-10-01 22:40:03 +00:00
vector-shift-ashr-256.ll Revert r373172 "[X86] Add custom isel logic to match VPTERNLOG from 2 logic ops." 2019-10-01 22:40:03 +00:00
vector-shift-ashr-512.ll Revert r373172 "[X86] Add custom isel logic to match VPTERNLOG from 2 logic ops." 2019-10-01 22:40:03 +00:00
vector-shift-ashr-sub128.ll Revert r373172 "[X86] Add custom isel logic to match VPTERNLOG from 2 logic ops." 2019-10-01 22:40:03 +00:00
vector-shift-by-select-loop.ll [X86] Teach X86MCInstLower to swap operands of commutable instructions to enable 2-byte VEX encoding. 2019-11-04 22:07:46 -08:00
vector-shift-lshr-128.ll [CodeGenPrepare][x86] shift both sides of a vector select when profitable 2019-06-16 15:29:03 +00:00
vector-shift-lshr-256.ll
vector-shift-lshr-512.ll [X86] Pass v32i16/v64i8 in zmm registers on KNL target. 2019-08-30 17:35:08 +00:00
vector-shift-lshr-sub128.ll Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default." 2019-08-07 16:24:26 +00:00
vector-shift-shl-128.ll [TargetLowering] SimplifyDemandedBits - call SimplifyMultipleUseDemandedBits for ISD::VECTOR_SHUFFLE 2019-08-07 11:43:13 +00:00
vector-shift-shl-256.ll [TargetLowering] SimplifyDemandedBits - call SimplifyMultipleUseDemandedBits for ISD::VECTOR_SHUFFLE 2019-08-07 11:43:13 +00:00
vector-shift-shl-512.ll [X86] Pass v32i16/v64i8 in zmm registers on KNL target. 2019-08-30 17:35:08 +00:00
vector-shift-shl-sub128.ll Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default." 2019-08-07 16:24:26 +00:00
vector-shuffle-128-unpck.ll
vector-shuffle-128-v2.ll [X86] In lowerVectorShuffle, instead of creating a new node to canonicalize the shuffle mask by commuting, just commute the mask and swap V1/V2. 2019-07-23 18:46:15 +00:00
vector-shuffle-128-v4.ll [X86] Teach lowerV4I32Shuffle to only use broadcasts if the mask has more than one undef element. Prioritize shifts over broadcast in lowerV8I16Shuffle. 2019-08-19 18:15:50 +00:00
vector-shuffle-128-v8.ll [X86] Teach lowerV4I32Shuffle to only use broadcasts if the mask has more than one undef element. Prioritize shifts over broadcast in lowerV8I16Shuffle. 2019-08-19 18:15:50 +00:00
vector-shuffle-128-v16.ll Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default." 2019-08-07 16:24:26 +00:00
vector-shuffle-256-v4.ll [X86][AVX] matchShuffleWithSHUFPD - add support for zeroable operands 2019-09-16 17:30:33 +00:00
vector-shuffle-256-v8.ll [X86][SSE] Lower shuffle as ANY_EXTEND_VECTOR_INREG 2019-08-10 16:46:07 +00:00
vector-shuffle-256-v16.ll [X86] Fix pshuflw formation from repeated shuffle mask (PR43230) 2019-09-07 12:13:44 +00:00
vector-shuffle-256-v32.ll [X86][SSE] lowerV16I8Shuffle - tryToWidenViaDuplication - undef unpack args 2019-10-19 13:18:02 +00:00
vector-shuffle-512-v8.ll [X86][AVX] matchShuffleWithSHUFPD - add support for zeroable operands 2019-09-16 17:30:33 +00:00
vector-shuffle-512-v16.ll [X86] Teach lowerV4I32Shuffle to only use broadcasts if the mask has more than one undef element. Prioritize shifts over broadcast in lowerV8I16Shuffle. 2019-08-19 18:15:50 +00:00
vector-shuffle-512-v32.ll [X86] Pass v32i16/v64i8 in zmm registers on KNL target. 2019-08-30 17:35:08 +00:00
vector-shuffle-512-v64.ll [X86] Pass v32i16/v64i8 in zmm registers on KNL target. 2019-08-30 17:35:08 +00:00
vector-shuffle-avx512.ll [X86] EltsFromConsecutiveLoads - Don't confuse elt count with vector element count (PR43170) 2019-08-31 16:21:31 +00:00
vector-shuffle-combining-avx.ll [X86][AVX] Decode constant bits from insert_subvector(c1, c2, c3) 2019-06-15 17:05:24 +00:00
vector-shuffle-combining-avx2.ll [X86] Use vmovq for v4i64/v4f64/v8i64/v8f64 vzmovl. 2019-06-21 17:24:21 +00:00
vector-shuffle-combining-avx512bw.ll [X86][AVX] Decode constant bits from insert_subvector(c1, c2, c3) 2019-06-15 17:05:24 +00:00
vector-shuffle-combining-avx512bwvl.ll
vector-shuffle-combining-avx512vbmi.ll
vector-shuffle-combining-sse4a.ll
vector-shuffle-combining-sse41.ll
vector-shuffle-combining-ssse3.ll [X86] Remove call to getZeroVector from materializeVectorConstant. Add isel patterns for zero vectors with all types. 2019-09-08 20:56:05 +00:00
vector-shuffle-combining-xop.ll [X86][AVX] Decode constant bits from insert_subvector(c1, c2, c3) 2019-06-15 17:05:24 +00:00
vector-shuffle-combining.ll [DAGCombiner] Peek through vector concats when trying to combine shuffles. 2019-11-28 23:57:29 +01:00
vector-shuffle-masked.ll
vector-shuffle-mmx.ll
vector-shuffle-sse1.ll [X86] Separate the memory size of vzext_load/vextract_store from the element size of the result type. Use them improve the codegen of v2f32 loads/stores with sse1 only. 2019-07-15 02:02:31 +00:00
vector-shuffle-sse4a.ll
vector-shuffle-sse41.ll
vector-shuffle-v1.ll [X86] Pass v32i16/v64i8 in zmm registers on KNL target. 2019-08-30 17:35:08 +00:00
vector-shuffle-v48.ll [X86][SSE] Regenerate v48 shuffle test on a variety of targets 2019-06-27 11:22:23 +00:00
vector-shuffle-variable-128.ll [X86] Add PS<->PD domain changing support for MOVH/MOVL load instructions and MOVH store instructions. 2019-07-06 17:59:57 +00:00
vector-shuffle-variable-256.ll [X86] Add PS<->PD domain changing support for MOVH/MOVL load instructions and MOVH store instructions. 2019-07-06 17:59:57 +00:00
vector-sqrt.ll
vector-trunc-math.ll [X86] Teach X86MCInstLower to swap operands of commutable instructions to enable 2-byte VEX encoding. 2019-11-04 22:07:46 -08:00
vector-trunc-packus.ll [X86] Teach X86MCInstLower to swap operands of commutable instructions to enable 2-byte VEX encoding. 2019-11-04 22:07:46 -08:00
vector-trunc-ssat.ll [X86] Enable use of avx512 saturating truncate instructions in more cases. 2019-10-13 19:07:28 +00:00
vector-trunc-usat.ll [X86] Enable use of avx512 saturating truncate instructions in more cases. 2019-10-13 19:07:28 +00:00
vector-trunc.ll [X86] Pass v32i16/v64i8 in zmm registers on KNL target. 2019-08-30 17:35:08 +00:00
vector-truncate-combine.ll Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default." 2019-08-07 16:24:26 +00:00
vector-tzcnt-128.ll
vector-tzcnt-256.ll
vector-tzcnt-512.ll [X86] Pass v32i16/v64i8 in zmm registers on KNL target. 2019-08-30 17:35:08 +00:00
vector-unsigned-cmp.ll
vector-variable-idx.ll
vector-variable-idx2.ll
vector-width-store-merge.ll [X86] Regenerate memmove vector width tests 2019-10-30 18:58:53 +00:00
vector-zext.ll [X86] Pass v32i16/v64i8 in zmm registers on KNL target. 2019-08-30 17:35:08 +00:00
vector-zmov.ll [X86] Add a DAG combine to turn vzmovl+load into vzload if the load isn't volatile. Remove isel patterns for vzmovl+load 2019-06-25 17:08:26 +00:00
vector.ll
vector_splat-const-shift-of-constmasked.ll
vectorcall.ll
version_directive.ll
vfcmp.ll
viabs.ll [X86] Pass v32i16/v64i8 in zmm registers on KNL target. 2019-08-30 17:35:08 +00:00
virtreg-physreg-def-regallocfast.mir
virtual-registers-cleared-in-machine-functions-liveins.ll
visibility.ll
visibility2.ll
vmaskmov-offset.ll Rename ExpandISelPseudo->FinalizeISel, delay register reservation 2019-06-19 00:25:39 +00:00
vmovq.ll
volatile-memstores-nooverlapping-load-stores.ll Fixing @llvm.memcpy not honoring volatile. 2019-07-09 09:53:36 +00:00
volatile.ll
vortex-bug.ll
vp2intersect_multiple_pairs.ll [X86] Regenerate vp2intersect tests 2019-07-31 12:17:10 +00:00
vpshufbitqbm-intrinsics-upgrade.ll
vpshufbitqbm-intrinsics.ll
vsel-cmp-load.ll Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default." 2019-08-07 16:24:26 +00:00
vselect-2.ll [X86] Allow execution domain fixing to turn SHUFPD into SHUFPS. 2019-07-08 06:52:49 +00:00
vselect-avx.ll [CodeGen][SelectionDAG] More efficient code for X % C == 0 (SREM case) 2019-08-13 14:57:37 +00:00
vselect-constants.ll
vselect-minmax.ll
vselect-packss.ll
vselect-pcmp.ll
vselect-zero.ll
vselect.ll [DAGCombiner] fold vselect-of-constants to shift 2019-10-11 14:17:56 +00:00
vshift-1.ll
vshift-2.ll
vshift-3.ll
vshift-4.ll Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default." 2019-08-07 16:24:26 +00:00
vshift-5.ll
vshift-6.ll
vshift_scalar.ll
vshift_split.ll
vshift_split2.ll
vshli-simplify-demanded-bits.ll X86: Add missing test for vshli SimplifyDemandedBitsForTargetNode 2019-09-19 15:44:00 +00:00
vsplit-and.ll
vzero-excess.ll
waitpkg-intrinsics.ll
warn-stack.ll
wbinvd-intrinsic.ll
wbnoinvd-intrinsic.ll
weak-undef.ll
weak.ll
weak_def_can_be_hidden.ll
webkit-jscc.ll
wide-fma-contraction.ll
wide-integer-cmp.ll
wide-integer-fold.ll
widen_arith-1.ll Revert [MBP] Disable aggressive loop rotate in plain mode 2019-08-29 19:03:58 +00:00
widen_arith-2.ll Revert [MBP] Disable aggressive loop rotate in plain mode 2019-08-29 19:03:58 +00:00
widen_arith-3.ll Revert [MBP] Disable aggressive loop rotate in plain mode 2019-08-29 19:03:58 +00:00
widen_arith-4.ll Revert [MBP] Disable aggressive loop rotate in plain mode 2019-08-29 19:03:58 +00:00
widen_arith-5.ll Revert [MBP] Disable aggressive loop rotate in plain mode 2019-08-29 19:03:58 +00:00
widen_arith-6.ll Revert [MBP] Disable aggressive loop rotate in plain mode 2019-08-29 19:03:58 +00:00
widen_bitops-0.ll Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default." 2019-08-07 16:24:26 +00:00
widen_bitops-1.ll
widen_cast-1.ll Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default." 2019-08-07 16:24:26 +00:00
widen_cast-2.ll Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default." 2019-08-07 16:24:26 +00:00
widen_cast-3.ll Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default." 2019-08-07 16:24:26 +00:00
widen_cast-4.ll Revert [MBP] Disable aggressive loop rotate in plain mode 2019-08-29 19:03:58 +00:00
widen_cast-5.ll Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default." 2019-08-07 16:24:26 +00:00
widen_cast-6.ll Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default." 2019-08-07 16:24:26 +00:00
widen_compare-1.ll Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default." 2019-08-07 16:24:26 +00:00
widen_conv-1.ll Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default." 2019-08-07 16:24:26 +00:00
widen_conv-2.ll Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default." 2019-08-07 16:24:26 +00:00
widen_conv-3.ll [X86][SSE] lowerV16I8Shuffle - tryToWidenViaDuplication - undef unpack args 2019-10-19 13:18:02 +00:00
widen_conv-4.ll Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default." 2019-08-07 16:24:26 +00:00
widen_conversions.ll Recommit r368079 "[X86] Remove uses of the -x86-experimental-vector-widening-legalization flag from test/CodeGen/X86/" 2019-08-07 16:33:37 +00:00
widen_extract-1.ll
widen_load-0.ll
widen_load-1.ll
widen_load-2.ll [TargetLowering] Teach computeRegisterProperties to only widen v3i16/v3f16 vectors to the next power of 2 type if that's legal. 2019-08-18 06:28:06 +00:00
widen_load-3.ll [x86] avoid vector load narrowing with extracted store uses (PR42305) 2019-06-19 18:13:47 +00:00
widen_mul.ll Recommit r368079 "[X86] Remove uses of the -x86-experimental-vector-widening-legalization flag from test/CodeGen/X86/" 2019-08-07 16:33:37 +00:00
widen_shuffle-1.ll Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default." 2019-08-07 16:24:26 +00:00
widened-broadcast.ll
win-alloca-expander.ll
win-catchpad-csrs.ll [X86] Print register names in .seh_* directives 2019-08-30 21:23:05 +00:00
win-catchpad-nested-cxx.ll
win-catchpad-nested.ll
win-catchpad-varargs.ll
win-catchpad.ll [X86] Print register names in .seh_* directives 2019-08-30 21:23:05 +00:00
win-cleanuppad.ll
win-funclet-cfi.ll [X86] Print register names in .seh_* directives 2019-08-30 21:23:05 +00:00
win-mixed-ehpersonality.ll
win-smallparams.ll
win32-bool.ll
win32-eh-available-externally.ll IR: print value numbers for unnamed function arguments 2019-08-03 14:28:34 +00:00
win32-eh-states.ll
win32-eh.ll
win32-pic-jumptable.ll
win32-preemption.ll
win32-seh-catchpad-realign.ll
win32-seh-catchpad.ll
win32-seh-nested-finally.ll
win32-spill-xmm.ll
win32-ssp.ll
win32_sret.ll
win64-bool.ll
win64-byval.ll
win64-eh-empty-block.ll [Windows] Replace TrapUnreachable with an int3 insertion pass 2019-09-09 23:04:25 +00:00
win64-funclet-savexmm.ll [WinEH] Fix the wrong alignment orientation during calculating EH frame. 2019-11-15 09:42:38 +08:00
win64-jumptable.ll
win64-long-double.ll
win64-nosse-csrs.ll
win64-stackprobe-overflow.ll [X86] [Win64] Avoid truncating large (> 32 bit) stack allocations 2019-11-27 10:44:42 +02:00
win64_alloca_dynalloca.ll
win64_call_epi.ll [Windows] Replace TrapUnreachable with an int3 insertion pass 2019-09-09 23:04:25 +00:00
win64_eh.ll [Windows] Replace TrapUnreachable with an int3 insertion pass 2019-09-09 23:04:25 +00:00
win64_eh_leaf.ll
win64_eh_leaf2.ll
win64_frame.ll [X86] Print register names in .seh_* directives 2019-08-30 21:23:05 +00:00
win64_nonvol.ll
win64_params.ll
win64_sibcall.ll
win64_vararg.ll
win_chkstk.ll
win_coreclr_chkstk.ll
win_coreclr_chkstk_liveins.mir [Alignment] Use llvm::Align in MachineFunction and TargetLowering - fixes mir parsing 2019-09-11 11:16:48 +00:00
win_cst_pool.ll Standardize on MSVC behavior for triples with no environment 2019-07-08 21:05:20 +00:00
windows-itanium-alloca.ll
wineh-coreclr.ll [Windows] Replace TrapUnreachable with an int3 insertion pass 2019-09-09 23:04:25 +00:00
wineh-exceptionpointer.ll
wineh-no-ehpads.ll
x32-cet-intrinsics.ll
x32-function_pointer-1.ll
x32-function_pointer-2.ll
x32-function_pointer-3.ll
x32-indirectbr.ll
x32-landingpad.ll
x32-lea-1.ll
x32-movtopush64.ll
x32-va_start.ll
x64-cet-intrinsics.ll
x86-16.ll
x86-32-intrcc.ll
x86-32-vector-calling-conv.ll
x86-64-and-mask.ll
x86-64-arg.ll
x86-64-asm.ll
x86-64-baseptr.ll
x86-64-bittest-logic.ll
x86-64-call.ll
x86-64-disp.ll
x86-64-double-precision-shift-left.ll
x86-64-double-precision-shift-right.ll
x86-64-double-shifts-Oz-Os-O2.ll
x86-64-double-shifts-var.ll
x86-64-extend-shift.ll
x86-64-flags-intrinsics.ll [X86] Print register names in .seh_* directives 2019-08-30 21:23:05 +00:00
x86-64-gv-offset.ll
x86-64-intrcc-nosse.ll
x86-64-intrcc.ll
x86-64-jumps.ll
x86-64-mem.ll
x86-64-ms_abi-vararg.ll
x86-64-pic-1.ll
x86-64-pic-2.ll
x86-64-pic-3.ll
x86-64-pic-4.ll
x86-64-pic-5.ll
x86-64-pic-6.ll
x86-64-pic-7.ll
x86-64-pic-8.ll
x86-64-pic-9.ll
x86-64-pic-10.ll
x86-64-pic-11.ll
x86-64-pic-12.ll
x86-64-pic.ll
x86-64-plt-relative-reloc.ll
x86-64-psub.ll
x86-64-ptr-arg-simple.ll
x86-64-ret0.ll
x86-64-shortint.ll
x86-64-sret-return-2.ll
x86-64-sret-return.ll
x86-64-stack-and-frame-ptr.ll
x86-64-static-relo-movl.ll
x86-64-tls-1.ll
x86-64-varargs.ll
x86-64-veccallcc.ll
x86-big-ret.ll
x86-cmov-converter.ll [MBP] Move a latch block with conditional exit and multi predecessors to top of loop 2019-06-14 23:08:59 +00:00
x86-flags-intrinsics.ll
x86-fold-pshufb.ll
x86-framelowering-trap.ll
x86-inline-asm-validation.ll
x86-interleaved-access.ll [X86] Teach X86MCInstLower to swap operands of commutable instructions to enable 2-byte VEX encoding. 2019-11-04 22:07:46 -08:00
x86-interleaved-check.ll
x86-interrupt_cc.ll [WinEH] Allocate space in funclets stack to save XMM CSRs 2019-08-27 01:53:24 +00:00
x86-interrupt_cld.ll
x86-interrupt_vzeroupper.ll
x86-mixed-alignment-dagcombine.ll [X86] Automatically generate various tests. NFC 2019-08-26 13:53:29 +00:00
x86-no_caller_saved_registers-preserve.ll
x86-no_caller_saved_registers.ll
x86-plt-relative-reloc.ll
x86-repmov-copy-eflags.ll
x86-sanitizer-shrink-wrapping.ll
x86-setcc-int-to-fp-combine.ll
x86-shifts.ll Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default." 2019-08-07 16:24:26 +00:00
x86-shrink-wrap-unwind.ll
x86-shrink-wrapping.ll [Peephole] Allow folding loads into instructions w/multiple uses (such as test64rr) 2019-06-25 17:29:18 +00:00
x86-store-gv-addr.ll
x86-upgrade-avx-vbroadcast.ll
x86-upgrade-avx2-vbroadcast.ll
x86-win64-shrink-wrapping.ll
x86_64-mul-by-const.ll
x87-reg-usage.mir [X86] add mayRaiseFPException flag and FPCW registers for X87 instructions 2019-11-01 21:12:43 -07:00
x87.ll
xaluo.ll
xchg-nofold.ll [FIX] Forces shrink wrapping to consider any memory access as aliasing with the stack 2019-06-13 13:56:19 +00:00
xmm-r64.ll
xmulo.ll [DAGCombiner][X86][ARM] Teach visitMULO to fold multiplies with 0 to 0 and no carry. 2019-09-08 19:24:39 +00:00
xop-ifma.ll [X86] Add a hack to combinePMULDQ to manually turn SIGN_EXTEND_VECTOR_INREG/ZERO_EXTEND_VECTOR_INREG inputs into an ANY_EXTEND_VECTOR_INREG style shuffle 2019-08-26 18:23:26 +00:00
xop-intrinsics-fast-isel.ll
xop-intrinsics-x86_64-upgrade.ll
xop-intrinsics-x86_64.ll
xop-mask-comments.ll
xop-pcmov.ll
xor-combine-debugloc.ll Rename ExpandISelPseudo->FinalizeISel, delay register reservation 2019-06-19 00:25:39 +00:00
xor-icmp.ll
xor-select-i1-combine.ll
xor.ll Revert r368276 "[TargetLowering] SimplifyDemandedBits - call SimplifyMultipleUseDemandedBits for ISD::EXTRACT_VECTOR_ELT" 2019-08-13 09:33:25 +00:00
xray-attribute-instrumentation.ll
xray-custom-log.ll [X86] Use 64-bit version of source register in LowerPATCHABLE_EVENT_CALL and LowerPATCHABLE_TYPED_EVENT_CALL 2019-10-27 20:44:41 -07:00
xray-empty-firstmbb.mir
xray-empty-function.mir
xray-log-args.ll
xray-loop-detection.ll
xray-multiplerets-in-blocks.mir
xray-section-group.ll
xray-selective-instrumentation-miss.ll
xray-selective-instrumentation.ll
xray-tail-call-sled.ll
xray-typed-event-log.ll [X86] Use 64-bit version of source register in LowerPATCHABLE_EVENT_CALL and LowerPATCHABLE_TYPED_EVENT_CALL 2019-10-27 20:44:41 -07:00
xtest.ll
zero-remat.ll
zext-demanded.ll
zext-extract_subreg.ll
zext-fold.ll
zext-inreg-0.ll
zext-inreg-1.ll
zext-logicop-shift-load.ll
zext-sext.ll
zext-shl.ll
zext-trunc.ll
zlib-longest-match.ll