forked from OSchip/llvm-project
194 lines
8.0 KiB
LLVM
194 lines
8.0 KiB
LLVM
; RUN: llc < %s -mtriple=x86_64-apple-darwin -mcpu=corei7-avx -mattr=+avx | FileCheck %s --check-prefix=ALL --check-prefix=AVX1
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; RUN: llc < %s -mtriple=x86_64-apple-darwin -mcpu=core-avx2 -mattr=+avx2 | FileCheck %s --check-prefix=ALL --check-prefix=AVX2
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define <8 x float> @A(<8 x float> %a, <8 x float> %b) nounwind uwtable readnone ssp {
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; ALL-LABEL: A:
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; ALL: ## BB#0: ## %entry
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; ALL-NEXT: vperm2f128 {{.*#+}} ymm0 = ymm0[2,3,0,1]
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; ALL-NEXT: retq
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entry:
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%shuffle = shufflevector <8 x float> %a, <8 x float> %b, <8 x i32> <i32 4, i32 5, i32 6, i32 7, i32 0, i32 1, i32 2, i32 3>
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ret <8 x float> %shuffle
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}
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define <8 x float> @B(<8 x float> %a, <8 x float> %b) nounwind uwtable readnone ssp {
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; ALL-LABEL: B:
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; ALL: ## BB#0: ## %entry
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; ALL-NEXT: vblendpd {{.*#+}} ymm0 = ymm0[0,1],ymm1[2,3]
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; ALL-NEXT: retq
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entry:
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%shuffle = shufflevector <8 x float> %a, <8 x float> %b, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 12, i32 13, i32 14, i32 15>
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ret <8 x float> %shuffle
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}
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define <8 x float> @C(<8 x float> %a, <8 x float> %b) nounwind uwtable readnone ssp {
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; ALL-LABEL: C:
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; ALL: ## BB#0: ## %entry
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; ALL-NEXT: vinsertf128 $1, %xmm0, %ymm0, %ymm0
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; ALL-NEXT: retq
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entry:
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%shuffle = shufflevector <8 x float> %a, <8 x float> %b, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 0, i32 1, i32 2, i32 3>
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ret <8 x float> %shuffle
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}
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define <8 x float> @D(<8 x float> %a, <8 x float> %b) nounwind uwtable readnone ssp {
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; ALL-LABEL: D:
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; ALL: ## BB#0: ## %entry
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; ALL-NEXT: vperm2f128 {{.*#+}} ymm0 = ymm0[2,3,2,3]
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; ALL-NEXT: retq
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entry:
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%shuffle = shufflevector <8 x float> %a, <8 x float> %b, <8 x i32> <i32 4, i32 5, i32 6, i32 7, i32 4, i32 5, i32 6, i32 7>
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ret <8 x float> %shuffle
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}
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define <32 x i8> @E(<32 x i8> %a, <32 x i8> %b) nounwind uwtable readnone ssp {
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; ALL-LABEL: E:
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; ALL: ## BB#0: ## %entry
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; ALL-NEXT: vperm2f128 {{.*#+}} ymm0 = ymm0[2,3,2,3]
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; ALL-NEXT: retq
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entry:
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%shuffle = shufflevector <32 x i8> %a, <32 x i8> %b, <32 x i32> <i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27, i32 28, i32 29, i32 30, i32 31, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27, i32 28, i32 29, i32 30, i32 31>
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ret <32 x i8> %shuffle
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}
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define <4 x i64> @E2(<4 x i64> %a, <4 x i64> %b) nounwind uwtable readnone ssp {
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; ALL-LABEL: E2:
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; ALL: ## BB#0: ## %entry
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; ALL-NEXT: vperm2f128 {{.*#+}} ymm0 = ymm1[2,3],ymm0[0,1]
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; ALL-NEXT: retq
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entry:
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%shuffle = shufflevector <4 x i64> %a, <4 x i64> %b, <4 x i32> <i32 6, i32 7, i32 0, i32 1>
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ret <4 x i64> %shuffle
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}
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define <32 x i8> @Ei(<32 x i8> %a, <32 x i8> %b) nounwind uwtable readnone ssp {
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; AVX1-LABEL: Ei:
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; AVX1: ## BB#0: ## %entry
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; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm0
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; AVX1-NEXT: vpaddb {{.*}}(%rip), %xmm0, %xmm0
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; AVX1-NEXT: vinsertf128 $1, %xmm0, %ymm0, %ymm0
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; AVX1-NEXT: vperm2f128 {{.*#+}} ymm0 = ymm0[2,3,2,3]
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; AVX1-NEXT: retq
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;
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; AVX2-LABEL: Ei:
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; AVX2: ## BB#0: ## %entry
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; AVX2-NEXT: vpaddb {{.*}}(%rip), %ymm0, %ymm0
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; AVX2-NEXT: vperm2i128 {{.*#+}} ymm0 = ymm0[2,3,2,3]
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; AVX2-NEXT: retq
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entry:
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; add forces execution domain
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%a2 = add <32 x i8> %a, <i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1>
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%shuffle = shufflevector <32 x i8> %a2, <32 x i8> %b, <32 x i32> <i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27, i32 28, i32 29, i32 30, i32 31, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27, i32 28, i32 29, i32 30, i32 31>
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ret <32 x i8> %shuffle
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}
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define <4 x i64> @E2i(<4 x i64> %a, <4 x i64> %b) nounwind uwtable readnone ssp {
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; AVX1-LABEL: E2i:
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; AVX1: ## BB#0: ## %entry
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; AVX1-NEXT: vpaddq {{.*}}(%rip), %xmm0, %xmm0
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; AVX1-NEXT: vperm2f128 {{.*#+}} ymm0 = ymm1[2,3],ymm0[0,1]
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; AVX1-NEXT: retq
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;
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; AVX2-LABEL: E2i:
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; AVX2: ## BB#0: ## %entry
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; AVX2-NEXT: vpbroadcastq {{.*}}(%rip), %ymm2
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; AVX2-NEXT: vpaddq %ymm2, %ymm0, %ymm0
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; AVX2-NEXT: vperm2i128 {{.*#+}} ymm0 = ymm1[2,3],ymm0[0,1]
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; AVX2-NEXT: retq
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entry:
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; add forces execution domain
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%a2 = add <4 x i64> %a, <i64 1, i64 1, i64 1, i64 1>
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%shuffle = shufflevector <4 x i64> %a2, <4 x i64> %b, <4 x i32> <i32 6, i32 7, i32 0, i32 1>
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ret <4 x i64> %shuffle
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}
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define <8 x i32> @E3i(<8 x i32> %a, <8 x i32> %b) nounwind uwtable readnone ssp {
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; AVX1-LABEL: E3i:
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; AVX1: ## BB#0: ## %entry
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; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm0
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; AVX1-NEXT: vpaddd {{.*}}(%rip), %xmm0, %xmm0
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; AVX1-NEXT: vinsertf128 $1, %xmm0, %ymm0, %ymm0
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; AVX1-NEXT: vperm2f128 {{.*#+}} ymm0 = ymm0[2,3],ymm1[2,3]
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; AVX1-NEXT: retq
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;
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; AVX2-LABEL: E3i:
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; AVX2: ## BB#0: ## %entry
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; AVX2-NEXT: vpbroadcastd {{.*}}(%rip), %ymm2
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; AVX2-NEXT: vpaddd %ymm2, %ymm0, %ymm0
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; AVX2-NEXT: vperm2i128 {{.*#+}} ymm0 = ymm0[2,3],ymm1[2,3]
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; AVX2-NEXT: retq
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entry:
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; add forces execution domain
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%a2 = add <8 x i32> %a, <i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1>
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%shuffle = shufflevector <8 x i32> %a2, <8 x i32> %b, <8 x i32> <i32 undef, i32 5, i32 undef, i32 7, i32 12, i32 13, i32 14, i32 15>
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ret <8 x i32> %shuffle
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}
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define <16 x i16> @E4i(<16 x i16> %a, <16 x i16> %b) nounwind uwtable readnone ssp {
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; AVX1-LABEL: E4i:
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; AVX1: ## BB#0: ## %entry
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; AVX1-NEXT: vpaddw {{.*}}(%rip), %xmm0, %xmm0
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; AVX1-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0
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; AVX1-NEXT: retq
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;
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; AVX2-LABEL: E4i:
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; AVX2: ## BB#0: ## %entry
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; AVX2-NEXT: vpaddw {{.*}}(%rip), %ymm0, %ymm0
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; AVX2-NEXT: vinserti128 $1, %xmm0, %ymm1, %ymm0
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; AVX2-NEXT: retq
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entry:
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; add forces execution domain
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%a2 = add <16 x i16> %a, <i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1>
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%shuffle = shufflevector <16 x i16> %a2, <16 x i16> %b, <16 x i32> <i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>
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ret <16 x i16> %shuffle
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}
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define <16 x i16> @E5i(<16 x i16>* %a, <16 x i16>* %b) nounwind uwtable readnone ssp {
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; AVX1-LABEL: E5i:
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; AVX1: ## BB#0: ## %entry
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; AVX1-NEXT: vmovdqa (%rdi), %ymm0
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; AVX1-NEXT: vpaddw {{.*}}(%rip), %xmm0, %xmm0
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; AVX1-NEXT: vmovaps (%rsi), %ymm1
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; AVX1-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0
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; AVX1-NEXT: retq
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;
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; AVX2-LABEL: E5i:
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; AVX2: ## BB#0: ## %entry
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; AVX2-NEXT: vmovdqa (%rdi), %ymm0
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; AVX2-NEXT: vmovdqa (%rsi), %ymm1
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; AVX2-NEXT: vpaddw {{.*}}(%rip), %ymm0, %ymm0
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; AVX2-NEXT: vinserti128 $1, %xmm0, %ymm1, %ymm0
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; AVX2-NEXT: retq
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entry:
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%c = load <16 x i16>* %a
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%d = load <16 x i16>* %b
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%c2 = add <16 x i16> %c, <i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1>
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%shuffle = shufflevector <16 x i16> %c2, <16 x i16> %d, <16 x i32> <i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>
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ret <16 x i16> %shuffle
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}
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;;;; Cases with undef indicies mixed in the mask
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define <8 x float> @F(<8 x float> %a, <8 x float> %b) nounwind uwtable readnone ssp {
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; ALL-LABEL: F:
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; ALL: ## BB#0: ## %entry
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; ALL-NEXT: vperm2f128 {{.*#+}} ymm0 = ymm1[0,1,0,1]
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; ALL-NEXT: retq
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entry:
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%shuffle = shufflevector <8 x float> %a, <8 x float> %b, <8 x i32> <i32 undef, i32 undef, i32 6, i32 7, i32 undef, i32 9, i32 undef, i32 11>
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ret <8 x float> %shuffle
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}
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;;;; Cases we must not select vperm2f128
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define <8 x float> @G(<8 x float> %a, <8 x float> %b) nounwind uwtable readnone ssp {
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; ALL-LABEL: G:
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; ALL: ## BB#0: ## %entry
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; ALL-NEXT: vperm2f128 {{.*#+}} ymm0 = ymm0[2,3],ymm1[2,3]
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; ALL-NEXT: vpermilps {{.*#+}} ymm0 = ymm0[0,0,2,3,4,4,6,7]
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; ALL-NEXT: retq
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entry:
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%shuffle = shufflevector <8 x float> %a, <8 x float> %b, <8 x i32> <i32 undef, i32 undef, i32 6, i32 7, i32 undef, i32 12, i32 undef, i32 15>
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ret <8 x float> %shuffle
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}
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