forked from OSchip/llvm-project
108 lines
4.8 KiB
LLVM
108 lines
4.8 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -mtriple=x86_64-apple-darwin -mcpu=knl -mattr=+avx512bw | FileCheck %s --check-prefix=ALL --check-prefix=AVX512BW
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; RUN: llc < %s -mtriple=i386-unknown-linux-gnu -mcpu=knl -mattr=+avx512bw | FileCheck %s --check-prefix=ALL --check-prefix=AVX512F-32
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declare void @llvm.x86.avx512.mask.storeu.b.512(i8*, <64 x i8>, i64)
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define void@test_int_x86_avx512_mask_storeu_b_512(i8* %ptr1, i8* %ptr2, <64 x i8> %x1, i64 %x2) {
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; AVX512BW-LABEL: test_int_x86_avx512_mask_storeu_b_512:
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; AVX512BW: ## BB#0:
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; AVX512BW-NEXT: kmovq %rdx, %k1
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; AVX512BW-NEXT: vmovdqu8 %zmm0, (%rdi) {%k1}
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; AVX512BW-NEXT: vmovdqu8 %zmm0, (%rsi)
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; AVX512BW-NEXT: retq
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;
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; AVX512F-32-LABEL: test_int_x86_avx512_mask_storeu_b_512:
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; AVX512F-32: # BB#0:
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; AVX512F-32-NEXT: movl {{[0-9]+}}(%esp), %eax
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; AVX512F-32-NEXT: movl {{[0-9]+}}(%esp), %ecx
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; AVX512F-32-NEXT: kmovq {{[0-9]+}}(%esp), %k1
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; AVX512F-32-NEXT: vmovdqu8 %zmm0, (%ecx) {%k1}
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; AVX512F-32-NEXT: vmovdqu8 %zmm0, (%eax)
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; AVX512F-32-NEXT: retl
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call void @llvm.x86.avx512.mask.storeu.b.512(i8* %ptr1, <64 x i8> %x1, i64 %x2)
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call void @llvm.x86.avx512.mask.storeu.b.512(i8* %ptr2, <64 x i8> %x1, i64 -1)
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ret void
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}
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declare void @llvm.x86.avx512.mask.storeu.w.512(i8*, <32 x i16>, i32)
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define void@test_int_x86_avx512_mask_storeu_w_512(i8* %ptr1, i8* %ptr2, <32 x i16> %x1, i32 %x2) {
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; AVX512BW-LABEL: test_int_x86_avx512_mask_storeu_w_512:
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; AVX512BW: ## BB#0:
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; AVX512BW-NEXT: kmovd %edx, %k1
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; AVX512BW-NEXT: vmovdqu16 %zmm0, (%rdi) {%k1}
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; AVX512BW-NEXT: vmovdqu16 %zmm0, (%rsi)
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; AVX512BW-NEXT: retq
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;
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; AVX512F-32-LABEL: test_int_x86_avx512_mask_storeu_w_512:
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; AVX512F-32: # BB#0:
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; AVX512F-32-NEXT: movl {{[0-9]+}}(%esp), %eax
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; AVX512F-32-NEXT: movl {{[0-9]+}}(%esp), %ecx
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; AVX512F-32-NEXT: kmovd {{[0-9]+}}(%esp), %k1
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; AVX512F-32-NEXT: vmovdqu16 %zmm0, (%ecx) {%k1}
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; AVX512F-32-NEXT: vmovdqu16 %zmm0, (%eax)
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; AVX512F-32-NEXT: retl
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call void @llvm.x86.avx512.mask.storeu.w.512(i8* %ptr1, <32 x i16> %x1, i32 %x2)
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call void @llvm.x86.avx512.mask.storeu.w.512(i8* %ptr2, <32 x i16> %x1, i32 -1)
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ret void
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}
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declare <32 x i16> @llvm.x86.avx512.mask.loadu.w.512(i8*, <32 x i16>, i32)
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define <32 x i16>@test_int_x86_avx512_mask_loadu_w_512(i8* %ptr, i8* %ptr2, <32 x i16> %x1, i32 %mask) {
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; AVX512BW-LABEL: test_int_x86_avx512_mask_loadu_w_512:
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; AVX512BW: ## BB#0:
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; AVX512BW-NEXT: vmovdqu16 (%rdi), %zmm0
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; AVX512BW-NEXT: kmovd %edx, %k1
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; AVX512BW-NEXT: vmovdqu16 (%rsi), %zmm0 {%k1}
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; AVX512BW-NEXT: vmovdqu16 (%rdi), %zmm1 {%k1} {z}
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; AVX512BW-NEXT: vpaddw %zmm1, %zmm0, %zmm0
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; AVX512BW-NEXT: retq
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;
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; AVX512F-32-LABEL: test_int_x86_avx512_mask_loadu_w_512:
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; AVX512F-32: # BB#0:
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; AVX512F-32-NEXT: movl {{[0-9]+}}(%esp), %eax
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; AVX512F-32-NEXT: movl {{[0-9]+}}(%esp), %ecx
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; AVX512F-32-NEXT: vmovdqu16 (%ecx), %zmm0
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; AVX512F-32-NEXT: kmovd {{[0-9]+}}(%esp), %k1
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; AVX512F-32-NEXT: vmovdqu16 (%eax), %zmm0 {%k1}
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; AVX512F-32-NEXT: vmovdqu16 (%ecx), %zmm1 {%k1} {z}
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; AVX512F-32-NEXT: vpaddw %zmm1, %zmm0, %zmm0
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; AVX512F-32-NEXT: retl
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%res0 = call <32 x i16> @llvm.x86.avx512.mask.loadu.w.512(i8* %ptr, <32 x i16> %x1, i32 -1)
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%res = call <32 x i16> @llvm.x86.avx512.mask.loadu.w.512(i8* %ptr2, <32 x i16> %res0, i32 %mask)
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%res1 = call <32 x i16> @llvm.x86.avx512.mask.loadu.w.512(i8* %ptr, <32 x i16> zeroinitializer, i32 %mask)
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%res2 = add <32 x i16> %res, %res1
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ret <32 x i16> %res2
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}
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declare <64 x i8> @llvm.x86.avx512.mask.loadu.b.512(i8*, <64 x i8>, i64)
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define <64 x i8>@test_int_x86_avx512_mask_loadu_b_512(i8* %ptr, i8* %ptr2, <64 x i8> %x1, i64 %mask) {
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; AVX512BW-LABEL: test_int_x86_avx512_mask_loadu_b_512:
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; AVX512BW: ## BB#0:
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; AVX512BW-NEXT: vmovdqu8 (%rdi), %zmm0
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; AVX512BW-NEXT: kmovq %rdx, %k1
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; AVX512BW-NEXT: vmovdqu8 (%rsi), %zmm0 {%k1}
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; AVX512BW-NEXT: vmovdqu8 (%rdi), %zmm1 {%k1} {z}
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; AVX512BW-NEXT: vpaddb %zmm1, %zmm0, %zmm0
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; AVX512BW-NEXT: retq
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;
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; AVX512F-32-LABEL: test_int_x86_avx512_mask_loadu_b_512:
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; AVX512F-32: # BB#0:
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; AVX512F-32-NEXT: movl {{[0-9]+}}(%esp), %eax
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; AVX512F-32-NEXT: movl {{[0-9]+}}(%esp), %ecx
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; AVX512F-32-NEXT: vmovdqu8 (%ecx), %zmm0
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; AVX512F-32-NEXT: kmovq {{[0-9]+}}(%esp), %k1
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; AVX512F-32-NEXT: vmovdqu8 (%eax), %zmm0 {%k1}
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; AVX512F-32-NEXT: vmovdqu8 (%ecx), %zmm1 {%k1} {z}
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; AVX512F-32-NEXT: vpaddb %zmm1, %zmm0, %zmm0
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; AVX512F-32-NEXT: retl
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%res0 = call <64 x i8> @llvm.x86.avx512.mask.loadu.b.512(i8* %ptr, <64 x i8> %x1, i64 -1)
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%res = call <64 x i8> @llvm.x86.avx512.mask.loadu.b.512(i8* %ptr2, <64 x i8> %res0, i64 %mask)
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%res1 = call <64 x i8> @llvm.x86.avx512.mask.loadu.b.512(i8* %ptr, <64 x i8> zeroinitializer, i64 %mask)
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%res2 = add <64 x i8> %res, %res1
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ret <64 x i8> %res2
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}
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