forked from OSchip/llvm-project
95 lines
2.7 KiB
LLVM
95 lines
2.7 KiB
LLVM
; RUN: llc -mtriple=aarch64-linux-gnu -mcpu=cortex-a57 -verify-machineinstrs < %s | FileCheck %s
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; CHECK-LABEL: f_XX:
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; CHECK: cbz x[[REG:[0-9]+]], [[BB:.LBB.*]]
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; CHECK: [[BB]]:
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; CHECK-NOT: mov x[[REG]], xzr
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define i64 @f_XX(i64 %n, i64* nocapture readonly %P) {
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entry:
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%tobool = icmp eq i64 %n, 0
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br i1 %tobool, label %if.end, label %if.then
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if.then: ; preds = %entry
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%0 = load i64, i64* %P
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br label %if.end
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if.end: ; preds = %entry, %if.then
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%a.0 = phi i64 [ %0, %if.then ], [ 0, %entry ]
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ret i64 %a.0
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}
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; CHECK-LABEL: f_WW:
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; CHECK: cbz w[[REG:[0-9]+]], [[BB:.LBB.*]]
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; CHECK: [[BB]]:
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; CHECK-NOT: mov w[[REG]], wzr
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define i32 @f_WW(i32 %n, i32* nocapture readonly %P) {
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entry:
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%tobool = icmp eq i32 %n, 0
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br i1 %tobool, label %if.end, label %if.then
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if.then: ; preds = %entry
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%0 = load i32, i32* %P
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br label %if.end
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if.end: ; preds = %entry, %if.then
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%a.0 = phi i32 [ %0, %if.then ], [ 0, %entry ]
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ret i32 %a.0
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}
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; CHECK-LABEL: f_XW:
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; CHECK: cbz x[[REG:[0-9]+]], [[BB:.LBB.*]]
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; CHECK: [[BB]]:
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; CHECK-NOT: mov w[[REG]], wzr
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define i32 @f_XW(i64 %n, i32* nocapture readonly %P) {
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entry:
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%tobool = icmp eq i64 %n, 0
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br i1 %tobool, label %if.end, label %if.then
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if.then: ; preds = %entry
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%0 = load i32, i32* %P
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br label %if.end
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if.end: ; preds = %entry, %if.then
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%a.0 = phi i32 [ %0, %if.then ], [ 0, %entry ]
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ret i32 %a.0
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}
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; CHECK-LABEL: f_WX:
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; CHECK: cbz w[[REG:[0-9]+]], [[BB:.LBB.*]]
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; CHECK: [[BB]]:
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; CHECK: mov x[[REG]], xzr
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; Do not remove the mov in this case because we do not know if the upper bits
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; of the X register are zero.
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define i64 @f_WX(i32 %n, i64* nocapture readonly %P) {
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entry:
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%tobool = icmp eq i32 %n, 0
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br i1 %tobool, label %if.end, label %if.then
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if.then: ; preds = %entry
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%0 = load i64, i64* %P
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br label %if.end
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if.end: ; preds = %entry, %if.then
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%a.0 = phi i64 [ %0, %if.then ], [ 0, %entry ]
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ret i64 %a.0
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}
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; CHECK-LABEL: test_superreg:
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; CHECK: cbz x[[REG:[0-9]+]], [[BB:.LBB.*]]
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; CHECK: [[BB]]:
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; CHECK: str x[[REG]], [x1]
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; CHECK-NOT: mov w[[REG]], wzr
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; Because we returned w0 but x0 was marked live-in to the block, we didn't
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; remove the <kill> on the str leading to a verification failure.
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define i32 @test_superreg(i64 %in, i64* %dest) {
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%tst = icmp eq i64 %in, 0
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br i1 %tst, label %true, label %false
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false:
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ret i32 42
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true:
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store volatile i64 %in, i64* %dest
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ret i32 0
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}
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