forked from OSchip/llvm-project
27 lines
600 B
LLVM
27 lines
600 B
LLVM
; RUN: llc < %s -verify-machineinstrs
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; Make sure we don't end up with a CBNZ of an undef v-/phys-reg.
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target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128"
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target triple = "arm64-apple-ios"
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declare void @bar(i8*)
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define void @foo(i8* %m, i32 %off0) {
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.thread1653:
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br i1 undef, label %0, label %.thread1880
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%1 = icmp eq i32 undef, 0
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%.not = xor i1 %1, true
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%brmerge = or i1 %.not, undef
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br i1 %brmerge, label %.thread1880, label %.thread1705
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.thread1705:
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ret void
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.thread1880:
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%m1652.ph = phi i8* [ %m, %0 ], [ null, %.thread1653 ]
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call void @bar(i8* %m1652.ph)
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ret void
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}
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