Oliver Stannard e4c3d21ea6 [AArch64] Add ARMv8.2-A FP16 vector instructions ... ARMv8.2-A adds 16-bit floating point versions of all existing SIMD floating-point instructions. This is an optional extension, so all of these instructions require the FeatureFullFP16 subtarget feature. Note that VFP without SIMD is not a valid combination for any version of ARMv8-A, but I have ensured that these instructions all depend on both FeatureNEON and FeatureFullFP16 for consistency. The ".2h" vector type specifier is now legal (for the scalar pairwise reduction instructions), so some unrelated tests have been modified as different error messages are emitted. This is not a problem as the invalid operands are still caught. llvm-svn: 255010		2015-12-08 12:16:10 +00:00
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AArch64	[AArch64] Add ARMv8.2-A FP16 vector instructions	2015-12-08 12:16:10 +00:00
AMDGPU	AMDGPU: Disallow flat_scr in SI assembler	2015-12-01 20:31:08 +00:00
ARM	[ARM] Generate ABI_optimization_goals build attribute, as described in the ARM ARM.	2015-12-07 14:22:39 +00:00
AsmParser	[MC] Use LShr for constant evaluation of ">>" on non-arm64 darwin.	2015-11-11 00:51:36 +00:00
COFF	MC: Simplify handling of temporary symbols in COFF writer.	2015-11-26 23:29:27 +00:00
Disassembler	[AArch64] Add ARMv8.2-A FP16 vector instructions	2015-12-08 12:16:10 +00:00
ELF	[llc/opt] Add an option to run all passes twice	2015-12-04 21:56:46 +00:00
Hexagon	[Hexagon] Adding shuffling resources for HVX instructions and tests for instruction encodings.	2015-12-03 21:44:28 +00:00
MachO	[MC] Add a test for state reset in MCMachOStreamer	2015-12-05 01:02:53 +00:00
Markup	…
Mips	[mips][ias] Removed DSP/DSPr2 instructions from base architecture valid-xfail.s's.	2015-12-07 14:12:44 +00:00
PowerPC	Relax a few more overspecified tests.	2015-11-03 19:38:19 +00:00
Sparc	Update test to take into account for r251271.	2015-10-26 03:34:29 +00:00
SystemZ	Re-enable UBSan tests for SystemZ: PR20980 was fixed.	2015-12-02 20:46:51 +00:00
X86	dding test for fnstsw	2015-12-08 12:00:24 +00:00