forked from OSchip/llvm-project
190 lines
8.8 KiB
LLVM
190 lines
8.8 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+avx | FileCheck %s --check-prefix=ALL --check-prefix=AVX --check-prefix=AVX1
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; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+avx2 | FileCheck %s --check-prefix=ALL --check-prefix=AVX --check-prefix=AVX2
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; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+avx512f | FileCheck %s --check-prefix=ALL --check-prefix=AVX --check-prefix=AVX512F
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;
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; Combine tests involving AVX target shuffles
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declare <4 x float> @llvm.x86.avx.vpermil.ps(<4 x float>, i8)
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declare <8 x float> @llvm.x86.avx.vpermil.ps.256(<8 x float>, i8)
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declare <2 x double> @llvm.x86.avx.vpermil.pd(<2 x double>, i8)
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declare <4 x double> @llvm.x86.avx.vpermil.pd.256(<4 x double>, i8)
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declare <4 x float> @llvm.x86.avx.vpermilvar.ps(<4 x float>, <4 x i32>)
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declare <8 x float> @llvm.x86.avx.vpermilvar.ps.256(<8 x float>, <8 x i32>)
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declare <2 x double> @llvm.x86.avx.vpermilvar.pd(<2 x double>, <2 x i64>)
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declare <4 x double> @llvm.x86.avx.vpermilvar.pd.256(<4 x double>, <4 x i64>)
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declare <8 x i32> @llvm.x86.avx.vperm2f128.si.256(<8 x i32>, <8 x i32>, i8)
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declare <8 x float> @llvm.x86.avx.vperm2f128.ps.256(<8 x float>, <8 x float>, i8)
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declare <4 x double> @llvm.x86.avx.vperm2f128.pd.256(<4 x double>, <4 x double>, i8)
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define <4 x float> @combine_vpermilvar_4f32_identity(<4 x float> %a0) {
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; ALL-LABEL: combine_vpermilvar_4f32_identity:
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; ALL: # BB#0:
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; ALL-NEXT: retq
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%1 = tail call <4 x float> @llvm.x86.avx.vpermilvar.ps(<4 x float> %a0, <4 x i32> <i32 3, i32 2, i32 1, i32 0>)
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%2 = tail call <4 x float> @llvm.x86.avx.vpermilvar.ps(<4 x float> %1, <4 x i32> <i32 3, i32 2, i32 1, i32 0>)
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ret <4 x float> %2
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}
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define <4 x float> @combine_vpermilvar_4f32_movddup(<4 x float> %a0) {
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; ALL-LABEL: combine_vpermilvar_4f32_movddup:
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; ALL: # BB#0:
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; ALL-NEXT: vmovddup {{.*#+}} xmm0 = xmm0[0,0]
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; ALL-NEXT: retq
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%1 = tail call <4 x float> @llvm.x86.avx.vpermilvar.ps(<4 x float> %a0, <4 x i32> <i32 0, i32 1, i32 0, i32 1>)
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ret <4 x float> %1
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}
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define <4 x float> @combine_vpermilvar_4f32_movddup_load(<4 x float> *%a0) {
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; ALL-LABEL: combine_vpermilvar_4f32_movddup_load:
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; ALL: # BB#0:
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; ALL-NEXT: vmovddup {{.*#+}} xmm0 = mem[0,0]
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; ALL-NEXT: retq
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%1 = load <4 x float>, <4 x float> *%a0
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%2 = tail call <4 x float> @llvm.x86.avx.vpermilvar.ps(<4 x float> %1, <4 x i32> <i32 0, i32 1, i32 0, i32 1>)
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ret <4 x float> %2
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}
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define <4 x float> @combine_vpermilvar_4f32_movshdup(<4 x float> %a0) {
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; ALL-LABEL: combine_vpermilvar_4f32_movshdup:
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; ALL: # BB#0:
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; ALL-NEXT: vmovshdup {{.*#+}} xmm0 = xmm0[1,1,3,3]
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; ALL-NEXT: retq
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%1 = tail call <4 x float> @llvm.x86.avx.vpermilvar.ps(<4 x float> %a0, <4 x i32> <i32 undef, i32 1, i32 3, i32 3>)
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ret <4 x float> %1
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}
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define <4 x float> @combine_vpermilvar_4f32_movsldup(<4 x float> %a0) {
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; ALL-LABEL: combine_vpermilvar_4f32_movsldup:
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; ALL: # BB#0:
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; ALL-NEXT: vmovsldup {{.*#+}} xmm0 = xmm0[0,0,2,2]
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; ALL-NEXT: retq
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%1 = tail call <4 x float> @llvm.x86.avx.vpermilvar.ps(<4 x float> %a0, <4 x i32> <i32 0, i32 0, i32 2, i32 undef>)
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ret <4 x float> %1
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}
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define <4 x float> @combine_vpermilvar_4f32_unpckh(<4 x float> %a0) {
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; ALL-LABEL: combine_vpermilvar_4f32_unpckh:
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; ALL: # BB#0:
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; ALL-NEXT: vpermilps {{.*#+}} xmm0 = xmm0[2,2,3,3]
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; ALL-NEXT: retq
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%1 = tail call <4 x float> @llvm.x86.avx.vpermilvar.ps(<4 x float> %a0, <4 x i32> <i32 2, i32 2, i32 3, i32 3>)
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ret <4 x float> %1
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}
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define <4 x float> @combine_vpermilvar_4f32_unpckl(<4 x float> %a0) {
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; ALL-LABEL: combine_vpermilvar_4f32_unpckl:
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; ALL: # BB#0:
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; ALL-NEXT: vpermilps {{.*#+}} xmm0 = xmm0[0,0,1,1]
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; ALL-NEXT: retq
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%1 = tail call <4 x float> @llvm.x86.avx.vpermilvar.ps(<4 x float> %a0, <4 x i32> <i32 0, i32 0, i32 1, i32 1>)
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ret <4 x float> %1
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}
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define <8 x float> @combine_vpermilvar_8f32_identity(<8 x float> %a0) {
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; ALL-LABEL: combine_vpermilvar_8f32_identity:
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; ALL: # BB#0:
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; ALL-NEXT: retq
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%1 = tail call <8 x float> @llvm.x86.avx.vpermilvar.ps.256(<8 x float> %a0, <8 x i32> <i32 3, i32 2, i32 1, i32 0, i32 2, i32 3, i32 0, i32 undef>)
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%2 = tail call <8 x float> @llvm.x86.avx.vpermilvar.ps.256(<8 x float> %1, <8 x i32> <i32 3, i32 2, i32 1, i32 0, i32 2, i32 3, i32 0, i32 1>)
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ret <8 x float> %2
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}
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define <8 x float> @combine_vpermilvar_8f32_movddup(<8 x float> %a0) {
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; ALL-LABEL: combine_vpermilvar_8f32_movddup:
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; ALL: # BB#0:
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; ALL-NEXT: vmovddup {{.*#+}} ymm0 = ymm0[0,0,2,2]
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; ALL-NEXT: retq
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%1 = tail call <8 x float> @llvm.x86.avx.vpermilvar.ps.256(<8 x float> %a0, <8 x i32> <i32 0, i32 1, i32 0, i32 1, i32 4, i32 5, i32 4, i32 5>)
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ret <8 x float> %1
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}
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define <8 x float> @combine_vpermilvar_8f32_movddup_load(<8 x float> *%a0) {
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; ALL-LABEL: combine_vpermilvar_8f32_movddup_load:
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; ALL: # BB#0:
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; ALL-NEXT: vmovddup {{.*#+}} ymm0 = mem[0,0,2,2]
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; ALL-NEXT: retq
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%1 = load <8 x float>, <8 x float> *%a0
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%2 = tail call <8 x float> @llvm.x86.avx.vpermilvar.ps.256(<8 x float> %1, <8 x i32> <i32 0, i32 1, i32 0, i32 1, i32 4, i32 5, i32 4, i32 5>)
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ret <8 x float> %2
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}
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define <8 x float> @combine_vpermilvar_8f32_movshdup(<8 x float> %a0) {
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; ALL-LABEL: combine_vpermilvar_8f32_movshdup:
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; ALL: # BB#0:
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; ALL-NEXT: vmovshdup {{.*#+}} ymm0 = ymm0[1,1,3,3,5,5,7,7]
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; ALL-NEXT: retq
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%1 = tail call <8 x float> @llvm.x86.avx.vpermilvar.ps.256(<8 x float> %a0, <8 x i32> <i32 1, i32 1, i32 3, i32 3, i32 undef, i32 5, i32 7, i32 7>)
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ret <8 x float> %1
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}
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define <8 x float> @combine_vpermilvar_8f32_movsldup(<8 x float> %a0) {
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; ALL-LABEL: combine_vpermilvar_8f32_movsldup:
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; ALL: # BB#0:
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; ALL-NEXT: vmovsldup {{.*#+}} ymm0 = ymm0[0,0,2,2,4,4,6,6]
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; ALL-NEXT: retq
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%1 = tail call <8 x float> @llvm.x86.avx.vpermilvar.ps.256(<8 x float> %a0, <8 x i32> <i32 0, i32 0, i32 2, i32 2, i32 4, i32 4, i32 6, i32 6>)
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ret <8 x float> %1
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}
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define <2 x double> @combine_vpermilvar_2f64_identity(<2 x double> %a0) {
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; ALL-LABEL: combine_vpermilvar_2f64_identity:
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; ALL: # BB#0:
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; ALL-NEXT: retq
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%1 = tail call <2 x double> @llvm.x86.avx.vpermilvar.pd(<2 x double> %a0, <2 x i64> <i64 2, i64 0>)
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%2 = tail call <2 x double> @llvm.x86.avx.vpermilvar.pd(<2 x double> %1, <2 x i64> <i64 2, i64 0>)
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ret <2 x double> %2
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}
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define <2 x double> @combine_vpermilvar_2f64_movddup(<2 x double> %a0) {
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; ALL-LABEL: combine_vpermilvar_2f64_movddup:
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; ALL: # BB#0:
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; ALL-NEXT: vxorpd %xmm1, %xmm1, %xmm1
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; ALL-NEXT: vpermilpd %xmm1, %xmm0, %xmm0
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; ALL-NEXT: retq
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%1 = tail call <2 x double> @llvm.x86.avx.vpermilvar.pd(<2 x double> %a0, <2 x i64> <i64 0, i64 0>)
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ret <2 x double> %1
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}
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define <4 x double> @combine_vpermilvar_4f64_identity(<4 x double> %a0) {
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; ALL-LABEL: combine_vpermilvar_4f64_identity:
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; ALL: # BB#0:
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; ALL-NEXT: retq
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%1 = tail call <4 x double> @llvm.x86.avx.vpermilvar.pd.256(<4 x double> %a0, <4 x i64> <i64 2, i64 0, i64 2, i64 0>)
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%2 = tail call <4 x double> @llvm.x86.avx.vpermilvar.pd.256(<4 x double> %1, <4 x i64> <i64 2, i64 0, i64 2, i64 0>)
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ret <4 x double> %2
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}
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define <4 x double> @combine_vpermilvar_4f64_movddup(<4 x double> %a0) {
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; ALL-LABEL: combine_vpermilvar_4f64_movddup:
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; ALL: # BB#0:
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; ALL-NEXT: vmovddup {{.*#+}} ymm0 = ymm0[0,0,2,2]
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; ALL-NEXT: retq
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%1 = tail call <4 x double> @llvm.x86.avx.vpermilvar.pd.256(<4 x double> %a0, <4 x i64> <i64 0, i64 0, i64 4, i64 4>)
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ret <4 x double> %1
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}
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define <4 x float> @combine_vpermilvar_4f32_4stage(<4 x float> %a0) {
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; ALL-LABEL: combine_vpermilvar_4f32_4stage:
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; ALL: # BB#0:
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; ALL-NEXT: vpermilps {{.*#+}} xmm0 = xmm0[2,0,3,1]
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; ALL-NEXT: retq
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%1 = tail call <4 x float> @llvm.x86.avx.vpermilvar.ps(<4 x float> %a0, <4 x i32> <i32 3, i32 2, i32 1, i32 0>)
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%2 = tail call <4 x float> @llvm.x86.avx.vpermilvar.ps(<4 x float> %1, <4 x i32> <i32 2, i32 3, i32 0, i32 1>)
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%3 = tail call <4 x float> @llvm.x86.avx.vpermilvar.ps(<4 x float> %2, <4 x i32> <i32 0, i32 2, i32 1, i32 3>)
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%4 = tail call <4 x float> @llvm.x86.avx.vpermilvar.ps(<4 x float> %3, <4 x i32> <i32 3, i32 2, i32 1, i32 0>)
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ret <4 x float> %4
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}
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define <8 x float> @combine_vpermilvar_8f32_4stage(<8 x float> %a0) {
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; ALL-LABEL: combine_vpermilvar_8f32_4stage:
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; ALL: # BB#0:
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; ALL-NEXT: vpermilps {{.*#+}} ymm0 = ymm0[2,0,3,1,6,4,7,5]
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; ALL-NEXT: retq
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%1 = tail call <8 x float> @llvm.x86.avx.vpermilvar.ps.256(<8 x float> %a0, <8 x i32> <i32 3, i32 2, i32 1, i32 0, i32 3, i32 2, i32 1, i32 0>)
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%2 = tail call <8 x float> @llvm.x86.avx.vpermilvar.ps.256(<8 x float> %1, <8 x i32> <i32 2, i32 3, i32 0, i32 1, i32 2, i32 3, i32 0, i32 1>)
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%3 = tail call <8 x float> @llvm.x86.avx.vpermilvar.ps.256(<8 x float> %2, <8 x i32> <i32 0, i32 2, i32 1, i32 3, i32 0, i32 2, i32 1, i32 3>)
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%4 = tail call <8 x float> @llvm.x86.avx.vpermilvar.ps.256(<8 x float> %3, <8 x i32> <i32 3, i32 2, i32 1, i32 0, i32 3, i32 2, i32 1, i32 0>)
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ret <8 x float> %4
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}
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